flash_device.hh revision 10801:049eb85e8ea2 
1/*
2 * Copyright (c) 2013-2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Rene de Jong
38 */
39#ifndef __DEV_ARM_FLASH_DEVICE_HH__
40#define __DEV_ARM_FLASH_DEVICE_HH__
41
42#include <deque>
43
44#include "base/statistics.hh"
45#include "debug/FlashDevice.hh"
46#include "dev/arm/abstract_nvm.hh"
47#include "enums/DataDistribution.hh"
48#include "params/FlashDevice.hh"
49#include "sim/serialize.hh"
50
51/**
52 * Flash Device model
53 * The Flash Device model is a timing model for a NAND flash device.
54 * It doesn't tranfer any data
55 */
56class FlashDevice : public AbstractNVM
57{
58  public:
59
60    /** Initialize functions*/
61    FlashDevice(const FlashDeviceParams*);
62    ~FlashDevice();
63
64    /** Checkpoint functions*/
65    unsigned int drain(DrainManager *dm);
66    void checkDrain();
67    void serialize(std::ostream &os);
68    void unserialize(Checkpoint *cp, const std::string &section);
69
70  private:
71    /** Defines the possible actions to the flash*/
72    enum Actions {
73        ActionRead,
74        ActionWrite,
75        ActionErase,
76        /**
77         * A copy involves taking all the used pages from a block and store
78         *  it in another
79         */
80        ActionCopy
81    };
82
83    /** Every logical address maps to a physical block and a physical page*/
84    struct PageMapEntry {
85        uint32_t page;
86        uint32_t block;
87    };
88
89    struct CallBackEntry {
90        Tick time;
91        Callback *function;
92    };
93
94    struct FlashDeviceStats {
95        /** Amount of GC activations*/
96        Stats::Scalar totalGCActivations;
97
98        /** Histogram of address accesses*/
99        Stats::Histogram writeAccess;
100        Stats::Histogram readAccess;
101        Stats::Histogram fileSystemAccess;
102
103        /** Histogram of access latencies*/
104        Stats::Histogram writeLatency;
105        Stats::Histogram readLatency;
106    };
107
108    /** Device access functions Inherrited from AbstractNVM*/
109    virtual void initializeMemory(uint64_t disk_size, uint32_t sector_size)
110    {
111        initializeFlash(disk_size, sector_size);
112    }
113
114    virtual void readMemory(uint64_t address, uint32_t amount,
115                            Callback *event)
116    {
117        accessDevice(address, amount, event, ActionRead);
118    }
119    virtual void writeMemory(uint64_t address, uint32_t amount,
120                             Callback *event)
121    {
122        accessDevice(address, amount, event, ActionWrite);
123    }
124
125    /**Initialization function; called when all disk specifics are known*/
126    void initializeFlash(uint64_t disk_size, uint32_t sector_size);
127
128    /**Flash action function*/
129    void accessDevice(uint64_t address, uint32_t amount, Callback *event,
130                      Actions action);
131
132    /** Event rescheduler*/
133    void actionComplete();
134
135    /** FTL functionality */
136    Tick remap(uint64_t logic_page_addr);
137
138    /** Access time calculator*/
139    Tick accessTimes(uint64_t address, Actions accesstype);
140
141    /** Function to indicate that a page is known*/
142    void clearUnknownPages(uint32_t index);
143
144    /** Function to test if a page is known*/
145    bool getUnknownPages(uint32_t index);
146
147    /**Stats register function*/
148    void regStats();
149
150    /** Disk sizes in bytes */
151    uint64_t diskSize;
152    const uint32_t blockSize;
153    const uint32_t pageSize;
154
155    /** Garbage collection algorithm emulator */
156    const uint32_t GCActivePercentage;
157
158    /** Access latencies */
159    const Tick readLatency;
160    const Tick writeLatency;
161    const Tick eraseLatency;
162
163    /** Flash organization */
164    const Enums::DataDistribution dataDistribution;
165    const uint32_t numPlanes;
166
167    /** RequestHandler stats */
168    struct FlashDeviceStats stats;
169
170    /** Disk dimensions in pages and blocks */
171    uint32_t pagesPerBlock;
172    uint32_t pagesPerDisk;
173    uint32_t blocksPerDisk;
174
175    uint32_t planeMask;
176
177    /**
178     * drain manager
179     * Needed to be able to implement checkpoint functionality
180     */
181
182    DrainManager *drainManager;
183
184    /**
185     * when the disk is first started we are unsure of the number of
186     * used pages, this variable will help determining what we do know.
187     */
188    std::vector<uint32_t> unknownPages;
189    /** address to logic place has a block and a page field*/
190    std::vector<struct PageMapEntry> locationTable;
191    /** number of valid entries per block*/
192    std::vector<uint32_t> blockValidEntries;
193    /** number of empty entries*/
194    std::vector<uint32_t> blockEmptyEntries;
195
196    /**This vector of queues keeps track of all the callbacks per plane*/
197    std::vector<std::deque<struct CallBackEntry> > planeEventQueue;
198
199    /** Completion event */
200    EventWrapper<FlashDevice, &FlashDevice::actionComplete> planeEvent;
201};
202#endif //__DEV_ARM_FLASH_DEVICE_HH__
203