a9scu.cc revision 9808:13ffc0066b76 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#include "base/intmath.hh"
41#include "base/trace.hh"
42#include "dev/arm/a9scu.hh"
43#include "mem/packet.hh"
44#include "mem/packet_access.hh"
45#include "sim/system.hh"
46
47A9SCU::A9SCU(Params *p)
48    : BasicPioDevice(p, 0x60)
49{
50}
51
52Tick
53A9SCU::read(PacketPtr pkt)
54{
55    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
56    assert(pkt->getSize() == 4);
57    Addr daddr = pkt->getAddr() - pioAddr;
58    pkt->allocate();
59
60    switch(daddr) {
61      case Control:
62        pkt->set(1); // SCU already enabled
63        break;
64      case Config:
65        assert(sys->numContexts() <= 4);
66        int smp_bits, core_cnt;
67        smp_bits = power(2,sys->numContexts()) - 1;
68        core_cnt = sys->numContexts() - 1;
69        pkt->set(smp_bits << 4 | core_cnt);
70        break;
71      default:
72        // Only configuration register is implemented
73        panic("Tried to read SCU at offset %#x\n", daddr);
74        break;
75    }
76    pkt->makeAtomicResponse();
77    return pioDelay;
78
79}
80
81Tick
82A9SCU::write(PacketPtr pkt)
83{
84    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
85
86    Addr daddr = pkt->getAddr() - pioAddr;
87    switch (daddr) {
88      default:
89        // Nothing implemented at this point
90        panic("Tried to write SCU at offset %#x\n", daddr);
91        break;
92    }
93    pkt->makeAtomicResponse();
94    return pioDelay;
95}
96
97A9SCU *
98A9SCUParams::create()
99{
100    return new A9SCU(this);
101}
102