a9scu.cc revision 10565:23593fdaadcd 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#include "base/intmath.hh"
41#include "base/trace.hh"
42#include "dev/arm/a9scu.hh"
43#include "mem/packet.hh"
44#include "mem/packet_access.hh"
45#include "sim/system.hh"
46
47A9SCU::A9SCU(Params *p)
48    : BasicPioDevice(p, 0x60)
49{
50}
51
52Tick
53A9SCU::read(PacketPtr pkt)
54{
55    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
56    assert(pkt->getSize() == 4);
57    Addr daddr = pkt->getAddr() - pioAddr;
58
59    switch(daddr) {
60      case Control:
61        pkt->set(1); // SCU already enabled
62        break;
63      case Config:
64        /* Without making a completely new SCU, we can use the core count field
65         * as 4 bits and inform the OS of up to 16 CPUs.  Although the core
66         * count is technically bits [1:0] only, bits [3:2] are SBZ for future
67         * expansion like this.
68         */
69        if (sys->numContexts() > 4) {
70            warn_once("A9SCU with >4 CPUs is unsupported\n");
71            if (sys->numContexts() > 15)
72                fatal("Too many CPUs (%d) for A9SCU!\n", sys->numContexts());
73        }
74        int smp_bits, core_cnt;
75        smp_bits = power(2,sys->numContexts()) - 1;
76        core_cnt = sys->numContexts() - 1;
77        pkt->set(smp_bits << 4 | core_cnt);
78        break;
79      default:
80        // Only configuration register is implemented
81        panic("Tried to read SCU at offset %#x\n", daddr);
82        break;
83    }
84    pkt->makeAtomicResponse();
85    return pioDelay;
86
87}
88
89Tick
90A9SCU::write(PacketPtr pkt)
91{
92    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
93
94    Addr daddr = pkt->getAddr() - pioAddr;
95    switch (daddr) {
96      default:
97        // Nothing implemented at this point
98        panic("Tried to write SCU at offset %#x\n", daddr);
99        break;
100    }
101    pkt->makeAtomicResponse();
102    return pioDelay;
103}
104
105A9SCU *
106A9SCUParams::create()
107{
108    return new A9SCU(this);
109}
110