tsunami_pchip.hh revision 1762
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/** @file 30 * Tsunami PCI interface CSRs 31 */ 32 33#ifndef __TSUNAMI_PCHIP_HH__ 34#define __TSUNAMI_PCHIP_HH__ 35 36#include "dev/tsunami.hh" 37#include "base/range.hh" 38#include "dev/io_device.hh" 39 40/** 41 * A very simple implementation of the Tsunami PCI interface chips. 42 */ 43class TsunamiPChip : public PioDevice 44{ 45 private: 46 /** The base address of this device */ 47 Addr addr; 48 49 /** The size of mappad from the above address */ 50 static const Addr size = 0xfff; 51 52 protected: 53 /** 54 * pointer to the tsunami object. 55 * This is our access to all the other tsunami 56 * devices. 57 */ 58 Tsunami *tsunami; 59 60 /** Pchip control register */ 61 uint64_t pctl; 62 63 /** Window Base addresses */ 64 uint64_t wsba[4]; 65 66 /** Window masks */ 67 uint64_t wsm[4]; 68 69 /** Translated Base Addresses */ 70 uint64_t tba[4]; 71 72 public: 73 /** 74 * Register the PChip with the mmu and init all wsba, wsm, and tba to 0 75 * @param name the name of thes device 76 * @param t a pointer to the tsunami device 77 * @param a the address which we respond to 78 * @param mmu the mmu we are to register with 79 * @param hier object to store parameters universal the device hierarchy 80 * @param bus The bus that this device is attached to 81 */ 82 TsunamiPChip(const std::string &name, Tsunami *t, Addr a, 83 MemoryController *mmu, HierParams *hier, Bus *bus, 84 Tick pio_latency); 85 86 /** 87 * Translate a PCI bus address to a memory address for DMA. 88 * @todo Andrew says this needs to be fixed. What's wrong with it? 89 * @param busAddr PCI address to translate. 90 * @return memory system address 91 */ 92 Addr translatePciToDma(Addr busAddr); 93 94 /** 95 * Process a read to the PChip. 96 * @param req Contains the address to read from. 97 * @param data A pointer to write the read data to. 98 * @return The fault condition of the access. 99 */ 100 virtual Fault read(MemReqPtr &req, uint8_t *data); 101 102 /** 103 * Process a write to the PChip. 104 * @param req Contains the address to write to. 105 * @param data The data to write. 106 * @return The fault condition of the access. 107 */ 108 virtual Fault write(MemReqPtr &req, const uint8_t *data); 109 110 /** 111 * Serialize this object to the given output stream. 112 * @param os The stream to serialize to. 113 */ 114 virtual void serialize(std::ostream &os); 115 116 /** 117 * Reconstruct the state of this object from a checkpoint. 118 * @param cp The checkpoint use. 119 * @param section The section name of this object 120 */ 121 virtual void unserialize(Checkpoint *cp, const std::string §ion); 122 123 /** 124 * Return how long this access will take. 125 * @param req the memory request to calcuate 126 * @return Tick when the request is done 127 */ 128 Tick cacheAccess(MemReqPtr &req); 129}; 130 131#endif // __TSUNAMI_PCHIP_HH__ 132