tsunami_io.hh revision 3932:62e915bb6704 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33/** @file
34 * Tsunami I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_TSUNAMI_IO_HH__
38#define __DEV_TSUNAMI_IO_HH__
39
40#include "dev/io_device.hh"
41#include "base/range.hh"
42#include "dev/alpha/tsunami.hh"
43#include "sim/eventq.hh"
44
45/**
46 * Tsunami I/O device is a catch all for all the south bridge stuff we care
47 * to implement.
48 */
49class TsunamiIO : public BasicPioDevice
50{
51  private:
52    struct tm tm;
53
54  protected:
55    /** Real-Time Clock (MC146818) */
56    class RTC
57    {
58      private:
59        /** Event for RTC periodic interrupt */
60        struct RTCEvent : public Event
61        {
62            /** A pointer back to tsunami to create interrupt the processor. */
63            Tsunami* tsunami;
64            Tick interval;
65
66            RTCEvent(Tsunami* t, Tick i);
67
68            /** Schedule the RTC periodic interrupt */
69            void scheduleIntr();
70
71            /** Event process to occur at interrupt*/
72            virtual void process();
73
74            /** Event description */
75            virtual const char *description();
76        };
77
78      private:
79        std::string _name;
80        const std::string &name() const { return _name; }
81
82        /** RTC periodic interrupt event */
83        RTCEvent event;
84
85        /** Current RTC register address/index */
86        int addr;
87
88        /** should the year be interpreted as BCD? */
89        bool year_is_bcd;
90
91        /** Data for real-time clock function */
92        union {
93            uint8_t clock_data[10];
94
95            struct {
96                uint8_t sec;
97                uint8_t sec_alrm;
98                uint8_t min;
99                uint8_t min_alrm;
100                uint8_t hour;
101                uint8_t hour_alrm;
102                uint8_t wday;
103                uint8_t mday;
104                uint8_t mon;
105                uint8_t year;
106            };
107        };
108
109        /** RTC status register A */
110        uint8_t stat_regA;
111
112        /** RTC status register B */
113        uint8_t stat_regB;
114
115      public:
116        RTC(const std::string &name, Tsunami* tsunami,
117            const std::vector<int> &t, bool bcd, Tick i);
118
119        /** RTC address port: write address of RTC RAM data to access */
120        void writeAddr(const uint8_t data);
121
122        /** RTC write data */
123        void writeData(const uint8_t data);
124
125        /** RTC read data */
126        uint8_t readData();
127
128        /** RTC get the date */
129        std::string getDateString();
130
131        /**
132          * Serialize this object to the given output stream.
133          * @param base The base name of the counter object.
134          * @param os The stream to serialize to.
135          */
136        void serialize(const std::string &base, std::ostream &os);
137
138        /**
139         * Reconstruct the state of this object from a checkpoint.
140          * @param base The base name of the counter object.
141         * @param cp The checkpoint use.
142         * @param section The section name of this object
143         */
144        void unserialize(const std::string &base, Checkpoint *cp,
145                         const std::string &section);
146    };
147
148    /** Programmable Interval Timer (Intel 8254) */
149    class PITimer
150    {
151        /** Counter element for PIT */
152        class Counter
153        {
154            /** Event for counter interrupt */
155            class CounterEvent : public Event
156            {
157              private:
158                /** Pointer back to Counter */
159                Counter* counter;
160                Tick interval;
161
162              public:
163                CounterEvent(Counter*);
164
165                /** Event process */
166                virtual void process();
167
168                /** Event description */
169                virtual const char *description();
170
171                friend class Counter;
172            };
173
174          private:
175            std::string _name;
176            const std::string &name() const { return _name; }
177
178            CounterEvent event;
179
180            /** Current count value */
181            uint16_t count;
182
183            /** Latched count */
184            uint16_t latched_count;
185
186            /** Interrupt period */
187            uint16_t period;
188
189            /** Current mode of operation */
190            uint8_t mode;
191
192            /** Output goes high when the counter reaches zero */
193            bool output_high;
194
195            /** State of the count latch */
196            bool latch_on;
197
198            /** Set of values for read_byte and write_byte */
199            enum {LSB, MSB};
200
201            /** Determine which byte of a 16-bit count value to read/write */
202            uint8_t read_byte, write_byte;
203
204          public:
205            Counter(const std::string &name);
206
207            /** Latch the current count (if one is not already latched) */
208            void latchCount();
209
210            /** Set the read/write mode */
211            void setRW(int rw_val);
212
213            /** Set operational mode */
214            void setMode(int mode_val);
215
216            /** Set count encoding */
217            void setBCD(int bcd_val);
218
219            /** Read a count byte */
220            uint8_t read();
221
222            /** Write a count byte */
223            void write(const uint8_t data);
224
225            /** Is the output high? */
226            bool outputHigh();
227
228            /**
229             * Serialize this object to the given output stream.
230             * @param base The base name of the counter object.
231             * @param os   The stream to serialize to.
232             */
233            void serialize(const std::string &base, std::ostream &os);
234
235            /**
236             * Reconstruct the state of this object from a checkpoint.
237             * @param base The base name of the counter object.
238             * @param cp The checkpoint use.
239             * @param section The section name of this object
240             */
241            void unserialize(const std::string &base, Checkpoint *cp,
242                             const std::string &section);
243        };
244
245      private:
246        std::string _name;
247        const std::string &name() const { return _name; }
248
249        /** PIT has three seperate counters */
250        Counter *counter[3];
251
252      public:
253        /** Public way to access individual counters (avoid array accesses) */
254        Counter counter0;
255        Counter counter1;
256        Counter counter2;
257
258        PITimer(const std::string &name);
259
260        /** Write control word */
261        void writeControl(const uint8_t data);
262
263        /**
264         * Serialize this object to the given output stream.
265         * @param base The base name of the counter object.
266         * @param os The stream to serialize to.
267         */
268        void serialize(const std::string &base, std::ostream &os);
269
270        /**
271         * Reconstruct the state of this object from a checkpoint.
272         * @param base The base name of the counter object.
273         * @param cp The checkpoint use.
274         * @param section The section name of this object
275         */
276        void unserialize(const std::string &base, Checkpoint *cp,
277                         const std::string &section);
278    };
279
280    /** Mask of the PIC1 */
281    uint8_t mask1;
282
283    /** Mask of the PIC2 */
284    uint8_t mask2;
285
286    /** Mode of PIC1. Not used for anything */
287    uint8_t mode1;
288
289    /** Mode of PIC2. Not used for anything */
290    uint8_t mode2;
291
292    /** Raw PIC interrupt register before masking */
293    uint8_t picr; //Raw PIC interrput register
294
295    /** Is the pic interrupting right now or not. */
296    bool picInterrupting;
297
298    /** A pointer to the Tsunami device which be belong to */
299    Tsunami *tsunami;
300
301    /** Intel 8253 Periodic Interval Timer */
302    PITimer pitimer;
303
304    RTC rtc;
305
306    /** The interval is set via two writes to the PIT.
307     * This variable contains a flag as to how many writes have happened, and
308     * the time so far.
309     */
310    uint16_t timerData;
311
312  public:
313    /**
314     * Return the freqency of the RTC
315     * @return interrupt rate of the RTC
316     */
317    Tick frequency() const;
318
319    struct Params : public BasicPioDevice::Params
320    {
321        Tick frequency;
322        Tsunami *tsunami;
323        std::vector<int> init_time;
324        bool year_is_bcd;
325    };
326
327  protected:
328    const Params *params() const { return (const Params*)_params; }
329
330  public:
331    /**
332     * Initialize all the data for devices supported by Tsunami I/O.
333     * @param p pointer to Params struct
334     */
335    TsunamiIO(Params *p);
336
337    virtual Tick read(PacketPtr pkt);
338    virtual Tick write(PacketPtr pkt);
339
340    /**
341     * Post an PIC interrupt to the CPU via the CChip
342     * @param bitvector interrupt to post.
343     */
344    void postPIC(uint8_t bitvector);
345
346    /**
347     * Clear a posted interrupt
348     * @param bitvector interrupt to clear
349     */
350    void clearPIC(uint8_t bitvector);
351
352    /**
353     * Serialize this object to the given output stream.
354     * @param os The stream to serialize to.
355     */
356    virtual void serialize(std::ostream &os);
357
358    /**
359     * Reconstruct the state of this object from a checkpoint.
360     * @param cp The checkpoint use.
361     * @param section The section name of this object
362     */
363    virtual void unserialize(Checkpoint *cp, const std::string &section);
364
365};
366
367#endif // __DEV_TSUNAMI_IO_HH__
368