tsunami_io.hh revision 932 
1/*
2 * Copyright (c) 2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/* @file
30 * Tsunami Fake I/O Space mapping including RTC/timer interrupts
31 */
32
33#ifndef __TSUNAMI_DMA_HH__
34#define __TSUNAMI_DMA_HH__
35
36#include "dev/io_device.hh"
37#include "base/range.hh"
38#include "dev/tsunami.hh"
39#include "sim/eventq.hh"
40
41/** How often the RTC interrupts */
42static const int RTC_RATE  = 1024;
43
44/*
45 * Tsunami I/O device is a catch all for all the south bridge stuff we care
46 * to implement.
47 */
48class TsunamiIO : public PioDevice
49{
50  private:
51    /** The base address of this device */
52    Addr addr;
53
54    /** The size of mappad from the above address */
55    static const Addr size = 0xff;
56
57    struct tm tm;
58
59    /** In Tsunami RTC only has two i/o ports one for data and one for address,
60     * so you write the address and then read/write the data. This store the
61     * address you are going to be reading from on a read.
62     */
63    uint8_t RTCAddress;
64
65  protected:
66
67    /**
68     * The ClockEvent is handles the PIT interrupts
69     */
70    class ClockEvent : public Event
71    {
72      protected:
73        /** how often the PIT fires */
74        Tick interval;
75        /** The mode of the PIT */
76        uint8_t mode;
77        /** The status of the PIT */
78        uint8_t status;
79
80      public:
81        /**
82         * Just set the mode to 0
83         */
84        ClockEvent();
85
86        /**
87         * processs the timer event
88         */
89        virtual void process();
90
91        /**
92         * Returns a description of this event
93         * @return the description
94         */
95        virtual const char *description();
96
97        /**
98         * Schedule a timer interrupt to occur sometime in the future.
99         */
100        void Program(int count);
101
102        /**
103         * Write the mode bits of the PIT.
104         * @param mode the new mode
105         */
106        void ChangeMode(uint8_t mode);
107
108        /**
109         * The current PIT status.
110         * @return the status of the PIT
111         */
112        uint8_t Status();
113
114        /**
115         * Serialize this object to the given output stream.
116         * @param os The stream to serialize to.
117         */
118        virtual void serialize(std::ostream &os);
119
120
121        /**
122         * Reconstruct the state of this object from a checkpoint.
123         * @param cp The checkpoint use.
124         * @param section The section name of this object
125         */
126        virtual void unserialize(Checkpoint *cp, const std::string &section);
127     };
128
129    /**
130     * Process RTC timer events and generate interrupts appropriately.
131     */
132    class RTCEvent : public Event
133    {
134      protected:
135          /** A pointer back to tsunami to create interrupt the processor. */
136          Tsunami* tsunami;
137      public:
138          /** RTC Event initializes the RTC event by scheduling an event
139           * RTC_RATE times pre second. */
140          RTCEvent(Tsunami* t);
141
142          /**
143           * Interrupth the processor and reschedule the event.
144           * */
145          virtual void process();
146
147          /**
148           * Return a description of this event.
149           * @return a description
150           */
151          virtual const char *description();
152
153          /**
154           * Serialize this object to the given output stream.
155           * @param os The stream to serialize to.
156           */
157          virtual void serialize(std::ostream &os);
158
159
160          /**
161           * Reconstruct the state of this object from a checkpoint.
162           * @param cp The checkpoint use.
163           * @param section The section name of this object
164           */
165          virtual void unserialize(Checkpoint *cp, const std::string &section);
166     };
167
168    /** uip UpdateInProgess says that the rtc is updating, but we just fake it
169     * by alternating it on every read of the bit since we are going to
170     * override the loop_per_jiffy time that it is trying to use the UIP to
171     * calculate.
172     */
173    uint8_t uip;
174
175    /** Mask of the PIC1 */
176    uint8_t mask1;
177
178    /** Mask of the PIC2 */
179    uint8_t mask2;
180
181    /** Mode of PIC1. Not used for anything */
182    uint8_t mode1;
183
184    /** Mode of PIC2. Not used for anything */
185    uint8_t mode2;
186
187    /** Raw PIC interrupt register before masking */
188    uint8_t picr; //Raw PIC interrput register
189
190    /** Is the pic interrupting right now or not. */
191    bool picInterrupting;
192
193    /** A pointer to the Tsunami device which be belong to */
194    Tsunami *tsunami;
195
196    /**
197     * This timer is initilized, but after I wrote the code
198     * it doesn't seem to be used again, and best I can tell
199     * it too is not connected to any interrupt port
200     */
201    ClockEvent timer0;
202
203    /**
204     * This timer is used to control the speaker, which
205     * we normally could care less about, however it is
206     * also used to calculated the clockspeed and hense
207     * bogomips which is kinda important to the scheduler
208     * so we need to implemnt it although after boot I can't
209     * imagine we would be playing with the PC speaker much
210     */
211    ClockEvent timer2;
212
213    /** This is the event used to interrupt the cpu like an RTC.  */
214    RTCEvent rtc;
215
216    /** The interval is set via two writes to the PIT.
217     * This variable contains a flag as to how many writes have happened, and
218     * the time so far.
219     */
220    uint32_t timerData;
221
222
223  public:
224    /**
225     * Return the freqency of the RTC
226     * @return interrupt rate of the RTC
227     */
228    Tick  frequency() const { return RTC_RATE; }
229
230
231    /**
232     * Initialize all the data for devices supported by Tsunami I/O.
233     * @param name name of this device.
234     * @param t pointer back to the Tsunami object that we belong to.
235     * @param init_time Time (as in seconds since 1970) to set RTC to.
236     * @param a address we are mapped at.
237     * @param mmu pointer to the memory controller that sends us events.
238     */
239    TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
240              Addr a, MemoryController *mmu, HierParams *hier, Bus *bus);
241
242    /**
243     * Create the tm struct from seconds since 1970
244     */
245    void set_time(time_t t);
246
247    /**
248      * Process a read to one of the devices we are emulating.
249      * @param req Contains the address to read from.
250      * @param data A pointer to write the read data to.
251      * @return The fault condition of the access.
252      */
253    virtual Fault read(MemReqPtr &req, uint8_t *data);
254
255    /**
256      * Process a write to one of the devices we emulate.
257      * @param req Contains the address to write to.
258      * @param data The data to write.
259      * @return The fault condition of the access.
260      */
261    virtual Fault write(MemReqPtr &req, const uint8_t *data);
262
263    /**
264     * Post an PIC interrupt to the CPU via the CChip
265     * @param bitvector interrupt to post.
266     */
267    void postPIC(uint8_t bitvector);
268
269    /**
270     * Clear a posted interrupt
271     * @param bitvector interrupt to clear
272     */
273    void clearPIC(uint8_t bitvector);
274
275    /**
276     * Serialize this object to the given output stream.
277     * @param os The stream to serialize to.
278     */
279    virtual void serialize(std::ostream &os);
280
281
282    /**
283     * Reconstruct the state of this object from a checkpoint.
284     * @param cp The checkpoint use.
285     * @param section The section name of this object
286     */
287    virtual void unserialize(Checkpoint *cp, const std::string &section);
288
289
290    Tick cacheAccess(MemReqPtr &req);
291};
292
293#endif // __TSUNAMI_IO_HH__
294