tsunami_io.hh revision 4762
12SN/A/* 21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Ali Saidi 292665Ssaidi@eecs.umich.edu * Andrew Schultz 302SN/A * Miguel Serrano 312SN/A */ 325569Snate@binkert.org 335569Snate@binkert.org/** @file 342SN/A * Tsunami I/O Space mapping including RTC/timer interrupts 355569Snate@binkert.org */ 367678Sgblack@eecs.umich.edu 373614Sgblack@eecs.umich.edu#ifndef __DEV_TSUNAMI_IO_HH__ 383614Sgblack@eecs.umich.edu#define __DEV_TSUNAMI_IO_HH__ 392166SN/A 402147SN/A#include "base/range.hh" 415569Snate@binkert.org#include "dev/alpha/tsunami.hh" 422167SN/A#include "dev/io_device.hh" 432147SN/A#include "params/TsunamiIO.hh" 442090SN/A#include "sim/eventq.hh" 452222SN/A 462090SN/A/** 472201SN/A * Tsunami I/O device is a catch all for all the south bridge stuff we care 482201SN/A * to implement. 492201SN/A */ 502112SN/Aclass TsunamiIO : public BasicPioDevice 5110474Sandreas.hansson@arm.com{ 5210417Sandreas.hansson@arm.com private: 5310417Sandreas.hansson@arm.com struct tm tm; 542175SN/A 552222SN/A protected: 562SN/A /** Real-Time Clock (MC146818) */ 572SN/A class RTC 582203SN/A { 592166SN/A private: 602166SN/A /** Event for RTC periodic interrupt */ 612203SN/A struct RTCEvent : public Event 622166SN/A { 632222SN/A /** A pointer back to tsunami to create interrupt the processor. */ 645569Snate@binkert.org Tsunami* tsunami; 652166SN/A Tick interval; 664695Sgblack@eecs.umich.edu 672166SN/A RTCEvent(Tsunami* t, Tick i); 682222SN/A 692166SN/A /** Schedule the RTC periodic interrupt */ 702166SN/A void scheduleIntr(); 712203SN/A 722166SN/A /** Event process to occur at interrupt*/ 732166SN/A virtual void process(); 742203SN/A 752166SN/A /** Event description */ 762222SN/A virtual const char *description(); 775569Snate@binkert.org }; 782166SN/A 794695Sgblack@eecs.umich.edu private: 802166SN/A std::string _name; 812222SN/A const std::string &name() const { return _name; } 824695Sgblack@eecs.umich.edu 832166SN/A /** RTC periodic interrupt event */ 842166SN/A RTCEvent event; 852147SN/A 862090SN/A /** Current RTC register address/index */ 872147SN/A int addr; 882147SN/A 892147SN/A /** Data for real-time clock function */ 902222SN/A union { 915569Snate@binkert.org uint8_t clock_data[10]; 922112SN/A 934695Sgblack@eecs.umich.edu struct { 942147SN/A uint8_t sec; 952222SN/A uint8_t sec_alrm; 962147SN/A uint8_t min; 972090SN/A uint8_t min_alrm; 982147SN/A uint8_t hour; 992090SN/A uint8_t hour_alrm; 1002147SN/A uint8_t wday; 1012147SN/A uint8_t mday; 1022147SN/A uint8_t mon; 1032222SN/A uint8_t year; 1045569Snate@binkert.org }; 1055569Snate@binkert.org }; 1065569Snate@binkert.org 1075569Snate@binkert.org /** RTC status register A */ 1082112SN/A uint8_t stat_regA; 1094695Sgblack@eecs.umich.edu 1102147SN/A /** RTC status register B */ 1112222SN/A uint8_t stat_regB; 11210417Sandreas.hansson@arm.com 11310417Sandreas.hansson@arm.com public: 1142147SN/A RTC(const std::string &name, Tsunami* tsunami, 1152090SN/A const TsunamiIOParams *params); 1162147SN/A 1172090SN/A /** RTC address port: write address of RTC RAM data to access */ 1182147SN/A void writeAddr(const uint8_t data); 1192147SN/A 1202147SN/A /** RTC write data */ 1212222SN/A void writeData(const uint8_t data); 1225569Snate@binkert.org 1235569Snate@binkert.org /** RTC read data */ 1245569Snate@binkert.org uint8_t readData(); 1255569Snate@binkert.org 1262112SN/A /** 1274695Sgblack@eecs.umich.edu * Serialize this object to the given output stream. 1282147SN/A * @param base The base name of the counter object. 1292222SN/A * @param os The stream to serialize to. 1302147SN/A */ 1312090SN/A void serialize(const std::string &base, std::ostream &os); 1322502SN/A 1332502SN/A /** 1344997Sgblack@eecs.umich.edu * Reconstruct the state of this object from a checkpoint. 1355568Snate@binkert.org * @param base The base name of the counter object. 1365736Snate@binkert.org * @param cp The checkpoint use. 1372502SN/A * @param section The section name of this object 1385569Snate@binkert.org */ 1392502SN/A void unserialize(const std::string &base, Checkpoint *cp, 1405736Snate@binkert.org const std::string §ion); 1412502SN/A }; 1422502SN/A 1434695Sgblack@eecs.umich.edu /** Programmable Interval Timer (Intel 8254) */ 1442502SN/A class PITimer 1452502SN/A { 14610417Sandreas.hansson@arm.com /** Counter element for PIT */ 14710417Sandreas.hansson@arm.com class Counter 1482502SN/A { 1492502SN/A /** Event for counter interrupt */ 1502502SN/A class CounterEvent : public Event 1512090SN/A { 1522147SN/A private: 1532147SN/A /** Pointer back to Counter */ 1542147SN/A Counter* counter; 1552222SN/A Tick interval; 1565569Snate@binkert.org 1572112SN/A public: 1585736Snate@binkert.org CounterEvent(Counter*); 1592502SN/A 1602502SN/A /** Event process */ 1614695Sgblack@eecs.umich.edu virtual void process(); 1622147SN/A 1632222SN/A /** Event description */ 16410417Sandreas.hansson@arm.com virtual const char *description(); 16510417Sandreas.hansson@arm.com 1662147SN/A friend class Counter; 1672090SN/A }; 1682502SN/A 1692090SN/A private: 1702147SN/A std::string _name; 1712147SN/A const std::string &name() const { return _name; } 1722147SN/A 1732222SN/A CounterEvent event; 1745569Snate@binkert.org 1752112SN/A /** Current count value */ 1765736Snate@binkert.org uint16_t count; 1772502SN/A 1782502SN/A /** Latched count */ 1794695Sgblack@eecs.umich.edu uint16_t latched_count; 1802147SN/A 1812222SN/A /** Interrupt period */ 1822147SN/A uint16_t period; 1832090SN/A 1842502SN/A /** Current mode of operation */ 1852090SN/A uint8_t mode; 1862147SN/A 1872147SN/A /** Output goes high when the counter reaches zero */ 1882147SN/A bool output_high; 1892222SN/A 1905569Snate@binkert.org /** State of the count latch */ 1912112SN/A bool latch_on; 1925736Snate@binkert.org 1932502SN/A /** Set of values for read_byte and write_byte */ 1942502SN/A enum {LSB, MSB}; 1954695Sgblack@eecs.umich.edu 1962147SN/A /** Determine which byte of a 16-bit count value to read/write */ 1972222SN/A uint8_t read_byte, write_byte; 1982147SN/A 1992090SN/A public: 2002502SN/A Counter(const std::string &name); 2012090SN/A 2022147SN/A /** Latch the current count (if one is not already latched) */ 2032147SN/A void latchCount(); 2042147SN/A 2052222SN/A /** Set the read/write mode */ 2065569Snate@binkert.org void setRW(int rw_val); 2072112SN/A 2085736Snate@binkert.org /** Set operational mode */ 2092502SN/A void setMode(int mode_val); 2102502SN/A 2114695Sgblack@eecs.umich.edu /** Set count encoding */ 2122147SN/A void setBCD(int bcd_val); 2132222SN/A 2142147SN/A /** Read a count byte */ 2152090SN/A uint8_t read(); 2162502SN/A 2172090SN/A /** Write a count byte */ 2182147SN/A void write(const uint8_t data); 2192147SN/A 2202147SN/A /** Is the output high? */ 2212222SN/A bool outputHigh(); 2225569Snate@binkert.org 2232112SN/A /** 2245736Snate@binkert.org * Serialize this object to the given output stream. 2252502SN/A * @param base The base name of the counter object. 2262502SN/A * @param os The stream to serialize to. 2274695Sgblack@eecs.umich.edu */ 2282147SN/A void serialize(const std::string &base, std::ostream &os); 2292222SN/A 2302147SN/A /** 2312090SN/A * Reconstruct the state of this object from a checkpoint. 2322502SN/A * @param base The base name of the counter object. 2332502SN/A * @param cp The checkpoint use. 2344997Sgblack@eecs.umich.edu * @param section The section name of this object 2352502SN/A */ 2365569Snate@binkert.org void unserialize(const std::string &base, Checkpoint *cp, 2372502SN/A const std::string §ion); 2385569Snate@binkert.org }; 2394695Sgblack@eecs.umich.edu 2402505SN/A private: 2412505SN/A std::string _name; 24210417Sandreas.hansson@arm.com const std::string &name() const { return _name; } 24310417Sandreas.hansson@arm.com 2442502SN/A /** PIT has three seperate counters */ 2452502SN/A Counter *counter[3]; 2462502SN/A 2472090SN/A public: 2482147SN/A /** Public way to access individual counters (avoid array accesses) */ 2492147SN/A Counter counter0; 2502147SN/A Counter counter1; 2512222SN/A Counter counter2; 2525569Snate@binkert.org 2532112SN/A PITimer(const std::string &name); 2545569Snate@binkert.org 2554695Sgblack@eecs.umich.edu /** Write control word */ 2562502SN/A void writeControl(const uint8_t data); 2572502SN/A 25810417Sandreas.hansson@arm.com /** 25910417Sandreas.hansson@arm.com * Serialize this object to the given output stream. 2602502SN/A * @param base The base name of the counter object. 2612502SN/A * @param os The stream to serialize to. 2622502SN/A */ 2632502SN/A void serialize(const std::string &base, std::ostream &os); 2642502SN/A 2652502SN/A /** 2662502SN/A * Reconstruct the state of this object from a checkpoint. 2672502SN/A * @param base The base name of the counter object. 2685569Snate@binkert.org * @param cp The checkpoint use. 2692502SN/A * @param section The section name of this object 2705569Snate@binkert.org */ 2714695Sgblack@eecs.umich.edu void unserialize(const std::string &base, Checkpoint *cp, 2722147SN/A const std::string §ion); 2732222SN/A }; 2742147SN/A 2752090SN/A /** Mask of the PIC1 */ 2762147SN/A uint8_t mask1; 2772090SN/A 2782147SN/A /** Mask of the PIC2 */ 2792147SN/A uint8_t mask2; 2802147SN/A 2812222SN/A /** Mode of PIC1. Not used for anything */ 2825569Snate@binkert.org uint8_t mode1; 2832112SN/A 2844695Sgblack@eecs.umich.edu /** Mode of PIC2. Not used for anything */ 2852147SN/A uint8_t mode2; 2862222SN/A 2872147SN/A /** Raw PIC interrupt register before masking */ 2882090SN/A uint8_t picr; //Raw PIC interrput register 2892147SN/A 2902090SN/A /** Is the pic interrupting right now or not. */ 2912147SN/A bool picInterrupting; 2922147SN/A 2932147SN/A /** A pointer to the Tsunami device which be belong to */ 2942222SN/A Tsunami *tsunami; 2955569Snate@binkert.org 2962112SN/A /** Intel 8253 Periodic Interval Timer */ 2974695Sgblack@eecs.umich.edu PITimer pitimer; 2982147SN/A 2992222SN/A RTC rtc; 3002147SN/A 3012090SN/A /** The interval is set via two writes to the PIT. 3022147SN/A * This variable contains a flag as to how many writes have happened, and 3032090SN/A * the time so far. 3042147SN/A */ 3052147SN/A uint16_t timerData; 3062147SN/A 3072222SN/A public: 3085569Snate@binkert.org /** 3095569Snate@binkert.org * Return the freqency of the RTC 3105569Snate@binkert.org * @return interrupt rate of the RTC 3115569Snate@binkert.org */ 3122112SN/A Tick frequency() const; 3134695Sgblack@eecs.umich.edu 3142147SN/A public: 3152222SN/A typedef TsunamiIOParams Params; 3162147SN/A /** 3172090SN/A * Initialize all the data for devices supported by Tsunami I/O. 3182147SN/A * @param p pointer to Params struct 3192090SN/A */ 3202147SN/A TsunamiIO(const Params *p); 3212147SN/A 3222147SN/A const Params * 3232222SN/A params() const 3245569Snate@binkert.org { 3252112SN/A return dynamic_cast<const Params *>(_params); 3264695Sgblack@eecs.umich.edu } 3272147SN/A 3282222SN/A virtual Tick read(PacketPtr pkt); 3292147SN/A virtual Tick write(PacketPtr pkt); 3302090SN/A 3315569Snate@binkert.org /** 3322167SN/A * Post an PIC interrupt to the CPU via the CChip 3335569Snate@binkert.org * @param bitvector interrupt to post. 334 */ 335 void postPIC(uint8_t bitvector); 336 337 /** 338 * Clear a posted interrupt 339 * @param bitvector interrupt to clear 340 */ 341 void clearPIC(uint8_t bitvector); 342 343 /** 344 * Serialize this object to the given output stream. 345 * @param os The stream to serialize to. 346 */ 347 virtual void serialize(std::ostream &os); 348 349 /** 350 * Reconstruct the state of this object from a checkpoint. 351 * @param cp The checkpoint use. 352 * @param section The section name of this object 353 */ 354 virtual void unserialize(Checkpoint *cp, const std::string §ion); 355 356}; 357 358#endif // __DEV_TSUNAMI_IO_HH__ 359