tsunami_io.hh revision 4762
1768SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3768SN/A * All rights reserved.
4768SN/A *
5768SN/A * Redistribution and use in source and binary forms, with or without
6768SN/A * modification, are permitted provided that the following conditions are
7768SN/A * met: redistributions of source code must retain the above copyright
8768SN/A * notice, this list of conditions and the following disclaimer;
9768SN/A * redistributions in binary form must reproduce the above copyright
10768SN/A * notice, this list of conditions and the following disclaimer in the
11768SN/A * documentation and/or other materials provided with the distribution;
12768SN/A * neither the name of the copyright holders nor the names of its
13768SN/A * contributors may be used to endorse or promote products derived from
14768SN/A * this software without specific prior written permission.
15768SN/A *
16768SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17768SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18768SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19768SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20768SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21768SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22768SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23768SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24768SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25768SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26768SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665SN/A *
282665SN/A * Authors: Ali Saidi
292665SN/A *          Andrew Schultz
302665SN/A *          Miguel Serrano
31768SN/A */
32768SN/A
331722SN/A/** @file
341722SN/A * Tsunami I/O Space mapping including RTC/timer interrupts
35768SN/A */
36768SN/A
371401SN/A#ifndef __DEV_TSUNAMI_IO_HH__
381401SN/A#define __DEV_TSUNAMI_IO_HH__
39768SN/A
40909SN/A#include "base/range.hh"
413540Sgblack@eecs.umich.edu#include "dev/alpha/tsunami.hh"
424762Snate@binkert.org#include "dev/io_device.hh"
434762Snate@binkert.org#include "params/TsunamiIO.hh"
44932SN/A#include "sim/eventq.hh"
45768SN/A
461722SN/A/**
47885SN/A * Tsunami I/O device is a catch all for all the south bridge stuff we care
48885SN/A * to implement.
49768SN/A */
502542SN/Aclass TsunamiIO : public BasicPioDevice
51768SN/A{
52809SN/A  private:
53773SN/A    struct tm tm;
54773SN/A
55768SN/A  protected:
561854SN/A    /** Real-Time Clock (MC146818) */
571854SN/A    class RTC
581854SN/A    {
591854SN/A      private:
601854SN/A        /** Event for RTC periodic interrupt */
611854SN/A        struct RTCEvent : public Event
621854SN/A        {
631854SN/A            /** A pointer back to tsunami to create interrupt the processor. */
641854SN/A            Tsunami* tsunami;
651854SN/A            Tick interval;
66768SN/A
671854SN/A            RTCEvent(Tsunami* t, Tick i);
681817SN/A
691854SN/A            /** Schedule the RTC periodic interrupt */
701854SN/A            void scheduleIntr();
711817SN/A
721854SN/A            /** Event process to occur at interrupt*/
731854SN/A            virtual void process();
741817SN/A
751854SN/A            /** Event description */
761854SN/A            virtual const char *description();
771854SN/A        };
781817SN/A
791817SN/A      private:
801854SN/A        std::string _name;
811854SN/A        const std::string &name() const { return _name; }
821854SN/A
831817SN/A        /** RTC periodic interrupt event */
841817SN/A        RTCEvent event;
851817SN/A
861817SN/A        /** Current RTC register address/index */
871817SN/A        int addr;
881817SN/A
891817SN/A        /** Data for real-time clock function */
901817SN/A        union {
911817SN/A            uint8_t clock_data[10];
921817SN/A
931817SN/A            struct {
941817SN/A                uint8_t sec;
951817SN/A                uint8_t sec_alrm;
961817SN/A                uint8_t min;
971817SN/A                uint8_t min_alrm;
981817SN/A                uint8_t hour;
991817SN/A                uint8_t hour_alrm;
1001817SN/A                uint8_t wday;
1011817SN/A                uint8_t mday;
1021817SN/A                uint8_t mon;
1031817SN/A                uint8_t year;
1041817SN/A            };
1051817SN/A        };
1061817SN/A
1071817SN/A        /** RTC status register A */
1081817SN/A        uint8_t stat_regA;
1091817SN/A
1101817SN/A        /** RTC status register B */
1111817SN/A        uint8_t stat_regB;
112771SN/A
113803SN/A      public:
1143932Sbinkertn@umich.edu        RTC(const std::string &name, Tsunami* tsunami,
1154762Snate@binkert.org            const TsunamiIOParams *params);
1161817SN/A
1171817SN/A        /** RTC address port: write address of RTC RAM data to access */
1182539SN/A        void writeAddr(const uint8_t data);
1191817SN/A
1201817SN/A        /** RTC write data */
1212539SN/A        void writeData(const uint8_t data);
1221817SN/A
1231817SN/A        /** RTC read data */
1242648SN/A        uint8_t readData();
125771SN/A
126885SN/A        /**
1271817SN/A          * Serialize this object to the given output stream.
1282982SN/A          * @param base The base name of the counter object.
1291817SN/A          * @param os The stream to serialize to.
1301817SN/A          */
1311854SN/A        void serialize(const std::string &base, std::ostream &os);
132918SN/A
133918SN/A        /**
134918SN/A         * Reconstruct the state of this object from a checkpoint.
1352982SN/A          * @param base The base name of the counter object.
136918SN/A         * @param cp The checkpoint use.
137918SN/A         * @param section The section name of this object
138918SN/A         */
1391854SN/A        void unserialize(const std::string &base, Checkpoint *cp,
1401854SN/A                         const std::string &section);
1411817SN/A    };
142771SN/A
1431817SN/A    /** Programmable Interval Timer (Intel 8254) */
1441854SN/A    class PITimer
145772SN/A    {
1461817SN/A        /** Counter element for PIT */
1471854SN/A        class Counter
1481817SN/A        {
1491817SN/A            /** Event for counter interrupt */
1501817SN/A            class CounterEvent : public Event
1511817SN/A            {
1521817SN/A              private:
1531817SN/A                /** Pointer back to Counter */
1541817SN/A                Counter* counter;
1551817SN/A                Tick interval;
1561817SN/A
1571817SN/A              public:
1581817SN/A                CounterEvent(Counter*);
1591817SN/A
1601817SN/A                /** Event process */
1611817SN/A                virtual void process();
1621817SN/A
1631817SN/A                /** Event description */
1641817SN/A                virtual const char *description();
1651817SN/A
1661817SN/A                friend class Counter;
1671817SN/A            };
1681817SN/A
1691817SN/A          private:
1701854SN/A            std::string _name;
1711854SN/A            const std::string &name() const { return _name; }
1721854SN/A
1731817SN/A            CounterEvent event;
1741817SN/A
1751817SN/A            /** Current count value */
1761817SN/A            uint16_t count;
1771817SN/A
1781817SN/A            /** Latched count */
1791817SN/A            uint16_t latched_count;
1801817SN/A
1811817SN/A            /** Interrupt period */
1821817SN/A            uint16_t period;
1831817SN/A
1841817SN/A            /** Current mode of operation */
1851817SN/A            uint8_t mode;
1861817SN/A
1871817SN/A            /** Output goes high when the counter reaches zero */
1881817SN/A            bool output_high;
1891817SN/A
1901817SN/A            /** State of the count latch */
1911817SN/A            bool latch_on;
1921817SN/A
1931817SN/A            /** Set of values for read_byte and write_byte */
1941817SN/A            enum {LSB, MSB};
1951817SN/A
1961817SN/A            /** Determine which byte of a 16-bit count value to read/write */
1971817SN/A            uint8_t read_byte, write_byte;
1981817SN/A
1991817SN/A          public:
2001854SN/A            Counter(const std::string &name);
2011817SN/A
2021817SN/A            /** Latch the current count (if one is not already latched) */
2031817SN/A            void latchCount();
2041817SN/A
2051817SN/A            /** Set the read/write mode */
2061817SN/A            void setRW(int rw_val);
2071817SN/A
2081817SN/A            /** Set operational mode */
2091817SN/A            void setMode(int mode_val);
2101817SN/A
2111817SN/A            /** Set count encoding */
2121817SN/A            void setBCD(int bcd_val);
2131817SN/A
2141817SN/A            /** Read a count byte */
2152648SN/A            uint8_t read();
2161817SN/A
2171817SN/A            /** Write a count byte */
2182539SN/A            void write(const uint8_t data);
2191817SN/A
2201817SN/A            /** Is the output high? */
2211817SN/A            bool outputHigh();
2221817SN/A
2231817SN/A            /**
2241817SN/A             * Serialize this object to the given output stream.
2252982SN/A             * @param base The base name of the counter object.
2262982SN/A             * @param os   The stream to serialize to.
2271817SN/A             */
2281854SN/A            void serialize(const std::string &base, std::ostream &os);
2291817SN/A
2301817SN/A            /**
2311817SN/A             * Reconstruct the state of this object from a checkpoint.
2322982SN/A             * @param base The base name of the counter object.
2331817SN/A             * @param cp The checkpoint use.
2341817SN/A             * @param section The section name of this object
2351817SN/A             */
2361854SN/A            void unserialize(const std::string &base, Checkpoint *cp,
2371854SN/A                             const std::string &section);
2381817SN/A        };
2391817SN/A
2401817SN/A      private:
2411854SN/A        std::string _name;
2421854SN/A        const std::string &name() const { return _name; }
2431854SN/A
2441817SN/A        /** PIT has three seperate counters */
2451854SN/A        Counter *counter[3];
2461634SN/A
247772SN/A      public:
2481817SN/A        /** Public way to access individual counters (avoid array accesses) */
2491854SN/A        Counter counter0;
2501854SN/A        Counter counter1;
2511854SN/A        Counter counter2;
252772SN/A
2531854SN/A        PITimer(const std::string &name);
254885SN/A
2551817SN/A        /** Write control word */
2562539SN/A        void writeControl(const uint8_t data);
257909SN/A
2581401SN/A        /**
2591401SN/A         * Serialize this object to the given output stream.
2602982SN/A         * @param base The base name of the counter object.
2611401SN/A         * @param os The stream to serialize to.
2621401SN/A         */
2631854SN/A        void serialize(const std::string &base, std::ostream &os);
264918SN/A
2651401SN/A        /**
2661401SN/A         * Reconstruct the state of this object from a checkpoint.
2672982SN/A         * @param base The base name of the counter object.
2681401SN/A         * @param cp The checkpoint use.
2691401SN/A         * @param section The section name of this object
2701401SN/A         */
2711854SN/A        void unserialize(const std::string &base, Checkpoint *cp,
2721854SN/A                         const std::string &section);
2731401SN/A    };
274771SN/A
275885SN/A    /** Mask of the PIC1 */
276803SN/A    uint8_t mask1;
277885SN/A
278885SN/A    /** Mask of the PIC2 */
279803SN/A    uint8_t mask2;
280885SN/A
281885SN/A    /** Mode of PIC1. Not used for anything */
282803SN/A    uint8_t mode1;
283885SN/A
284885SN/A    /** Mode of PIC2. Not used for anything */
285803SN/A    uint8_t mode2;
286769SN/A
287885SN/A    /** Raw PIC interrupt register before masking */
288885SN/A    uint8_t picr; //Raw PIC interrput register
289885SN/A
290885SN/A    /** Is the pic interrupting right now or not. */
291777SN/A    bool picInterrupting;
292777SN/A
293885SN/A    /** A pointer to the Tsunami device which be belong to */
294775SN/A    Tsunami *tsunami;
295775SN/A
2961817SN/A    /** Intel 8253 Periodic Interval Timer */
2971817SN/A    PITimer pitimer;
298773SN/A
2991817SN/A    RTC rtc;
300773SN/A
301885SN/A    /** The interval is set via two writes to the PIT.
302885SN/A     * This variable contains a flag as to how many writes have happened, and
303885SN/A     * the time so far.
304885SN/A     */
3051817SN/A    uint16_t timerData;
306771SN/A
307768SN/A  public:
308891SN/A    /**
309891SN/A     * Return the freqency of the RTC
310891SN/A     * @return interrupt rate of the RTC
311891SN/A     */
3121634SN/A    Tick frequency() const;
313775SN/A
3142539SN/A  public:
3154762Snate@binkert.org    typedef TsunamiIOParams Params;
316885SN/A    /**
317885SN/A     * Initialize all the data for devices supported by Tsunami I/O.
3182539SN/A     * @param p pointer to Params struct
319885SN/A     */
3204762Snate@binkert.org    TsunamiIO(const Params *p);
3214762Snate@binkert.org
3224762Snate@binkert.org    const Params *
3234762Snate@binkert.org    params() const
3244762Snate@binkert.org    {
3254762Snate@binkert.org        return dynamic_cast<const Params *>(_params);
3264762Snate@binkert.org    }
327768SN/A
3283349SN/A    virtual Tick read(PacketPtr pkt);
3293349SN/A    virtual Tick write(PacketPtr pkt);
330768SN/A
331885SN/A    /**
332885SN/A     * Post an PIC interrupt to the CPU via the CChip
333885SN/A     * @param bitvector interrupt to post.
334885SN/A     */
335777SN/A    void postPIC(uint8_t bitvector);
336885SN/A
337885SN/A    /**
338885SN/A     * Clear a posted interrupt
339885SN/A     * @param bitvector interrupt to clear
340885SN/A     */
341777SN/A    void clearPIC(uint8_t bitvector);
342777SN/A
343885SN/A    /**
344885SN/A     * Serialize this object to the given output stream.
345885SN/A     * @param os The stream to serialize to.
346885SN/A     */
347768SN/A    virtual void serialize(std::ostream &os);
348885SN/A
349885SN/A    /**
350885SN/A     * Reconstruct the state of this object from a checkpoint.
351885SN/A     * @param cp The checkpoint use.
352885SN/A     * @param section The section name of this object
353885SN/A     */
354768SN/A    virtual void unserialize(Checkpoint *cp, const std::string &section);
355909SN/A
356768SN/A};
357768SN/A
3581401SN/A#endif // __DEV_TSUNAMI_IO_HH__
359