tsunami_io.hh revision 2542
110152Satgutier@umich.edu/* 210152Satgutier@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan 310152Satgutier@umich.edu * All rights reserved. 410152Satgutier@umich.edu * 510234Syasuko.eckert@amd.com * Redistribution and use in source and binary forms, with or without 610152Satgutier@umich.edu * modification, are permitted provided that the following conditions are 710152Satgutier@umich.edu * met: redistributions of source code must retain the above copyright 810152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer; 910152Satgutier@umich.edu * redistributions in binary form must reproduce the above copyright 1010152Satgutier@umich.edu * notice, this list of conditions and the following disclaimer in the 1110152Satgutier@umich.edu * documentation and/or other materials provided with the distribution; 1210152Satgutier@umich.edu * neither the name of the copyright holders nor the names of its 1310152Satgutier@umich.edu * contributors may be used to endorse or promote products derived from 1410152Satgutier@umich.edu * this software without specific prior written permission. 1510152Satgutier@umich.edu * 1610152Satgutier@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710152Satgutier@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810152Satgutier@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910152Satgutier@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010152Satgutier@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110152Satgutier@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210152Satgutier@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310152Satgutier@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410152Satgutier@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510152Satgutier@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610152Satgutier@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710152Satgutier@umich.edu */ 2810152Satgutier@umich.edu 2910234Syasuko.eckert@amd.com/** @file 3010152Satgutier@umich.edu * Tsunami I/O Space mapping including RTC/timer interrupts 3110152Satgutier@umich.edu */ 3210152Satgutier@umich.edu 3310152Satgutier@umich.edu#ifndef __DEV_TSUNAMI_IO_HH__ 3410152Satgutier@umich.edu#define __DEV_TSUNAMI_IO_HH__ 3510152Satgutier@umich.edu 3610152Satgutier@umich.edu#include "dev/io_device.hh" 3710152Satgutier@umich.edu#include "base/range.hh" 3810152Satgutier@umich.edu#include "dev/tsunami.hh" 3910152Satgutier@umich.edu#include "sim/eventq.hh" 4010152Satgutier@umich.edu 4110152Satgutier@umich.edu/** 4210152Satgutier@umich.edu * Tsunami I/O device is a catch all for all the south bridge stuff we care 4310152Satgutier@umich.edu * to implement. 4410152Satgutier@umich.edu */ 4510152Satgutier@umich.educlass TsunamiIO : public BasicPioDevice 4610152Satgutier@umich.edu{ 4710152Satgutier@umich.edu private: 4810152Satgutier@umich.edu struct tm tm; 4910152Satgutier@umich.edu 5010152Satgutier@umich.edu protected: 5110152Satgutier@umich.edu /** Real-Time Clock (MC146818) */ 5210152Satgutier@umich.edu class RTC 5310234Syasuko.eckert@amd.com { 5410234Syasuko.eckert@amd.com private: 5510234Syasuko.eckert@amd.com /** Event for RTC periodic interrupt */ 5610234Syasuko.eckert@amd.com struct RTCEvent : public Event 5710234Syasuko.eckert@amd.com { 5810234Syasuko.eckert@amd.com /** A pointer back to tsunami to create interrupt the processor. */ 5910152Satgutier@umich.edu Tsunami* tsunami; 6010234Syasuko.eckert@amd.com Tick interval; 6110234Syasuko.eckert@amd.com 6210234Syasuko.eckert@amd.com RTCEvent(Tsunami* t, Tick i); 6310152Satgutier@umich.edu 6410152Satgutier@umich.edu /** Schedule the RTC periodic interrupt */ 6510234Syasuko.eckert@amd.com void scheduleIntr(); 6610152Satgutier@umich.edu 6710234Syasuko.eckert@amd.com /** Event process to occur at interrupt*/ 6810234Syasuko.eckert@amd.com virtual void process(); 6910234Syasuko.eckert@amd.com 7010234Syasuko.eckert@amd.com /** Event description */ 7110152Satgutier@umich.edu virtual const char *description(); 7210234Syasuko.eckert@amd.com }; 7310234Syasuko.eckert@amd.com 7410234Syasuko.eckert@amd.com private: 7510234Syasuko.eckert@amd.com std::string _name; 7610152Satgutier@umich.edu const std::string &name() const { return _name; } 7710234Syasuko.eckert@amd.com 7810234Syasuko.eckert@amd.com /** RTC periodic interrupt event */ 7910234Syasuko.eckert@amd.com RTCEvent event; 8010234Syasuko.eckert@amd.com 8110152Satgutier@umich.edu /** Current RTC register address/index */ 8210234Syasuko.eckert@amd.com int addr; 8310234Syasuko.eckert@amd.com 8410234Syasuko.eckert@amd.com /** Data for real-time clock function */ 8510234Syasuko.eckert@amd.com union { 8610152Satgutier@umich.edu uint8_t clock_data[10]; 8710234Syasuko.eckert@amd.com 8810234Syasuko.eckert@amd.com struct { 8910234Syasuko.eckert@amd.com uint8_t sec; 9010234Syasuko.eckert@amd.com uint8_t sec_alrm; 9110152Satgutier@umich.edu uint8_t min; 9210234Syasuko.eckert@amd.com uint8_t min_alrm; 9310234Syasuko.eckert@amd.com uint8_t hour; 9410234Syasuko.eckert@amd.com uint8_t hour_alrm; 9510234Syasuko.eckert@amd.com uint8_t wday; 9610152Satgutier@umich.edu uint8_t mday; 9710234Syasuko.eckert@amd.com uint8_t mon; 9810234Syasuko.eckert@amd.com uint8_t year; 9910234Syasuko.eckert@amd.com }; 10010234Syasuko.eckert@amd.com }; 10110152Satgutier@umich.edu 10210234Syasuko.eckert@amd.com /** RTC status register A */ 10310234Syasuko.eckert@amd.com uint8_t stat_regA; 10410234Syasuko.eckert@amd.com 10510234Syasuko.eckert@amd.com /** RTC status register B */ 10610152Satgutier@umich.edu uint8_t stat_regB; 10710234Syasuko.eckert@amd.com 10810234Syasuko.eckert@amd.com public: 10910234Syasuko.eckert@amd.com RTC(const std::string &name, Tsunami* t, Tick i); 11010234Syasuko.eckert@amd.com 11110152Satgutier@umich.edu /** Set the initial RTC time/date */ 11210234Syasuko.eckert@amd.com void set_time(time_t t); 11310234Syasuko.eckert@amd.com 11410234Syasuko.eckert@amd.com /** RTC address port: write address of RTC RAM data to access */ 11510234Syasuko.eckert@amd.com void writeAddr(const uint8_t data); 11610234Syasuko.eckert@amd.com 11710152Satgutier@umich.edu /** RTC write data */ 11810234Syasuko.eckert@amd.com void writeData(const uint8_t data); 11910234Syasuko.eckert@amd.com 12010234Syasuko.eckert@amd.com /** RTC read data */ 12110234Syasuko.eckert@amd.com void readData(uint8_t *data); 12210152Satgutier@umich.edu 12310234Syasuko.eckert@amd.com /** 12410234Syasuko.eckert@amd.com * Serialize this object to the given output stream. 12510234Syasuko.eckert@amd.com * @param os The stream to serialize to. 12610234Syasuko.eckert@amd.com */ 12710152Satgutier@umich.edu void serialize(const std::string &base, std::ostream &os); 12810234Syasuko.eckert@amd.com 12910234Syasuko.eckert@amd.com /** 13010234Syasuko.eckert@amd.com * Reconstruct the state of this object from a checkpoint. 13110234Syasuko.eckert@amd.com * @param cp The checkpoint use. 13210234Syasuko.eckert@amd.com * @param section The section name of this object 13310152Satgutier@umich.edu */ 13410234Syasuko.eckert@amd.com void unserialize(const std::string &base, Checkpoint *cp, 13510234Syasuko.eckert@amd.com const std::string §ion); 13610234Syasuko.eckert@amd.com }; 13710234Syasuko.eckert@amd.com 13810152Satgutier@umich.edu /** Programmable Interval Timer (Intel 8254) */ 13910234Syasuko.eckert@amd.com class PITimer 14010234Syasuko.eckert@amd.com { 14110234Syasuko.eckert@amd.com /** Counter element for PIT */ 14210234Syasuko.eckert@amd.com class Counter 14310152Satgutier@umich.edu { 14410234Syasuko.eckert@amd.com /** Event for counter interrupt */ 14510234Syasuko.eckert@amd.com class CounterEvent : public Event 14610152Satgutier@umich.edu { 14710234Syasuko.eckert@amd.com private: 14810234Syasuko.eckert@amd.com /** Pointer back to Counter */ 14910234Syasuko.eckert@amd.com Counter* counter; 15010234Syasuko.eckert@amd.com Tick interval; 15110234Syasuko.eckert@amd.com 15210152Satgutier@umich.edu public: 15310234Syasuko.eckert@amd.com CounterEvent(Counter*); 15410234Syasuko.eckert@amd.com 15510234Syasuko.eckert@amd.com /** Event process */ 15610234Syasuko.eckert@amd.com virtual void process(); 15710234Syasuko.eckert@amd.com 15810152Satgutier@umich.edu /** Event description */ 15910234Syasuko.eckert@amd.com virtual const char *description(); 16010234Syasuko.eckert@amd.com 16110234Syasuko.eckert@amd.com friend class Counter; 16210234Syasuko.eckert@amd.com }; 16310234Syasuko.eckert@amd.com 16410152Satgutier@umich.edu private: 16510234Syasuko.eckert@amd.com std::string _name; 16610234Syasuko.eckert@amd.com const std::string &name() const { return _name; } 16710234Syasuko.eckert@amd.com 16810234Syasuko.eckert@amd.com CounterEvent event; 16910234Syasuko.eckert@amd.com 17010234Syasuko.eckert@amd.com /** Current count value */ 17110234Syasuko.eckert@amd.com uint16_t count; 17210234Syasuko.eckert@amd.com 17310152Satgutier@umich.edu /** Latched count */ 17410234Syasuko.eckert@amd.com uint16_t latched_count; 17510234Syasuko.eckert@amd.com 17610234Syasuko.eckert@amd.com /** Interrupt period */ 17710234Syasuko.eckert@amd.com uint16_t period; 17810234Syasuko.eckert@amd.com 17910234Syasuko.eckert@amd.com /** Current mode of operation */ 18010234Syasuko.eckert@amd.com uint8_t mode; 18110234Syasuko.eckert@amd.com 18210234Syasuko.eckert@amd.com /** Output goes high when the counter reaches zero */ 18310152Satgutier@umich.edu bool output_high; 18410152Satgutier@umich.edu 18510234Syasuko.eckert@amd.com /** State of the count latch */ 18610234Syasuko.eckert@amd.com bool latch_on; 18710234Syasuko.eckert@amd.com 18810234Syasuko.eckert@amd.com /** Set of values for read_byte and write_byte */ 18910234Syasuko.eckert@amd.com enum {LSB, MSB}; 19010234Syasuko.eckert@amd.com 19110152Satgutier@umich.edu /** Determine which byte of a 16-bit count value to read/write */ 19210234Syasuko.eckert@amd.com uint8_t read_byte, write_byte; 19310234Syasuko.eckert@amd.com 19410234Syasuko.eckert@amd.com public: 19510234Syasuko.eckert@amd.com Counter(const std::string &name); 19610234Syasuko.eckert@amd.com 19710234Syasuko.eckert@amd.com /** Latch the current count (if one is not already latched) */ 19810234Syasuko.eckert@amd.com void latchCount(); 19910234Syasuko.eckert@amd.com 20010234Syasuko.eckert@amd.com /** Set the read/write mode */ 20110234Syasuko.eckert@amd.com void setRW(int rw_val); 20210234Syasuko.eckert@amd.com 20310234Syasuko.eckert@amd.com /** Set operational mode */ 20410234Syasuko.eckert@amd.com void setMode(int mode_val); 20510234Syasuko.eckert@amd.com 20610152Satgutier@umich.edu /** Set count encoding */ 20710234Syasuko.eckert@amd.com void setBCD(int bcd_val); 20810234Syasuko.eckert@amd.com 20910234Syasuko.eckert@amd.com /** Read a count byte */ 21010152Satgutier@umich.edu void read(uint8_t *data); 21110234Syasuko.eckert@amd.com 21210234Syasuko.eckert@amd.com /** Write a count byte */ 21310234Syasuko.eckert@amd.com void write(const uint8_t data); 21410234Syasuko.eckert@amd.com 21510234Syasuko.eckert@amd.com /** Is the output high? */ 21610234Syasuko.eckert@amd.com bool outputHigh(); 21710234Syasuko.eckert@amd.com 21810234Syasuko.eckert@amd.com /** 21910234Syasuko.eckert@amd.com * Serialize this object to the given output stream. 22010234Syasuko.eckert@amd.com * @param os The stream to serialize to. 22110234Syasuko.eckert@amd.com */ 22210234Syasuko.eckert@amd.com void serialize(const std::string &base, std::ostream &os); 22310234Syasuko.eckert@amd.com 22410234Syasuko.eckert@amd.com /** 22510234Syasuko.eckert@amd.com * Reconstruct the state of this object from a checkpoint. 22610234Syasuko.eckert@amd.com * @param cp The checkpoint use. 22710152Satgutier@umich.edu * @param section The section name of this object 22810234Syasuko.eckert@amd.com */ 22910234Syasuko.eckert@amd.com void unserialize(const std::string &base, Checkpoint *cp, 23010152Satgutier@umich.edu const std::string §ion); 23110234Syasuko.eckert@amd.com }; 23210234Syasuko.eckert@amd.com 23310234Syasuko.eckert@amd.com private: 23410234Syasuko.eckert@amd.com std::string _name; 23510234Syasuko.eckert@amd.com const std::string &name() const { return _name; } 23610234Syasuko.eckert@amd.com 23710234Syasuko.eckert@amd.com /** PIT has three seperate counters */ 23810234Syasuko.eckert@amd.com Counter *counter[3]; 23910234Syasuko.eckert@amd.com 24010234Syasuko.eckert@amd.com public: 24110234Syasuko.eckert@amd.com /** Public way to access individual counters (avoid array accesses) */ 24210234Syasuko.eckert@amd.com Counter counter0; 24310152Satgutier@umich.edu Counter counter1; 24410234Syasuko.eckert@amd.com Counter counter2; 24510234Syasuko.eckert@amd.com 24610152Satgutier@umich.edu PITimer(const std::string &name); 24710234Syasuko.eckert@amd.com 24810234Syasuko.eckert@amd.com /** Write control word */ 24910234Syasuko.eckert@amd.com void writeControl(const uint8_t data); 25010234Syasuko.eckert@amd.com 25110234Syasuko.eckert@amd.com /** 25210234Syasuko.eckert@amd.com * Serialize this object to the given output stream. 25310234Syasuko.eckert@amd.com * @param os The stream to serialize to. 25410234Syasuko.eckert@amd.com */ 25510234Syasuko.eckert@amd.com void serialize(const std::string &base, std::ostream &os); 25610234Syasuko.eckert@amd.com 25710234Syasuko.eckert@amd.com /** 25810234Syasuko.eckert@amd.com * Reconstruct the state of this object from a checkpoint. 25910234Syasuko.eckert@amd.com * @param cp The checkpoint use. 26010234Syasuko.eckert@amd.com * @param section The section name of this object 26110234Syasuko.eckert@amd.com */ 26210234Syasuko.eckert@amd.com void unserialize(const std::string &base, Checkpoint *cp, 26310152Satgutier@umich.edu const std::string §ion); 26410234Syasuko.eckert@amd.com }; 26510234Syasuko.eckert@amd.com 26610152Satgutier@umich.edu /** Mask of the PIC1 */ 26710234Syasuko.eckert@amd.com uint8_t mask1; 26810234Syasuko.eckert@amd.com 26910234Syasuko.eckert@amd.com /** Mask of the PIC2 */ 27010234Syasuko.eckert@amd.com uint8_t mask2; 27110234Syasuko.eckert@amd.com 27210234Syasuko.eckert@amd.com /** Mode of PIC1. Not used for anything */ 27310234Syasuko.eckert@amd.com uint8_t mode1; 27410234Syasuko.eckert@amd.com 27510234Syasuko.eckert@amd.com /** Mode of PIC2. Not used for anything */ 27610234Syasuko.eckert@amd.com uint8_t mode2; 27710234Syasuko.eckert@amd.com 27810234Syasuko.eckert@amd.com /** Raw PIC interrupt register before masking */ 27910234Syasuko.eckert@amd.com uint8_t picr; //Raw PIC interrput register 28010234Syasuko.eckert@amd.com 28110234Syasuko.eckert@amd.com /** Is the pic interrupting right now or not. */ 28210234Syasuko.eckert@amd.com bool picInterrupting; 28310234Syasuko.eckert@amd.com 28410234Syasuko.eckert@amd.com /** A pointer to the Tsunami device which be belong to */ 28510234Syasuko.eckert@amd.com Tsunami *tsunami; 28610152Satgutier@umich.edu 28710234Syasuko.eckert@amd.com /** Intel 8253 Periodic Interval Timer */ 28810234Syasuko.eckert@amd.com PITimer pitimer; 28910234Syasuko.eckert@amd.com 29010234Syasuko.eckert@amd.com RTC rtc; 29110234Syasuko.eckert@amd.com 29210234Syasuko.eckert@amd.com /** The interval is set via two writes to the PIT. 29310234Syasuko.eckert@amd.com * This variable contains a flag as to how many writes have happened, and 29410152Satgutier@umich.edu * the time so far. 29510234Syasuko.eckert@amd.com */ 29610234Syasuko.eckert@amd.com uint16_t timerData; 29710152Satgutier@umich.edu 29810234Syasuko.eckert@amd.com public: 29910234Syasuko.eckert@amd.com /** 30010234Syasuko.eckert@amd.com * Return the freqency of the RTC 30110234Syasuko.eckert@amd.com * @return interrupt rate of the RTC 30210234Syasuko.eckert@amd.com */ 30310234Syasuko.eckert@amd.com Tick frequency() const; 30410234Syasuko.eckert@amd.com 30510234Syasuko.eckert@amd.com struct Params : public BasicPioDevice::Params 30610152Satgutier@umich.edu { 30710234Syasuko.eckert@amd.com Tick frequency; 30810234Syasuko.eckert@amd.com Tsunami *tsunami; 30910234Syasuko.eckert@amd.com time_t init_time; 31010234Syasuko.eckert@amd.com }; 31110234Syasuko.eckert@amd.com protected: 31210234Syasuko.eckert@amd.com const Params *params() const { return (const Params*)_params; } 31310234Syasuko.eckert@amd.com 31410152Satgutier@umich.edu public: 31510234Syasuko.eckert@amd.com /** 31610234Syasuko.eckert@amd.com * Initialize all the data for devices supported by Tsunami I/O. 31710234Syasuko.eckert@amd.com * @param p pointer to Params struct 31810234Syasuko.eckert@amd.com */ 31910234Syasuko.eckert@amd.com TsunamiIO(Params *p); 32010234Syasuko.eckert@amd.com 32110234Syasuko.eckert@amd.com virtual Tick read(Packet &pkt); 32210152Satgutier@umich.edu virtual Tick write(Packet &pkt); 32310234Syasuko.eckert@amd.com 32410234Syasuko.eckert@amd.com /** 32510152Satgutier@umich.edu * Post an PIC interrupt to the CPU via the CChip 32610234Syasuko.eckert@amd.com * @param bitvector interrupt to post. 32710234Syasuko.eckert@amd.com */ 32810234Syasuko.eckert@amd.com void postPIC(uint8_t bitvector); 32910234Syasuko.eckert@amd.com 33010234Syasuko.eckert@amd.com /** 33110234Syasuko.eckert@amd.com * Clear a posted interrupt 33210234Syasuko.eckert@amd.com * @param bitvector interrupt to clear 33310152Satgutier@umich.edu */ 33410234Syasuko.eckert@amd.com void clearPIC(uint8_t bitvector); 33510234Syasuko.eckert@amd.com 33610152Satgutier@umich.edu /** 33710234Syasuko.eckert@amd.com * Serialize this object to the given output stream. 33810234Syasuko.eckert@amd.com * @param os The stream to serialize to. 33910234Syasuko.eckert@amd.com */ 34010234Syasuko.eckert@amd.com virtual void serialize(std::ostream &os); 34110234Syasuko.eckert@amd.com 34210152Satgutier@umich.edu /** 34310234Syasuko.eckert@amd.com * Reconstruct the state of this object from a checkpoint. 34410234Syasuko.eckert@amd.com * @param cp The checkpoint use. 34510152Satgutier@umich.edu * @param section The section name of this object 34610234Syasuko.eckert@amd.com */ 34710234Syasuko.eckert@amd.com virtual void unserialize(Checkpoint *cp, const std::string §ion); 34810234Syasuko.eckert@amd.com 34910234Syasuko.eckert@amd.com}; 35010234Syasuko.eckert@amd.com 35110234Syasuko.eckert@amd.com#endif // __DEV_TSUNAMI_IO_HH__ 35210234Syasuko.eckert@amd.com