tsunami_cchip.hh revision 817 
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/* @file
30 * Emulation of the Tsunami CChip CSRs
31 */
32
33#ifndef __TSUNAMI_CCHIP_HH__
34#define __TSUNAMI_CCHIP_HH__
35
36#include "mem/functional_mem/functional_memory.hh"
37#include "dev/tsunami.hh"
38
39/*
40 * Tsunami CChip
41 */
42class TsunamiCChip : public FunctionalMemory
43{
44  private:
45    Addr addr;
46    static const Addr size = 0xfff;
47
48  protected:
49      /**
50       * pointer to the tsunami object.
51       * This is our access to all the other tsunami
52       * devices.
53       */
54    Tsunami *tsunami;
55
56    /**
57     * The dims are device interrupt mask registers.
58     * One exists for each CPU, the DRIR X DIM = DIR
59     */
60    uint64_t dim[Tsunami::Max_CPUs];
61
62    /**
63     * The dirs are device interrupt registers.
64     * One exists for each CPU, the DRIR X DIM = DIR
65     */
66    uint64_t dir[Tsunami::Max_CPUs];
67    bool dirInterrupting[Tsunami::Max_CPUs];
68
69    /**
70     * This register contains bits for each PCI interrupt
71     * that can occur.
72     */
73    uint64_t drir;
74
75  public:
76    TsunamiCChip(const std::string &name, Tsunami *t, Addr a,
77                 MemoryController *mmu);
78
79    virtual Fault read(MemReqPtr &req, uint8_t *data);
80    virtual Fault write(MemReqPtr &req, const uint8_t *data);
81
82    void postDRIR(uint32_t interrupt);
83    void clearDRIR(uint32_t interrupt);
84
85    virtual void serialize(std::ostream &os);
86    virtual void unserialize(Checkpoint *cp, const std::string &section);
87
88    uint64_t misc;
89    bool RTCInterrupting;
90};
91
92#endif // __TSUNAMI_CCHIP_HH__
93