tsunami.hh revision 779 
1/*
2 * Copyright (c) 2003 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/**
30 * @file
31 * Declaration of top level class for the Tsunami chipset. This class just retains pointers
32 * to all its children so the children can communicate
33 */
34
35#ifndef __TSUNAMI_HH__
36#define __TSUNAMI_HH__
37
38#include "sim/sim_object.hh"
39
40class IntrControl;
41class ConsoleListener;
42class SimConsole;
43class ScsiController;
44class TlaserClock;
45class EtherDev;
46class TsunamiCChip;
47class TsunamiPChip;
48class TsunamiPCIConfig;
49
50/**
51  * Top level class for Tsunami Chipset emulation.
52  * This structure just contains pointers to all the
53  * children so the children can commnicate to do the
54  * read work
55  */
56
57class Tsunami : public SimObject
58{
59  public:
60
61    /** Max number of CPUs in a Tsunami */
62    static const int Max_CPUs = 4;
63
64    /** Pointer to the interrupt controller (used to post and ack interrupts on the CPU) */
65    IntrControl *intrctrl;
66    /** Pointer to the UART emulation code */
67    SimConsole *cons;
68
69    /** Pointer to the SCSI controller device */
70    ScsiController *scsi;
71    /** Pointer to the ethernet controller device */
72    EtherDev *ethernet;
73
74    /** Pointer to the Tsunami CChip.
75      * The chip contains some configuration information and
76      * all the interrupt mask and status registers
77      */
78    TsunamiCChip *cchip;
79
80    /** Pointer to the Tsunami PChip.
81      * The pchip is the interface to the PCI bus, in our case
82      * it does not have to do much.
83      */
84    TsunamiPChip *pchip;
85
86    /** Pointer to the Tsunami PCI Config Space
87      * The config space in tsunami all needs to return
88      * -1 if a device is not there.
89      */
90    TsunamiPCIConfig *pciconfig;
91
92    int intr_sum_type[Tsunami::Max_CPUs];
93    int ipi_pending[Tsunami::Max_CPUs];
94
95    int interrupt_frequency;
96
97  public:
98    /**
99      * Constructor for the Tsunami Class.
100      * @param
101      */
102    Tsunami(const std::string &name, ScsiController *scsi,
103               EtherDev *ethernet,
104               SimConsole *, IntrControl *intctrl, int intrFreq);
105
106    virtual void serialize(std::ostream &os);
107    virtual void unserialize(Checkpoint *cp, const std::string &section);
108};
109
110#endif // __TSUNAMI_HH__
111