12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665SN/A *
282665SN/A * Authors: Nathan Binkert
292SN/A */
302SN/A
312SN/A#ifndef __ALPHA_ACCESS_H__
322SN/A#define __ALPHA_ACCESS_H__
332SN/A
341758SN/A/** @file
352SN/A * System Console Memory Mapped Register Definition
362SN/A */
372SN/A
382114SN/A#define ALPHA_ACCESS_VERSION (1305)
392SN/A
401804SN/A#ifdef CONSOLE
411802SN/Atypedef unsigned uint32_t;
421802SN/Atypedef unsigned long uint64_t;
432SN/A#endif
442SN/A
452SN/A// This structure hacked up from simos
462SN/Astruct AlphaAccess
472SN/A{
485543Ssaidi@eecs.umich.edu    uint32_t    last_offset;            // 00: must be first field
495543Ssaidi@eecs.umich.edu    uint32_t    version;                // 04:
505543Ssaidi@eecs.umich.edu    uint32_t    numCPUs;                // 08:
515543Ssaidi@eecs.umich.edu    uint32_t    intrClockFrequency;     // 0C: Hz
525543Ssaidi@eecs.umich.edu    uint64_t    cpuClock;               // 10: MHz
535543Ssaidi@eecs.umich.edu    uint64_t    mem_size;               // 18:
542SN/A
552SN/A    // Loaded kernel
565543Ssaidi@eecs.umich.edu    uint64_t    kernStart;              // 20:
575543Ssaidi@eecs.umich.edu    uint64_t    kernEnd;                // 28:
585543Ssaidi@eecs.umich.edu    uint64_t    entryPoint;             // 30:
592SN/A
602SN/A    // console disk stuff
615543Ssaidi@eecs.umich.edu    uint64_t    diskUnit;               // 38:
625543Ssaidi@eecs.umich.edu    uint64_t    diskCount;              // 40:
635543Ssaidi@eecs.umich.edu    uint64_t    diskPAddr;              // 48:
645543Ssaidi@eecs.umich.edu    uint64_t    diskBlock;              // 50:
655543Ssaidi@eecs.umich.edu    uint64_t    diskOperation;          // 58:
662SN/A
672SN/A    // console simple output stuff
685543Ssaidi@eecs.umich.edu    uint64_t    outputChar;             // 60: Placeholder for output
695543Ssaidi@eecs.umich.edu    uint64_t    inputChar;              // 68: Placeholder for input
702SN/A
712SN/A    // MP boot
725543Ssaidi@eecs.umich.edu    uint64_t    cpuStack[64];           // 70:
732SN/A};
742SN/A
752SN/A#endif // __ALPHA_ACCESS_H__
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