Device.py revision 12472
1# Copyright (c) 2012-2016 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2005-2007 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Nathan Binkert 40# Glenn Bergmans 41 42from m5.params import * 43from m5.proxy import * 44from m5.util.fdthelper import * 45from MemObject import MemObject 46 47class PioDevice(MemObject): 48 type = 'PioDevice' 49 cxx_header = "dev/io_device.hh" 50 abstract = True 51 pio = SlavePort("Programmed I/O port") 52 system = Param.System(Parent.any, "System this device is part of") 53 54 def generateBasicPioDeviceNode(self, state, name, pio_addr, 55 size, interrupts = None): 56 node = FdtNode("%s@%x" % (name, long(pio_addr))) 57 node.append(FdtPropertyWords("reg", 58 state.addrCells(pio_addr) + 59 state.sizeCells(size) )) 60 61 if interrupts: 62 if any([i < 32 for i in interrupts]): 63 raise(("Interrupt number smaller than 32 "+ 64 " in PioDevice %s") % name) 65 66 # subtracting 32 because Linux assumes that SPIs start at 0, while 67 # gem5 uses the internal GIC numbering (SPIs start at 32) 68 node.append(FdtPropertyWords("interrupts", sum( 69 [[0, i - 32, 4] for i in interrupts], []) )) 70 71 return node 72 73class BasicPioDevice(PioDevice): 74 type = 'BasicPioDevice' 75 cxx_header = "dev/io_device.hh" 76 abstract = True 77 pio_addr = Param.Addr("Device Address") 78 pio_latency = Param.Latency('100ns', "Programmed IO latency") 79 80class DmaDevice(PioDevice): 81 type = 'DmaDevice' 82 cxx_header = "dev/dma_device.hh" 83 abstract = True 84 dma = MasterPort("DMA port") 85 86 87class IsaFake(BasicPioDevice): 88 type = 'IsaFake' 89 cxx_header = "dev/isa_fake.hh" 90 pio_size = Param.Addr(0x8, "Size of address range") 91 ret_data8 = Param.UInt8(0xFF, "Default data to return") 92 ret_data16 = Param.UInt16(0xFFFF, "Default data to return") 93 ret_data32 = Param.UInt32(0xFFFFFFFF, "Default data to return") 94 ret_data64 = Param.UInt64(0xFFFFFFFFFFFFFFFF, "Default data to return") 95 ret_bad_addr = Param.Bool(False, "Return pkt status bad address on access") 96 update_data = Param.Bool(False, "Update the data that is returned on writes") 97 warn_access = Param.String("", "String to print when device is accessed") 98 fake_mem = Param.Bool(False, 99 "Is this device acting like a memory and thus may get a cache line sized req") 100 101class BadAddr(IsaFake): 102 pio_addr = 0 103 ret_bad_addr = Param.Bool(True, "Return pkt status bad address on access") 104 105 106