thread_state.hh revision 8921
110259SAndrew.Bardsley@arm.com/* 212276Sanouk.vanlaer@arm.com * Copyright (c) 2006 The Regents of The University of Michigan 310259SAndrew.Bardsley@arm.com * All rights reserved. 410259SAndrew.Bardsley@arm.com * 510259SAndrew.Bardsley@arm.com * Redistribution and use in source and binary forms, with or without 610259SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are 710259SAndrew.Bardsley@arm.com * met: redistributions of source code must retain the above copyright 810259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer; 910259SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright 1010259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer in the 1110259SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution; 1210259SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its 1310259SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from 1410259SAndrew.Bardsley@arm.com * this software without specific prior written permission. 1510259SAndrew.Bardsley@arm.com * 1610259SAndrew.Bardsley@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710259SAndrew.Bardsley@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810259SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910259SAndrew.Bardsley@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010259SAndrew.Bardsley@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110259SAndrew.Bardsley@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210259SAndrew.Bardsley@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310259SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410259SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510259SAndrew.Bardsley@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610259SAndrew.Bardsley@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710259SAndrew.Bardsley@arm.com * 2810259SAndrew.Bardsley@arm.com * Authors: Kevin Lim 2910259SAndrew.Bardsley@arm.com */ 3010259SAndrew.Bardsley@arm.com 3110259SAndrew.Bardsley@arm.com#ifndef __CPU_THREAD_STATE_HH__ 3210259SAndrew.Bardsley@arm.com#define __CPU_THREAD_STATE_HH__ 3310259SAndrew.Bardsley@arm.com 3410259SAndrew.Bardsley@arm.com#include "arch/types.hh" 3510259SAndrew.Bardsley@arm.com#include "config/the_isa.hh" 3610259SAndrew.Bardsley@arm.com#include "cpu/base.hh" 3710259SAndrew.Bardsley@arm.com#include "cpu/profile.hh" 3810259SAndrew.Bardsley@arm.com#include "cpu/thread_context.hh" 3910259SAndrew.Bardsley@arm.com#include "mem/mem_object.hh" 4011793Sbrandon.potter@amd.com#include "sim/process.hh" 4111793Sbrandon.potter@amd.com 4210259SAndrew.Bardsley@arm.comclass EndQuiesceEvent; 4310259SAndrew.Bardsley@arm.comclass FunctionProfile; 4410259SAndrew.Bardsley@arm.comclass ProfileNode; 4510259SAndrew.Bardsley@arm.comnamespace TheISA { 4610259SAndrew.Bardsley@arm.com namespace Kernel { 4710259SAndrew.Bardsley@arm.com class Statistics; 4810259SAndrew.Bardsley@arm.com } 4910259SAndrew.Bardsley@arm.com} 5010259SAndrew.Bardsley@arm.com 5111567Smitch.hayenga@arm.comclass Checkpoint; 5211567Smitch.hayenga@arm.com 5310259SAndrew.Bardsley@arm.com/** 5410259SAndrew.Bardsley@arm.com * Struct for holding general thread state that is needed across CPU 5510259SAndrew.Bardsley@arm.com * models. This includes things such as pointers to the process, 5610259SAndrew.Bardsley@arm.com * memory, quiesce events, and certain stats. This can be expanded 5711567Smitch.hayenga@arm.com * to hold more thread-specific stats within it. 5811567Smitch.hayenga@arm.com */ 5911567Smitch.hayenga@arm.comstruct ThreadState { 6011567Smitch.hayenga@arm.com typedef ThreadContext::Status Status; 6111567Smitch.hayenga@arm.com 6211567Smitch.hayenga@arm.com ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process); 6311567Smitch.hayenga@arm.com 6411567Smitch.hayenga@arm.com virtual ~ThreadState(); 6511567Smitch.hayenga@arm.com 6611567Smitch.hayenga@arm.com void serialize(std::ostream &os); 6711567Smitch.hayenga@arm.com 6811567Smitch.hayenga@arm.com void unserialize(Checkpoint *cp, const std::string §ion); 6911567Smitch.hayenga@arm.com 7011567Smitch.hayenga@arm.com int cpuId() { return baseCpu->cpuId(); } 7110259SAndrew.Bardsley@arm.com 7210259SAndrew.Bardsley@arm.com int contextId() { return _contextId; } 7310259SAndrew.Bardsley@arm.com 7410259SAndrew.Bardsley@arm.com void setContextId(int id) { _contextId = id; } 7510259SAndrew.Bardsley@arm.com 7610259SAndrew.Bardsley@arm.com void setThreadId(ThreadID id) { _threadId = id; } 7710259SAndrew.Bardsley@arm.com 7810259SAndrew.Bardsley@arm.com ThreadID threadId() { return _threadId; } 7910259SAndrew.Bardsley@arm.com 8010259SAndrew.Bardsley@arm.com Tick readLastActivate() { return lastActivate; } 8110259SAndrew.Bardsley@arm.com 8210259SAndrew.Bardsley@arm.com Tick readLastSuspend() { return lastSuspend; } 8310259SAndrew.Bardsley@arm.com 8410259SAndrew.Bardsley@arm.com /** 8510259SAndrew.Bardsley@arm.com * Initialise the physical and virtual port proxies and tie them to 8610259SAndrew.Bardsley@arm.com * the data port of the CPU. 8710259SAndrew.Bardsley@arm.com * 8810259SAndrew.Bardsley@arm.com * @param tc ThreadContext for the virtual-to-physical translation 8910259SAndrew.Bardsley@arm.com */ 9010259SAndrew.Bardsley@arm.com void initMemProxies(ThreadContext *tc); 9110259SAndrew.Bardsley@arm.com 9210259SAndrew.Bardsley@arm.com void dumpFuncProfile(); 9310259SAndrew.Bardsley@arm.com 9410259SAndrew.Bardsley@arm.com EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 9510259SAndrew.Bardsley@arm.com 9610259SAndrew.Bardsley@arm.com void profileClear(); 9710259SAndrew.Bardsley@arm.com 9810259SAndrew.Bardsley@arm.com void profileSample(); 9910259SAndrew.Bardsley@arm.com 10010259SAndrew.Bardsley@arm.com TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 10110259SAndrew.Bardsley@arm.com 10210259SAndrew.Bardsley@arm.com PortProxy &getPhysProxy() { return *physProxy; } 10310259SAndrew.Bardsley@arm.com 10410259SAndrew.Bardsley@arm.com FSTranslatingPortProxy &getVirtProxy() { return *virtProxy; } 10510259SAndrew.Bardsley@arm.com 10610259SAndrew.Bardsley@arm.com Process *getProcessPtr() { return process; } 10710259SAndrew.Bardsley@arm.com 10810259SAndrew.Bardsley@arm.com SETranslatingPortProxy &getMemProxy() { return *proxy; } 10910259SAndrew.Bardsley@arm.com 11010259SAndrew.Bardsley@arm.com /** Reads the number of instructions functionally executed and 11110259SAndrew.Bardsley@arm.com * committed. 11210259SAndrew.Bardsley@arm.com */ 11310259SAndrew.Bardsley@arm.com Counter readFuncExeInst() { return funcExeInst; } 11410259SAndrew.Bardsley@arm.com 11510259SAndrew.Bardsley@arm.com /** Sets the total number of instructions functionally executed 11610259SAndrew.Bardsley@arm.com * and committed. 11710259SAndrew.Bardsley@arm.com */ 11810259SAndrew.Bardsley@arm.com void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 11910259SAndrew.Bardsley@arm.com 12010259SAndrew.Bardsley@arm.com /** Returns the status of this thread. */ 12110259SAndrew.Bardsley@arm.com Status status() const { return _status; } 12210259SAndrew.Bardsley@arm.com 12310259SAndrew.Bardsley@arm.com /** Sets the status of this thread. */ 12410259SAndrew.Bardsley@arm.com void setStatus(Status new_status) { _status = new_status; } 12510259SAndrew.Bardsley@arm.com 12610259SAndrew.Bardsley@arm.com public: 12710259SAndrew.Bardsley@arm.com 12810259SAndrew.Bardsley@arm.com /** Number of instructions committed. */ 12910259SAndrew.Bardsley@arm.com Counter numInst; 13010259SAndrew.Bardsley@arm.com /** Stat for number instructions committed. */ 13110259SAndrew.Bardsley@arm.com Stats::Scalar numInsts; 13210259SAndrew.Bardsley@arm.com /** Number of ops (including micro ops) committed. */ 13310259SAndrew.Bardsley@arm.com Counter numOp; 13410905Sandreas.sandberg@arm.com /** Stat for number ops (including micro ops) committed. */ 13510259SAndrew.Bardsley@arm.com Stats::Scalar numOps; 13610905Sandreas.sandberg@arm.com /** Stat for number of memory references. */ 13710259SAndrew.Bardsley@arm.com Stats::Scalar numMemRefs; 13810259SAndrew.Bardsley@arm.com 13910259SAndrew.Bardsley@arm.com /** Number of simulated loads, used for tracking events based on 14010905Sandreas.sandberg@arm.com * the number of loads committed. 14110259SAndrew.Bardsley@arm.com */ 14210905Sandreas.sandberg@arm.com Counter numLoad; 14310259SAndrew.Bardsley@arm.com 14410259SAndrew.Bardsley@arm.com /** The number of simulated loads committed prior to this run. */ 14510259SAndrew.Bardsley@arm.com Counter startNumLoad; 14610905Sandreas.sandberg@arm.com 14710259SAndrew.Bardsley@arm.com protected: 14810905Sandreas.sandberg@arm.com ThreadContext::Status _status; 14910905Sandreas.sandberg@arm.com 15010259SAndrew.Bardsley@arm.com // Pointer to the base CPU. 15110259SAndrew.Bardsley@arm.com BaseCPU *baseCpu; 15210259SAndrew.Bardsley@arm.com 15310905Sandreas.sandberg@arm.com // system wide HW context id 15410259SAndrew.Bardsley@arm.com int _contextId; 15510905Sandreas.sandberg@arm.com 15610905Sandreas.sandberg@arm.com // Index of hardware thread context on the CPU that this represents. 15710259SAndrew.Bardsley@arm.com ThreadID _threadId; 15810259SAndrew.Bardsley@arm.com 15910259SAndrew.Bardsley@arm.com public: 16010259SAndrew.Bardsley@arm.com /** Last time activate was called on this thread. */ 16110259SAndrew.Bardsley@arm.com Tick lastActivate; 16210259SAndrew.Bardsley@arm.com 16310259SAndrew.Bardsley@arm.com /** Last time suspend was called on this thread. */ 16410259SAndrew.Bardsley@arm.com Tick lastSuspend; 16510259SAndrew.Bardsley@arm.com 16610259SAndrew.Bardsley@arm.com public: 16710259SAndrew.Bardsley@arm.com FunctionProfile *profile; 16810259SAndrew.Bardsley@arm.com ProfileNode *profileNode; 16911151Smitch.hayenga@arm.com Addr profilePC; 17010259SAndrew.Bardsley@arm.com EndQuiesceEvent *quiesceEvent; 17111151Smitch.hayenga@arm.com 17211567Smitch.hayenga@arm.com TheISA::Kernel::Statistics *kernelStats; 17310259SAndrew.Bardsley@arm.com 17411567Smitch.hayenga@arm.com protected: 17511151Smitch.hayenga@arm.com Process *process; 17611567Smitch.hayenga@arm.com 17710259SAndrew.Bardsley@arm.com /** A port proxy outgoing only for functional accesses to physical 17810259SAndrew.Bardsley@arm.com * addresses.*/ 17910259SAndrew.Bardsley@arm.com PortProxy *physProxy; 18010259SAndrew.Bardsley@arm.com 18110259SAndrew.Bardsley@arm.com /** A translating port proxy, outgoing only, for functional 18210259SAndrew.Bardsley@arm.com * accesse to virtual addresses. */ 18310259SAndrew.Bardsley@arm.com FSTranslatingPortProxy *virtProxy; 18410259SAndrew.Bardsley@arm.com SETranslatingPortProxy *proxy; 18510259SAndrew.Bardsley@arm.com 18611567Smitch.hayenga@arm.com public: 18711567Smitch.hayenga@arm.com /* 18811567Smitch.hayenga@arm.com * number of executed instructions, for matching with syscall trace 18911567Smitch.hayenga@arm.com * points in EIO files. 19010259SAndrew.Bardsley@arm.com */ 19110259SAndrew.Bardsley@arm.com Counter funcExeInst; 19210913Sandreas.sandberg@arm.com 19310913Sandreas.sandberg@arm.com // 19410259SAndrew.Bardsley@arm.com // Count failed store conditionals so we can warn of apparent 19512276Sanouk.vanlaer@arm.com // application deadlock situations. 19612276Sanouk.vanlaer@arm.com unsigned storeCondFailures; 19712276Sanouk.vanlaer@arm.com}; 19810949Sandreas.sandberg@arm.com 19910949Sandreas.sandberg@arm.com#endif // __CPU_THREAD_STATE_HH__ 20010949Sandreas.sandberg@arm.com