thread_state.hh revision 8799
12330SN/A/* 22330SN/A * Copyright (c) 2006 The Regents of The University of Michigan 32330SN/A * All rights reserved. 42330SN/A * 52330SN/A * Redistribution and use in source and binary forms, with or without 62330SN/A * modification, are permitted provided that the following conditions are 72330SN/A * met: redistributions of source code must retain the above copyright 82330SN/A * notice, this list of conditions and the following disclaimer; 92330SN/A * redistributions in binary form must reproduce the above copyright 102330SN/A * notice, this list of conditions and the following disclaimer in the 112330SN/A * documentation and/or other materials provided with the distribution; 122330SN/A * neither the name of the copyright holders nor the names of its 132330SN/A * contributors may be used to endorse or promote products derived from 142330SN/A * this software without specific prior written permission. 152330SN/A * 162330SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172330SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182330SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192330SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202330SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212330SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222330SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232330SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242330SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252330SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262330SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Kevin Lim 292330SN/A */ 302292SN/A 312292SN/A#ifndef __CPU_THREAD_STATE_HH__ 322292SN/A#define __CPU_THREAD_STATE_HH__ 332292SN/A 342980Sgblack@eecs.umich.edu#include "arch/types.hh" 356658Snate@binkert.org#include "config/the_isa.hh" 368229Snate@binkert.org#include "cpu/base.hh" 372362SN/A#include "cpu/profile.hh" 382680Sktlim@umich.edu#include "cpu/thread_context.hh" 392683Sktlim@umich.edu#include "mem/mem_object.hh" 402683Sktlim@umich.edu#include "sim/process.hh" 412678Sktlim@umich.edu 422292SN/Aclass EndQuiesceEvent; 432292SN/Aclass FunctionProfile; 442292SN/Aclass ProfileNode; 453548Sgblack@eecs.umich.edunamespace TheISA { 463548Sgblack@eecs.umich.edu namespace Kernel { 473548Sgblack@eecs.umich.edu class Statistics; 483548Sgblack@eecs.umich.edu }; 492330SN/A}; 502292SN/A 512862Sktlim@umich.educlass Checkpoint; 528706Sandreas.hansson@arm.comclass PortProxy; 538706Sandreas.hansson@arm.comclass SETranslatingPort; 548706Sandreas.hansson@arm.comclass FSTranslatingPort; 552862Sktlim@umich.edu 562330SN/A/** 572330SN/A * Struct for holding general thread state that is needed across CPU 582330SN/A * models. This includes things such as pointers to the process, 592330SN/A * memory, quiesce events, and certain stats. This can be expanded 602330SN/A * to hold more thread-specific stats within it. 612330SN/A */ 622292SN/Astruct ThreadState { 632683Sktlim@umich.edu typedef ThreadContext::Status Status; 642683Sktlim@umich.edu 656331Sgblack@eecs.umich.edu ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process); 662683Sktlim@umich.edu 673486Sktlim@umich.edu ~ThreadState(); 683486Sktlim@umich.edu 692862Sktlim@umich.edu void serialize(std::ostream &os); 702862Sktlim@umich.edu 712862Sktlim@umich.edu void unserialize(Checkpoint *cp, const std::string §ion); 722862Sktlim@umich.edu 735712Shsul@eecs.umich.edu int cpuId() { return baseCpu->cpuId(); } 742683Sktlim@umich.edu 755714Shsul@eecs.umich.edu int contextId() { return _contextId; } 765714Shsul@eecs.umich.edu 775714Shsul@eecs.umich.edu void setContextId(int id) { _contextId = id; } 785714Shsul@eecs.umich.edu 796221Snate@binkert.org void setThreadId(ThreadID id) { _threadId = id; } 802683Sktlim@umich.edu 816221Snate@binkert.org ThreadID threadId() { return _threadId; } 822683Sktlim@umich.edu 832683Sktlim@umich.edu Tick readLastActivate() { return lastActivate; } 842683Sktlim@umich.edu 852683Sktlim@umich.edu Tick readLastSuspend() { return lastSuspend; } 862683Sktlim@umich.edu 878706Sandreas.hansson@arm.com /** 888706Sandreas.hansson@arm.com * Initialise the physical and virtual port proxies and tie them to 898706Sandreas.hansson@arm.com * the data port of the CPU. 908706Sandreas.hansson@arm.com * 918706Sandreas.hansson@arm.com * tc ThreadContext for the virtual-to-physical translation 928706Sandreas.hansson@arm.com */ 938706Sandreas.hansson@arm.com void initMemProxies(ThreadContext *tc); 943675Sktlim@umich.edu 952683Sktlim@umich.edu void dumpFuncProfile(); 962683Sktlim@umich.edu 972683Sktlim@umich.edu EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 982683Sktlim@umich.edu 992683Sktlim@umich.edu void profileClear(); 1002683Sktlim@umich.edu 1012683Sktlim@umich.edu void profileSample(); 1022683Sktlim@umich.edu 1033548Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 1042683Sktlim@umich.edu 1058706Sandreas.hansson@arm.com PortProxy* getPhysProxy() { return physProxy; } 1062690Sktlim@umich.edu 1078706Sandreas.hansson@arm.com FSTranslatingPortProxy* getVirtProxy() { return virtProxy; } 1088799Sgblack@eecs.umich.edu 1092683Sktlim@umich.edu Process *getProcessPtr() { return process; } 1102683Sktlim@umich.edu 1118706Sandreas.hansson@arm.com SETranslatingPortProxy* getMemProxy(); 1122292SN/A 1132683Sktlim@umich.edu /** Reads the number of instructions functionally executed and 1142683Sktlim@umich.edu * committed. 1152683Sktlim@umich.edu */ 1162683Sktlim@umich.edu Counter readFuncExeInst() { return funcExeInst; } 1172683Sktlim@umich.edu 1182683Sktlim@umich.edu /** Sets the total number of instructions functionally executed 1192683Sktlim@umich.edu * and committed. 1202683Sktlim@umich.edu */ 1212683Sktlim@umich.edu void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 1222683Sktlim@umich.edu 1232683Sktlim@umich.edu /** Returns the status of this thread. */ 1242683Sktlim@umich.edu Status status() const { return _status; } 1252683Sktlim@umich.edu 1262683Sktlim@umich.edu /** Sets the status of this thread. */ 1272683Sktlim@umich.edu void setStatus(Status new_status) { _status = new_status; } 1282683Sktlim@umich.edu 1293673Srdreslin@umich.edu public: 1303486Sktlim@umich.edu 1312683Sktlim@umich.edu /** Number of instructions committed. */ 1322683Sktlim@umich.edu Counter numInst; 1332683Sktlim@umich.edu /** Stat for number instructions committed. */ 1345999Snate@binkert.org Stats::Scalar numInsts; 1352683Sktlim@umich.edu /** Stat for number of memory references. */ 1365999Snate@binkert.org Stats::Scalar numMemRefs; 1372683Sktlim@umich.edu 1382683Sktlim@umich.edu /** Number of simulated loads, used for tracking events based on 1392683Sktlim@umich.edu * the number of loads committed. 1402683Sktlim@umich.edu */ 1412683Sktlim@umich.edu Counter numLoad; 1422683Sktlim@umich.edu 1432683Sktlim@umich.edu /** The number of simulated loads committed prior to this run. */ 1442683Sktlim@umich.edu Counter startNumLoad; 1452683Sktlim@umich.edu 1462683Sktlim@umich.edu protected: 1472683Sktlim@umich.edu ThreadContext::Status _status; 1482683Sktlim@umich.edu 1493402Sktlim@umich.edu // Pointer to the base CPU. 1503402Sktlim@umich.edu BaseCPU *baseCpu; 1513402Sktlim@umich.edu 1525714Shsul@eecs.umich.edu // system wide HW context id 1535714Shsul@eecs.umich.edu int _contextId; 1545714Shsul@eecs.umich.edu 1552292SN/A // Index of hardware thread context on the CPU that this represents. 1566221Snate@binkert.org ThreadID _threadId; 1572292SN/A 1582690Sktlim@umich.edu public: 1592683Sktlim@umich.edu /** Last time activate was called on this thread. */ 1602683Sktlim@umich.edu Tick lastActivate; 1612292SN/A 1622683Sktlim@umich.edu /** Last time suspend was called on this thread. */ 1632683Sktlim@umich.edu Tick lastSuspend; 1642292SN/A 1652683Sktlim@umich.edu public: 1662292SN/A FunctionProfile *profile; 1672292SN/A ProfileNode *profileNode; 1682292SN/A Addr profilePC; 1692292SN/A EndQuiesceEvent *quiesceEvent; 1702292SN/A 1713548Sgblack@eecs.umich.edu TheISA::Kernel::Statistics *kernelStats; 1728777Sgblack@eecs.umich.edu 1732683Sktlim@umich.edu protected: 1748229Snate@binkert.org Process *process; 1758229Snate@binkert.org 1768706Sandreas.hansson@arm.com /** A port proxy outgoing only for functional accesses to physical 1772683Sktlim@umich.edu * addresses.*/ 1788706Sandreas.hansson@arm.com PortProxy *physProxy; 1792683Sktlim@umich.edu 1808706Sandreas.hansson@arm.com /** A translating port proxy, outgoing only, for functional 1818706Sandreas.hansson@arm.com * accesse to virtual addresses. */ 1828706Sandreas.hansson@arm.com FSTranslatingPortProxy* virtProxy; 1838706Sandreas.hansson@arm.com SETranslatingPortProxy* proxy; 1842678Sktlim@umich.edu 1852690Sktlim@umich.edu public: 1862292SN/A /* 1872292SN/A * number of executed instructions, for matching with syscall trace 1882292SN/A * points in EIO files. 1892292SN/A */ 1902292SN/A Counter funcExeInst; 1912292SN/A 1922292SN/A // 1932292SN/A // Count failed store conditionals so we can warn of apparent 1942292SN/A // application deadlock situations. 1952292SN/A unsigned storeCondFailures; 1962292SN/A}; 1972292SN/A 1982292SN/A#endif // __CPU_THREAD_STATE_HH__ 199