thread_state.hh revision 8777
12817Sksewell@umich.edu/* 22817Sksewell@umich.edu * Copyright (c) 2006 The Regents of The University of Michigan 32817Sksewell@umich.edu * All rights reserved. 42817Sksewell@umich.edu * 52817Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 62817Sksewell@umich.edu * modification, are permitted provided that the following conditions are 72817Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 82817Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 92817Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 102817Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 112817Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 122817Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 132817Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 142817Sksewell@umich.edu * this software without specific prior written permission. 152817Sksewell@umich.edu * 162817Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172817Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182817Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192817Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202817Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212817Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222817Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232817Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242817Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252817Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262817Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272817Sksewell@umich.edu * 282817Sksewell@umich.edu * Authors: Kevin Lim 294202Sbinkertn@umich.edu */ 302817Sksewell@umich.edu 312817Sksewell@umich.edu#ifndef __CPU_THREAD_STATE_HH__ 322817Sksewell@umich.edu#define __CPU_THREAD_STATE_HH__ 334202Sbinkertn@umich.edu 342817Sksewell@umich.edu#include "arch/types.hh" 355192Ssaidi@eecs.umich.edu#include "config/the_isa.hh" 365192Ssaidi@eecs.umich.edu#include "cpu/base.hh" 375192Ssaidi@eecs.umich.edu#include "cpu/profile.hh" 385192Ssaidi@eecs.umich.edu#include "cpu/thread_context.hh" 395192Ssaidi@eecs.umich.edu#include "mem/mem_object.hh" 405192Ssaidi@eecs.umich.edu#include "sim/process.hh" 415192Ssaidi@eecs.umich.edu 425192Ssaidi@eecs.umich.educlass EndQuiesceEvent; 435192Ssaidi@eecs.umich.educlass FunctionProfile; 445192Ssaidi@eecs.umich.educlass ProfileNode; 454202Sbinkertn@umich.edunamespace TheISA { 464486Sbinkertn@umich.edu namespace Kernel { 474486Sbinkertn@umich.edu class Statistics; 484486Sbinkertn@umich.edu }; 494486Sbinkertn@umich.edu}; 504202Sbinkertn@umich.edu 514202Sbinkertn@umich.educlass Checkpoint; 524202Sbinkertn@umich.educlass Port; 534202Sbinkertn@umich.educlass TranslatingPort; 545597Sgblack@eecs.umich.edu 554202Sbinkertn@umich.edu/** 565597Sgblack@eecs.umich.edu * Struct for holding general thread state that is needed across CPU 574202Sbinkertn@umich.edu * models. This includes things such as pointers to the process, 584202Sbinkertn@umich.edu * memory, quiesce events, and certain stats. This can be expanded 594202Sbinkertn@umich.edu * to hold more thread-specific stats within it. 604202Sbinkertn@umich.edu */ 614202Sbinkertn@umich.edustruct ThreadState { 624202Sbinkertn@umich.edu typedef ThreadContext::Status Status; 634202Sbinkertn@umich.edu 644202Sbinkertn@umich.edu ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process); 654202Sbinkertn@umich.edu 664202Sbinkertn@umich.edu ~ThreadState(); 674202Sbinkertn@umich.edu 684202Sbinkertn@umich.edu void serialize(std::ostream &os); 694202Sbinkertn@umich.edu 705597Sgblack@eecs.umich.edu void unserialize(Checkpoint *cp, const std::string §ion); 712817Sksewell@umich.edu 725192Ssaidi@eecs.umich.edu int cpuId() { return baseCpu->cpuId(); } 735192Ssaidi@eecs.umich.edu 745192Ssaidi@eecs.umich.edu int contextId() { return _contextId; } 755192Ssaidi@eecs.umich.edu 765192Ssaidi@eecs.umich.edu void setContextId(int id) { _contextId = id; } 775192Ssaidi@eecs.umich.edu 785192Ssaidi@eecs.umich.edu void setThreadId(ThreadID id) { _threadId = id; } 795192Ssaidi@eecs.umich.edu 805192Ssaidi@eecs.umich.edu ThreadID threadId() { return _threadId; } 815192Ssaidi@eecs.umich.edu 825192Ssaidi@eecs.umich.edu Tick readLastActivate() { return lastActivate; } 835192Ssaidi@eecs.umich.edu 845192Ssaidi@eecs.umich.edu Tick readLastSuspend() { return lastSuspend; } 855192Ssaidi@eecs.umich.edu 865192Ssaidi@eecs.umich.edu void connectPhysPort(); 874202Sbinkertn@umich.edu 884497Sbinkertn@umich.edu void connectVirtPort(ThreadContext *tc); 894202Sbinkertn@umich.edu 90 void connectMemPorts(ThreadContext *tc); 91 92 void dumpFuncProfile(); 93 94 EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 95 96 void profileClear(); 97 98 void profileSample(); 99 100 TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 101 102 Process *getProcessPtr() { return process; } 103 104 TranslatingPort *getMemPort(); 105 106 void setMemPort(TranslatingPort *_port) { port = _port; } 107 108 VirtualPort *getVirtPort() { return virtPort; } 109 110 FunctionalPort *getPhysPort() { return physPort; } 111 112 void setPhysPort(FunctionalPort *port) { physPort = port; } 113 114 /** Reads the number of instructions functionally executed and 115 * committed. 116 */ 117 Counter readFuncExeInst() { return funcExeInst; } 118 119 /** Sets the total number of instructions functionally executed 120 * and committed. 121 */ 122 void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 123 124 /** Returns the status of this thread. */ 125 Status status() const { return _status; } 126 127 /** Sets the status of this thread. */ 128 void setStatus(Status new_status) { _status = new_status; } 129 130 public: 131 /** Connects port to the functional port of the memory object 132 * below the CPU. */ 133 void connectToMemFunc(Port *port); 134 135 /** Number of instructions committed. */ 136 Counter numInst; 137 /** Stat for number instructions committed. */ 138 Stats::Scalar numInsts; 139 /** Stat for number of memory references. */ 140 Stats::Scalar numMemRefs; 141 142 /** Number of simulated loads, used for tracking events based on 143 * the number of loads committed. 144 */ 145 Counter numLoad; 146 147 /** The number of simulated loads committed prior to this run. */ 148 Counter startNumLoad; 149 150 protected: 151 ThreadContext::Status _status; 152 153 // Pointer to the base CPU. 154 BaseCPU *baseCpu; 155 156 // system wide HW context id 157 int _contextId; 158 159 // Index of hardware thread context on the CPU that this represents. 160 ThreadID _threadId; 161 162 public: 163 /** Last time activate was called on this thread. */ 164 Tick lastActivate; 165 166 /** Last time suspend was called on this thread. */ 167 Tick lastSuspend; 168 169 public: 170 FunctionProfile *profile; 171 ProfileNode *profileNode; 172 Addr profilePC; 173 EndQuiesceEvent *quiesceEvent; 174 175 TheISA::Kernel::Statistics *kernelStats; 176 177 protected: 178 Process *process; 179 180 TranslatingPort *port; 181 182 /** A functional port, outgoing only, for functional accesse to virtual 183 * addresses. */ 184 VirtualPort *virtPort; 185 186 /** A functional port outgoing only for functional accesses to physical 187 * addresses.*/ 188 FunctionalPort *physPort; 189 190 public: 191 /* 192 * number of executed instructions, for matching with syscall trace 193 * points in EIO files. 194 */ 195 Counter funcExeInst; 196 197 // 198 // Count failed store conditionals so we can warn of apparent 199 // application deadlock situations. 200 unsigned storeCondFailures; 201}; 202 203#endif // __CPU_THREAD_STATE_HH__ 204