thread_state.hh revision 2683
12330SN/A/*
22330SN/A * Copyright (c) 2006 The Regents of The University of Michigan
32330SN/A * All rights reserved.
42330SN/A *
52330SN/A * Redistribution and use in source and binary forms, with or without
62330SN/A * modification, are permitted provided that the following conditions are
72330SN/A * met: redistributions of source code must retain the above copyright
82330SN/A * notice, this list of conditions and the following disclaimer;
92330SN/A * redistributions in binary form must reproduce the above copyright
102330SN/A * notice, this list of conditions and the following disclaimer in the
112330SN/A * documentation and/or other materials provided with the distribution;
122330SN/A * neither the name of the copyright holders nor the names of its
132330SN/A * contributors may be used to endorse or promote products derived from
142330SN/A * this software without specific prior written permission.
152330SN/A *
162330SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172330SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182330SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192330SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202330SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212330SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222330SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232330SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242330SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252330SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262330SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272330SN/A */
282292SN/A
292292SN/A#ifndef __CPU_THREAD_STATE_HH__
302292SN/A#define __CPU_THREAD_STATE_HH__
312292SN/A
322683Sktlim@umich.edu#include "arch/isa_traits.hh"
332680Sktlim@umich.edu#include "cpu/thread_context.hh"
342292SN/A
352678Sktlim@umich.edu#if !FULL_SYSTEM
362683Sktlim@umich.edu#include "mem/mem_object.hh"
372678Sktlim@umich.edu#include "mem/translating_port.hh"
382683Sktlim@umich.edu#include "sim/process.hh"
392678Sktlim@umich.edu#endif
402678Sktlim@umich.edu
412292SN/A#if FULL_SYSTEM
422292SN/Aclass EndQuiesceEvent;
432292SN/Aclass FunctionProfile;
442292SN/Aclass ProfileNode;
452330SN/Anamespace Kernel {
462330SN/A    class Statistics;
472330SN/A};
482292SN/A#endif
492292SN/A
502330SN/A/**
512330SN/A *  Struct for holding general thread state that is needed across CPU
522330SN/A *  models.  This includes things such as pointers to the process,
532330SN/A *  memory, quiesce events, and certain stats.  This can be expanded
542330SN/A *  to hold more thread-specific stats within it.
552330SN/A */
562292SN/Astruct ThreadState {
572683Sktlim@umich.edu    typedef ThreadContext::Status Status;
582683Sktlim@umich.edu
592292SN/A#if FULL_SYSTEM
602683Sktlim@umich.edu    ThreadState(int _cpuId, int _tid);
612292SN/A#else
622678Sktlim@umich.edu    ThreadState(int _cpuId, int _tid, MemObject *mem,
632683Sktlim@umich.edu                Process *_process, short _asid);
642292SN/A#endif
652683Sktlim@umich.edu
662683Sktlim@umich.edu    void setCpuId(int id) { cpuId = id; }
672683Sktlim@umich.edu
682683Sktlim@umich.edu    int readCpuId() { return cpuId; }
692683Sktlim@umich.edu
702683Sktlim@umich.edu    void setTid(int id) { tid = id; }
712683Sktlim@umich.edu
722683Sktlim@umich.edu    int readTid() { return tid; }
732683Sktlim@umich.edu
742683Sktlim@umich.edu    Tick readLastActivate() { return lastActivate; }
752683Sktlim@umich.edu
762683Sktlim@umich.edu    Tick readLastSuspend() { return lastSuspend; }
772683Sktlim@umich.edu
782683Sktlim@umich.edu#if FULL_SYSTEM
792683Sktlim@umich.edu    void dumpFuncProfile();
802683Sktlim@umich.edu
812683Sktlim@umich.edu    EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
822683Sktlim@umich.edu
832683Sktlim@umich.edu    void profileClear();
842683Sktlim@umich.edu
852683Sktlim@umich.edu    void profileSample();
862683Sktlim@umich.edu
872683Sktlim@umich.edu    Kernel::Statistics *getKernelStats() { return kernelStats; }
882683Sktlim@umich.edu
892683Sktlim@umich.edu    void setPhysPort(FunctionalPort *port) { physPort = port; }
902683Sktlim@umich.edu
912683Sktlim@umich.edu    void setVirtPort(VirtualPort *port) { virtPort = port; }
922683Sktlim@umich.edu#else
932683Sktlim@umich.edu    Process *getProcessPtr() { return process; }
942683Sktlim@umich.edu
952683Sktlim@umich.edu    TranslatingPort *getMemPort() { return port; }
962683Sktlim@umich.edu
972683Sktlim@umich.edu    void setMemPort(TranslatingPort *_port) { port = _port; }
982683Sktlim@umich.edu
992683Sktlim@umich.edu    int getInstAsid() { return asid; }
1002683Sktlim@umich.edu    int getDataAsid() { return asid; }
1012678Sktlim@umich.edu#endif
1022292SN/A
1032683Sktlim@umich.edu    /** Sets the current instruction being committed. */
1042683Sktlim@umich.edu    void setInst(TheISA::MachInst _inst) { inst = _inst; }
1052292SN/A
1062683Sktlim@umich.edu    /** Returns the current instruction being committed. */
1072683Sktlim@umich.edu    TheISA::MachInst getInst() { return inst; }
1082683Sktlim@umich.edu
1092683Sktlim@umich.edu    /** Reads the number of instructions functionally executed and
1102683Sktlim@umich.edu     * committed.
1112683Sktlim@umich.edu     */
1122683Sktlim@umich.edu    Counter readFuncExeInst() { return funcExeInst; }
1132683Sktlim@umich.edu
1142683Sktlim@umich.edu    /** Sets the total number of instructions functionally executed
1152683Sktlim@umich.edu     * and committed.
1162683Sktlim@umich.edu     */
1172683Sktlim@umich.edu    void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
1182683Sktlim@umich.edu
1192683Sktlim@umich.edu    /** Returns the status of this thread. */
1202683Sktlim@umich.edu    Status status() const { return _status; }
1212683Sktlim@umich.edu
1222683Sktlim@umich.edu    /** Sets the status of this thread. */
1232683Sktlim@umich.edu    void setStatus(Status new_status) { _status = new_status; }
1242683Sktlim@umich.edu
1252683Sktlim@umich.edu    /** Number of instructions committed. */
1262683Sktlim@umich.edu    Counter numInst;
1272683Sktlim@umich.edu    /** Stat for number instructions committed. */
1282683Sktlim@umich.edu    Stats::Scalar<> numInsts;
1292683Sktlim@umich.edu    /** Stat for number of memory references. */
1302683Sktlim@umich.edu    Stats::Scalar<> numMemRefs;
1312683Sktlim@umich.edu
1322683Sktlim@umich.edu    /** Number of simulated loads, used for tracking events based on
1332683Sktlim@umich.edu     * the number of loads committed.
1342683Sktlim@umich.edu     */
1352683Sktlim@umich.edu    Counter numLoad;
1362683Sktlim@umich.edu
1372683Sktlim@umich.edu    /** The number of simulated loads committed prior to this run. */
1382683Sktlim@umich.edu    Counter startNumLoad;
1392683Sktlim@umich.edu
1402683Sktlim@umich.edu  protected:
1412683Sktlim@umich.edu    ThreadContext::Status _status;
1422683Sktlim@umich.edu
1432683Sktlim@umich.edu    // ID of this context w.r.t. the System or Process object to which
1442683Sktlim@umich.edu    // it belongs.  For full-system mode, this is the system CPU ID.
1452292SN/A    int cpuId;
1462292SN/A
1472292SN/A    // Index of hardware thread context on the CPU that this represents.
1482292SN/A    int tid;
1492292SN/A
1502683Sktlim@umich.edu    /** Last time activate was called on this thread. */
1512683Sktlim@umich.edu    Tick lastActivate;
1522292SN/A
1532683Sktlim@umich.edu    /** Last time suspend was called on this thread. */
1542683Sktlim@umich.edu    Tick lastSuspend;
1552292SN/A
1562292SN/A#if FULL_SYSTEM
1572683Sktlim@umich.edu  public:
1582292SN/A    FunctionProfile *profile;
1592292SN/A    ProfileNode *profileNode;
1602292SN/A    Addr profilePC;
1612292SN/A    EndQuiesceEvent *quiesceEvent;
1622292SN/A
1632330SN/A    Kernel::Statistics *kernelStats;
1642683Sktlim@umich.edu  protected:
1652683Sktlim@umich.edu    /** A functional port outgoing only for functional accesses to physical
1662683Sktlim@umich.edu     * addresses.*/
1672683Sktlim@umich.edu    FunctionalPort *physPort;
1682683Sktlim@umich.edu
1692683Sktlim@umich.edu    /** A functional port, outgoing only, for functional accesse to virtual
1702683Sktlim@umich.edu     * addresses. That doen't require execution context information */
1712683Sktlim@umich.edu    VirtualPort *virtPort;
1722292SN/A#else
1732678Sktlim@umich.edu    TranslatingPort *port;
1742678Sktlim@umich.edu
1752292SN/A    Process *process;
1762292SN/A
1772292SN/A    // Address space ID.  Note that this is used for TIMING cache
1782292SN/A    // simulation only; all functional memory accesses should use
1792292SN/A    // one of the FunctionalMemory pointers above.
1802292SN/A    short asid;
1812683Sktlim@umich.edu#endif
1822292SN/A
1832683Sktlim@umich.edu    /** Current instruction the thread is committing.  Only set and
1842683Sktlim@umich.edu     * used for DTB faults currently.
1852683Sktlim@umich.edu     */
1862683Sktlim@umich.edu    TheISA::MachInst inst;
1872292SN/A
1882292SN/A    /**
1892292SN/A     * Temporary storage to pass the source address from copy_load to
1902292SN/A     * copy_store.
1912292SN/A     * @todo Remove this temporary when we have a better way to do it.
1922292SN/A     */
1932292SN/A    Addr copySrcAddr;
1942292SN/A    /**
1952292SN/A     * Temp storage for the physical source address of a copy.
1962292SN/A     * @todo Remove this temporary when we have a better way to do it.
1972292SN/A     */
1982292SN/A    Addr copySrcPhysAddr;
1992292SN/A
2002683Sktlim@umich.edu  public:
2012292SN/A    /*
2022292SN/A     * number of executed instructions, for matching with syscall trace
2032292SN/A     * points in EIO files.
2042292SN/A     */
2052292SN/A    Counter funcExeInst;
2062292SN/A
2072292SN/A    //
2082292SN/A    // Count failed store conditionals so we can warn of apparent
2092292SN/A    // application deadlock situations.
2102292SN/A    unsigned storeCondFailures;
2112292SN/A};
2122292SN/A
2132292SN/A#endif // __CPU_THREAD_STATE_HH__
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