thread_state.hh revision 13865
110259SAndrew.Bardsley@arm.com/* 210259SAndrew.Bardsley@arm.com * Copyright (c) 2006 The Regents of The University of Michigan 310259SAndrew.Bardsley@arm.com * All rights reserved. 410259SAndrew.Bardsley@arm.com * 510259SAndrew.Bardsley@arm.com * Redistribution and use in source and binary forms, with or without 610259SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are 710259SAndrew.Bardsley@arm.com * met: redistributions of source code must retain the above copyright 810259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer; 910259SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright 1010259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer in the 1110259SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution; 1210259SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its 1310259SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from 1410259SAndrew.Bardsley@arm.com * this software without specific prior written permission. 1510259SAndrew.Bardsley@arm.com * 1610259SAndrew.Bardsley@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1710259SAndrew.Bardsley@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1810259SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1910259SAndrew.Bardsley@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2010259SAndrew.Bardsley@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2110259SAndrew.Bardsley@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2210259SAndrew.Bardsley@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310259SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410259SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510259SAndrew.Bardsley@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610259SAndrew.Bardsley@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710259SAndrew.Bardsley@arm.com * 2810259SAndrew.Bardsley@arm.com * Authors: Kevin Lim 2910259SAndrew.Bardsley@arm.com */ 3010259SAndrew.Bardsley@arm.com 3110259SAndrew.Bardsley@arm.com#ifndef __CPU_THREAD_STATE_HH__ 3210259SAndrew.Bardsley@arm.com#define __CPU_THREAD_STATE_HH__ 3310259SAndrew.Bardsley@arm.com 3410259SAndrew.Bardsley@arm.com#include "arch/types.hh" 3510259SAndrew.Bardsley@arm.com#include "config/the_isa.hh" 3610259SAndrew.Bardsley@arm.com#include "cpu/base.hh" 3710259SAndrew.Bardsley@arm.com#include "cpu/profile.hh" 3810259SAndrew.Bardsley@arm.com#include "cpu/thread_context.hh" 3910259SAndrew.Bardsley@arm.com#include "mem/mem_object.hh" 4010259SAndrew.Bardsley@arm.com#include "sim/process.hh" 4110259SAndrew.Bardsley@arm.com 4210259SAndrew.Bardsley@arm.comclass EndQuiesceEvent; 4310259SAndrew.Bardsley@arm.comclass FunctionProfile; 4410259SAndrew.Bardsley@arm.comclass ProfileNode; 4510259SAndrew.Bardsley@arm.comnamespace TheISA { 4610259SAndrew.Bardsley@arm.com namespace Kernel { 4710259SAndrew.Bardsley@arm.com class Statistics; 4810259SAndrew.Bardsley@arm.com } 4910259SAndrew.Bardsley@arm.com} 5010913Sandreas.sandberg@arm.com 5110259SAndrew.Bardsley@arm.comclass Checkpoint; 5210259SAndrew.Bardsley@arm.com 5310259SAndrew.Bardsley@arm.com/** 5410259SAndrew.Bardsley@arm.com * Struct for holding general thread state that is needed across CPU 5510259SAndrew.Bardsley@arm.com * models. This includes things such as pointers to the process, 5610259SAndrew.Bardsley@arm.com * memory, quiesce events, and certain stats. This can be expanded 5710259SAndrew.Bardsley@arm.com * to hold more thread-specific stats within it. 5810259SAndrew.Bardsley@arm.com */ 5910259SAndrew.Bardsley@arm.comstruct ThreadState : public Serializable { 6010259SAndrew.Bardsley@arm.com typedef ThreadContext::Status Status; 6110259SAndrew.Bardsley@arm.com 6210259SAndrew.Bardsley@arm.com ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process); 6310259SAndrew.Bardsley@arm.com 6410259SAndrew.Bardsley@arm.com virtual ~ThreadState(); 6510259SAndrew.Bardsley@arm.com 6610259SAndrew.Bardsley@arm.com void serialize(CheckpointOut &cp) const override; 6710259SAndrew.Bardsley@arm.com 6810259SAndrew.Bardsley@arm.com void unserialize(CheckpointIn &cp) override; 6910259SAndrew.Bardsley@arm.com 7010259SAndrew.Bardsley@arm.com int cpuId() const { return baseCpu->cpuId(); } 7110259SAndrew.Bardsley@arm.com 7210259SAndrew.Bardsley@arm.com uint32_t socketId() const { return baseCpu->socketId(); } 7310259SAndrew.Bardsley@arm.com 7410259SAndrew.Bardsley@arm.com ContextID contextId() const { return _contextId; } 7510259SAndrew.Bardsley@arm.com 7610259SAndrew.Bardsley@arm.com void setContextId(ContextID id) { _contextId = id; } 7710259SAndrew.Bardsley@arm.com 7810259SAndrew.Bardsley@arm.com void setThreadId(ThreadID id) { _threadId = id; } 7910259SAndrew.Bardsley@arm.com 8010259SAndrew.Bardsley@arm.com ThreadID threadId() const { return _threadId; } 8110259SAndrew.Bardsley@arm.com 8210259SAndrew.Bardsley@arm.com Tick readLastActivate() const { return lastActivate; } 8310259SAndrew.Bardsley@arm.com 8410259SAndrew.Bardsley@arm.com Tick readLastSuspend() const { return lastSuspend; } 8510259SAndrew.Bardsley@arm.com 8610259SAndrew.Bardsley@arm.com /** 8710259SAndrew.Bardsley@arm.com * Initialise the physical and virtual port proxies and tie them to 8810259SAndrew.Bardsley@arm.com * the data port of the CPU. 8910259SAndrew.Bardsley@arm.com * 9010259SAndrew.Bardsley@arm.com * @param tc ThreadContext for the virtual-to-physical translation 9110259SAndrew.Bardsley@arm.com */ 9210259SAndrew.Bardsley@arm.com void initMemProxies(ThreadContext *tc); 9310259SAndrew.Bardsley@arm.com 9410259SAndrew.Bardsley@arm.com void dumpFuncProfile(); 9510259SAndrew.Bardsley@arm.com 9610259SAndrew.Bardsley@arm.com EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; } 9710259SAndrew.Bardsley@arm.com 9810259SAndrew.Bardsley@arm.com void profileClear(); 9910259SAndrew.Bardsley@arm.com 10010259SAndrew.Bardsley@arm.com void profileSample(); 10110259SAndrew.Bardsley@arm.com 10210259SAndrew.Bardsley@arm.com TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; } 10310259SAndrew.Bardsley@arm.com 10410259SAndrew.Bardsley@arm.com PortProxy &getPhysProxy(); 10510259SAndrew.Bardsley@arm.com 10610259SAndrew.Bardsley@arm.com FSTranslatingPortProxy &getVirtProxy(); 10710259SAndrew.Bardsley@arm.com 10810259SAndrew.Bardsley@arm.com Process *getProcessPtr() { return process; } 10910259SAndrew.Bardsley@arm.com 11010259SAndrew.Bardsley@arm.com void setProcessPtr(Process *p) 11110259SAndrew.Bardsley@arm.com { 11210259SAndrew.Bardsley@arm.com process = p; 11310259SAndrew.Bardsley@arm.com /** 11410259SAndrew.Bardsley@arm.com * When the process pointer changes while operating in SE Mode, 11510259SAndrew.Bardsley@arm.com * the se translating port proxy needs to be reinitialized since it 11610259SAndrew.Bardsley@arm.com * holds a pointer to the process class. 11710259SAndrew.Bardsley@arm.com */ 11810259SAndrew.Bardsley@arm.com if (proxy) { 11910259SAndrew.Bardsley@arm.com delete proxy; 12010259SAndrew.Bardsley@arm.com proxy = NULL; 12110259SAndrew.Bardsley@arm.com initMemProxies(NULL); 12210259SAndrew.Bardsley@arm.com } 12310259SAndrew.Bardsley@arm.com } 12410259SAndrew.Bardsley@arm.com 12510259SAndrew.Bardsley@arm.com SETranslatingPortProxy &getMemProxy(); 12610259SAndrew.Bardsley@arm.com 12710259SAndrew.Bardsley@arm.com /** Reads the number of instructions functionally executed and 12810259SAndrew.Bardsley@arm.com * committed. 12910259SAndrew.Bardsley@arm.com */ 13010259SAndrew.Bardsley@arm.com Counter readFuncExeInst() const { return funcExeInst; } 13110259SAndrew.Bardsley@arm.com 13210905Sandreas.sandberg@arm.com /** Sets the total number of instructions functionally executed 13310259SAndrew.Bardsley@arm.com * and committed. 13410905Sandreas.sandberg@arm.com */ 13510259SAndrew.Bardsley@arm.com void setFuncExeInst(Counter new_val) { funcExeInst = new_val; } 13610259SAndrew.Bardsley@arm.com 13710259SAndrew.Bardsley@arm.com /** Returns the status of this thread. */ 13810905Sandreas.sandberg@arm.com Status status() const { return _status; } 13910259SAndrew.Bardsley@arm.com 14010259SAndrew.Bardsley@arm.com /** Sets the status of this thread. */ 14110259SAndrew.Bardsley@arm.com void setStatus(Status new_status) { _status = new_status; } 14210259SAndrew.Bardsley@arm.com 14310905Sandreas.sandberg@arm.com public: 14410259SAndrew.Bardsley@arm.com 14510259SAndrew.Bardsley@arm.com /** Number of instructions committed. */ 14610259SAndrew.Bardsley@arm.com Counter numInst; 14710905Sandreas.sandberg@arm.com /** Stat for number instructions committed. */ 14810259SAndrew.Bardsley@arm.com Stats::Scalar numInsts; 14910905Sandreas.sandberg@arm.com /** Number of ops (including micro ops) committed. */ 15010905Sandreas.sandberg@arm.com Counter numOp; 15110259SAndrew.Bardsley@arm.com /** Stat for number ops (including micro ops) committed. */ 15210259SAndrew.Bardsley@arm.com Stats::Scalar numOps; 15310259SAndrew.Bardsley@arm.com /** Stat for number of memory references. */ 15410905Sandreas.sandberg@arm.com Stats::Scalar numMemRefs; 15510259SAndrew.Bardsley@arm.com 15610905Sandreas.sandberg@arm.com /** Number of simulated loads, used for tracking events based on 15710905Sandreas.sandberg@arm.com * the number of loads committed. 15810259SAndrew.Bardsley@arm.com */ 15910259SAndrew.Bardsley@arm.com Counter numLoad; 16010259SAndrew.Bardsley@arm.com 16110259SAndrew.Bardsley@arm.com /** The number of simulated loads committed prior to this run. */ 16210259SAndrew.Bardsley@arm.com Counter startNumLoad; 16310259SAndrew.Bardsley@arm.com 16410259SAndrew.Bardsley@arm.com protected: 16510259SAndrew.Bardsley@arm.com ThreadContext::Status _status; 16610259SAndrew.Bardsley@arm.com 16710259SAndrew.Bardsley@arm.com // Pointer to the base CPU. 16810259SAndrew.Bardsley@arm.com BaseCPU *baseCpu; 16910259SAndrew.Bardsley@arm.com 17010259SAndrew.Bardsley@arm.com // system wide HW context id 17110259SAndrew.Bardsley@arm.com ContextID _contextId; 17210259SAndrew.Bardsley@arm.com 17310259SAndrew.Bardsley@arm.com // Index of hardware thread context on the CPU that this represents. 17410259SAndrew.Bardsley@arm.com ThreadID _threadId; 17510259SAndrew.Bardsley@arm.com 17610259SAndrew.Bardsley@arm.com public: 17710259SAndrew.Bardsley@arm.com /** Last time activate was called on this thread. */ 17810259SAndrew.Bardsley@arm.com Tick lastActivate; 17910259SAndrew.Bardsley@arm.com 18010259SAndrew.Bardsley@arm.com /** Last time suspend was called on this thread. */ 18110259SAndrew.Bardsley@arm.com Tick lastSuspend; 18210259SAndrew.Bardsley@arm.com 18310259SAndrew.Bardsley@arm.com public: 18410259SAndrew.Bardsley@arm.com FunctionProfile *profile; 18510259SAndrew.Bardsley@arm.com ProfileNode *profileNode; 18610259SAndrew.Bardsley@arm.com Addr profilePC; 18710259SAndrew.Bardsley@arm.com EndQuiesceEvent *quiesceEvent; 18810259SAndrew.Bardsley@arm.com 18910259SAndrew.Bardsley@arm.com TheISA::Kernel::Statistics *kernelStats; 19010259SAndrew.Bardsley@arm.com 19110407Smitch.hayenga@arm.com protected: 19210946Sandreas.sandberg@arm.com Process *process; 19310946Sandreas.sandberg@arm.com 19410946Sandreas.sandberg@arm.com /** A port proxy outgoing only for functional accesses to physical 19510946Sandreas.sandberg@arm.com * addresses.*/ 19610946Sandreas.sandberg@arm.com PortProxy *physProxy; 19710946Sandreas.sandberg@arm.com 19810946Sandreas.sandberg@arm.com /** A translating port proxy, outgoing only, for functional 19910259SAndrew.Bardsley@arm.com * accesse to virtual addresses. */ 20010259SAndrew.Bardsley@arm.com FSTranslatingPortProxy *virtProxy; 20110913Sandreas.sandberg@arm.com SETranslatingPortProxy *proxy; 20210913Sandreas.sandberg@arm.com 20310259SAndrew.Bardsley@arm.com public: 20410949Sandreas.sandberg@arm.com /* 20510949Sandreas.sandberg@arm.com * number of executed instructions, for matching with syscall trace 20610949Sandreas.sandberg@arm.com * points in EIO files. 20710949Sandreas.sandberg@arm.com */ 20810949Sandreas.sandberg@arm.com Counter funcExeInst; 20910259SAndrew.Bardsley@arm.com 21010259SAndrew.Bardsley@arm.com // 21110259SAndrew.Bardsley@arm.com // Count failed store conditionals so we can warn of apparent 21210259SAndrew.Bardsley@arm.com // application deadlock situations. 21310913Sandreas.sandberg@arm.com unsigned storeCondFailures; 21410259SAndrew.Bardsley@arm.com}; 21510913Sandreas.sandberg@arm.com 21610913Sandreas.sandberg@arm.com#endif // __CPU_THREAD_STATE_HH__ 21710259SAndrew.Bardsley@arm.com