thread_state.cc revision 6221
12SN/A/* 21762SN/A * Copyright (c) 2006 The Regents of The University of Michigan 37897Shestness@cs.utexas.edu * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272SN/A * 282665Ssaidi@eecs.umich.edu * Authors: Kevin Lim 292665Ssaidi@eecs.umich.edu */ 302665Ssaidi@eecs.umich.edu 317897Shestness@cs.utexas.edu#include "base/output.hh" 322SN/A#include "cpu/base.hh" 332SN/A#include "cpu/profile.hh" 341388SN/A#include "cpu/thread_state.hh" 358229Snate@binkert.org#include "mem/port.hh" 362SN/A#include "mem/translating_port.hh" 372SN/A#include "sim/serialize.hh" 387781SAli.Saidi@ARM.com 398229Snate@binkert.org#if FULL_SYSTEM 401191SN/A#include "arch/kernel_stats.hh" 411191SN/A#include "cpu/quiesce_event.hh" 421388SN/A#include "mem/vport.hh" 435529Snate@binkert.org#endif 441717SN/A 452651Ssaidi@eecs.umich.edu#if FULL_SYSTEM 468229Snate@binkert.orgThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid) 472680Sktlim@umich.edu#else 488232Snate@binkert.orgThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, 495529Snate@binkert.org Process *_process, short _asid) 508779Sgblack@eecs.umich.edu#endif 512190SN/A : numInst(0), numLoad(0), _status(ThreadContext::Halted), 5256SN/A baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0), 538229Snate@binkert.org#if FULL_SYSTEM 542190SN/A profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL), 552SN/A kernelStats(NULL), physPort(NULL), virtPort(NULL), 562359SN/A#else 572359SN/A port(NULL), process(_process), asid(_asid), 582359SN/A#endif 592SN/A microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0) 602SN/A{ 612SN/A} 622SN/A 632SN/AThreadState::~ThreadState() 642SN/A{ 652SN/A#if !FULL_SYSTEM 662SN/A if (port) { 672SN/A delete port->getPeer(); 685606Snate@binkert.org delete port; 696144Sksewell@umich.edu } 706144Sksewell@umich.edu#endif 713126Sktlim@umich.edu} 726144Sksewell@umich.edu 737823Ssteve.reinhardt@amd.comvoid 743126Sktlim@umich.eduThreadState::serialize(std::ostream &os) 753126Sktlim@umich.edu{ 762356SN/A SERIALIZE_ENUM(_status); 772356SN/A // thread_num and cpu_id are deterministic from the config 782356SN/A SERIALIZE_SCALAR(funcExeInst); 792367SN/A SERIALIZE_SCALAR(inst); 802356SN/A SERIALIZE_SCALAR(microPC); 816144Sksewell@umich.edu SERIALIZE_SCALAR(nextMicroPC); 822367SN/A 836144Sksewell@umich.edu#if FULL_SYSTEM 846144Sksewell@umich.edu Tick quiesceEndTick = 0; 856144Sksewell@umich.edu if (quiesceEvent->scheduled()) 862356SN/A quiesceEndTick = quiesceEvent->when(); 872367SN/A SERIALIZE_SCALAR(quiesceEndTick); 886144Sksewell@umich.edu if (kernelStats) 897823Ssteve.reinhardt@amd.com kernelStats->serialize(os); 906144Sksewell@umich.edu#endif 912367SN/A} 922356SN/A 936144Sksewell@umich.eduvoid 946144Sksewell@umich.eduThreadState::unserialize(Checkpoint *cp, const std::string §ion) 957823Ssteve.reinhardt@amd.com{ 962356SN/A 972356SN/A UNSERIALIZE_ENUM(_status); 982356SN/A // thread_num and cpu_id are deterministic from the config 995336Shines@cs.fsu.edu UNSERIALIZE_SCALAR(funcExeInst); 1002356SN/A UNSERIALIZE_SCALAR(inst); 1014873Sstever@eecs.umich.edu UNSERIALIZE_SCALAR(microPC); 1022356SN/A UNSERIALIZE_SCALAR(nextMicroPC); 1032356SN/A 1041400SN/A#if FULL_SYSTEM 1055712Shsul@eecs.umich.edu Tick quiesceEndTick; 1065712Shsul@eecs.umich.edu UNSERIALIZE_SCALAR(quiesceEndTick); 1076221Snate@binkert.org if (quiesceEndTick) 1083661Srdreslin@umich.edu baseCpu->schedule(quiesceEvent, quiesceEndTick); 1092SN/A if (kernelStats) 1107823Ssteve.reinhardt@amd.com kernelStats->unserialize(cp, section); 1111062SN/A#endif 1125712Shsul@eecs.umich.edu} 1135712Shsul@eecs.umich.edu 1145712Shsul@eecs.umich.edu#if FULL_SYSTEM 1155712Shsul@eecs.umich.eduvoid 1165712Shsul@eecs.umich.eduThreadState::connectMemPorts(ThreadContext *tc) 1172SN/A{ 1182SN/A connectPhysPort(); 1192SN/A connectVirtPort(tc); 1205712Shsul@eecs.umich.edu} 1215712Shsul@eecs.umich.edu 1226221Snate@binkert.orgvoid 1236221Snate@binkert.orgThreadState::connectPhysPort() 1242SN/A{ 1252SN/A // @todo: For now this disregards any older port that may have 1266221Snate@binkert.org // already existed. Fix this memory leak once the bus port IDs 1276221Snate@binkert.org // for functional ports is resolved. 1286221Snate@binkert.org if (physPort) 1296221Snate@binkert.org physPort->removeConn(); 1302SN/A else 1312SN/A physPort = new FunctionalPort(csprintf("%s-%d-funcport", 1322SN/A baseCpu->name(), _threadId)); 1332SN/A connectToMemFunc(physPort); 1345606Snate@binkert.org} 1355606Snate@binkert.org 1366221Snate@binkert.orgvoid 1375606Snate@binkert.orgThreadState::connectVirtPort(ThreadContext *tc) 1386221Snate@binkert.org{ 1395606Snate@binkert.org // @todo: For now this disregards any older port that may have 1405606Snate@binkert.org // already existed. Fix this memory leak once the bus port IDs 1412SN/A // for functional ports is resolved. 1421400SN/A if (virtPort) 1435606Snate@binkert.org virtPort->removeConn(); 1445606Snate@binkert.org else 1452SN/A virtPort = new VirtualPort(csprintf("%s-%d-vport", 1462SN/A baseCpu->name(), _threadId), tc); 1472SN/A connectToMemFunc(virtPort); 1482SN/A} 1496221Snate@binkert.org 1506221Snate@binkert.orgvoid 1515606Snate@binkert.orgThreadState::profileClear() 1526670Shsul@eecs.umich.edu{ 1535606Snate@binkert.org if (profile) 1542SN/A profile->clear(); 1552SN/A} 156124SN/A 1576221Snate@binkert.orgvoid 1586221Snate@binkert.orgThreadState::profileSample() 1596221Snate@binkert.org{ 160124SN/A if (profile) 161124SN/A profile->sample(profileNode, profilePC); 162124SN/A} 163124SN/A 1645606Snate@binkert.org#else 1655606Snate@binkert.orgTranslatingPort * 1666221Snate@binkert.orgThreadState::getMemPort() 1675606Snate@binkert.org{ 1686221Snate@binkert.org if (port != NULL) 1695606Snate@binkert.org return port; 1705606Snate@binkert.org 171124SN/A /* Use this port to for syscall emulation writes to memory. */ 1721400SN/A port = new TranslatingPort(csprintf("%s-%d-funcport", baseCpu->name(), _threadId), 1735606Snate@binkert.org process, TranslatingPort::NextPage); 174124SN/A 175124SN/A connectToMemFunc(port); 176124SN/A 177124SN/A return port; 1786221Snate@binkert.org} 1796221Snate@binkert.org#endif 1805606Snate@binkert.org 1816221Snate@binkert.orgvoid 1825606Snate@binkert.orgThreadState::connectToMemFunc(Port *port) 183124SN/A{ 184124SN/A Port *dcache_port, *func_mem_port; 1851191SN/A 1865529Snate@binkert.org dcache_port = baseCpu->getPort("dcache_port"); 1871388SN/A assert(dcache_port != NULL); 1881191SN/A 1895529Snate@binkert.org MemObject *mem_object = dcache_port->getPeer()->getOwner(); 1901191SN/A assert(mem_object != NULL); 1915529Snate@binkert.org 1921191SN/A func_mem_port = mem_object->getPort("functional"); 1931191SN/A assert(func_mem_port != NULL); 1945606Snate@binkert.org 1955606Snate@binkert.org func_mem_port->setPeer(port); 1965606Snate@binkert.org port->setPeer(func_mem_port); 1971191SN/A} 1981191SN/A