base.cc revision 14055
1/* 2 * Copyright (c) 2012-2013, 2016-2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Thomas Grass 38 * Andreas Hansson 39 * Sascha Bischoff 40 */ 41#include "cpu/testers/traffic_gen/base.hh" 42 43#include <sstream> 44 45#include "base/intmath.hh" 46#include "base/random.hh" 47#include "config/have_protobuf.hh" 48#include "cpu/testers/traffic_gen/base_gen.hh" 49#include "cpu/testers/traffic_gen/dram_gen.hh" 50#include "cpu/testers/traffic_gen/dram_rot_gen.hh" 51#include "cpu/testers/traffic_gen/exit_gen.hh" 52#include "cpu/testers/traffic_gen/idle_gen.hh" 53#include "cpu/testers/traffic_gen/linear_gen.hh" 54#include "cpu/testers/traffic_gen/random_gen.hh" 55#include "cpu/testers/traffic_gen/stream_gen.hh" 56#include "debug/Checkpoint.hh" 57#include "debug/TrafficGen.hh" 58#include "params/BaseTrafficGen.hh" 59#include "sim/sim_exit.hh" 60#include "sim/stats.hh" 61#include "sim/system.hh" 62 63#if HAVE_PROTOBUF 64#include "cpu/testers/traffic_gen/trace_gen.hh" 65#endif 66 67 68using namespace std; 69 70BaseTrafficGen::BaseTrafficGen(const BaseTrafficGenParams* p) 71 : ClockedObject(p), 72 system(p->system), 73 elasticReq(p->elastic_req), 74 progressCheck(p->progress_check), 75 noProgressEvent([this]{ noProgress(); }, name()), 76 nextTransitionTick(0), 77 nextPacketTick(0), 78 maxOutstandingReqs(p->max_outstanding_reqs), 79 port(name() + ".port", *this), 80 retryPkt(NULL), 81 retryPktTick(0), blockedWaitingResp(false), 82 updateEvent([this]{ update(); }, name()), 83 masterID(system->getMasterId(this)), 84 streamGenerator(StreamGen::create(p)) 85{ 86} 87 88BaseTrafficGen::~BaseTrafficGen() 89{ 90} 91 92Port & 93BaseTrafficGen::getPort(const string &if_name, PortID idx) 94{ 95 if (if_name == "port") { 96 return port; 97 } else { 98 return ClockedObject::getPort(if_name, idx); 99 } 100} 101 102void 103BaseTrafficGen::init() 104{ 105 ClockedObject::init(); 106 107 if (!port.isConnected()) 108 fatal("The port of %s is not connected!\n", name()); 109} 110 111DrainState 112BaseTrafficGen::drain() 113{ 114 if (!updateEvent.scheduled()) { 115 // no event has been scheduled yet (e.g. switched from atomic mode) 116 return DrainState::Drained; 117 } 118 119 if (retryPkt == NULL) { 120 // shut things down 121 nextPacketTick = MaxTick; 122 nextTransitionTick = MaxTick; 123 deschedule(updateEvent); 124 return DrainState::Drained; 125 } else { 126 return DrainState::Draining; 127 } 128} 129 130void 131BaseTrafficGen::serialize(CheckpointOut &cp) const 132{ 133 warn("%s serialization does not keep all traffic generator" 134 " internal state\n", name()); 135 136 DPRINTF(Checkpoint, "Serializing BaseTrafficGen\n"); 137 138 // save ticks of the graph event if it is scheduled 139 Tick nextEvent = updateEvent.scheduled() ? updateEvent.when() : 0; 140 141 DPRINTF(TrafficGen, "Saving nextEvent=%llu\n", nextEvent); 142 143 SERIALIZE_SCALAR(nextEvent); 144 145 SERIALIZE_SCALAR(nextTransitionTick); 146 147 SERIALIZE_SCALAR(nextPacketTick); 148} 149 150void 151BaseTrafficGen::unserialize(CheckpointIn &cp) 152{ 153 warn("%s serialization does not restore all traffic generator" 154 " internal state\n", name()); 155 156 // restore scheduled events 157 Tick nextEvent; 158 UNSERIALIZE_SCALAR(nextEvent); 159 if (nextEvent != 0) 160 schedule(updateEvent, nextEvent); 161 162 UNSERIALIZE_SCALAR(nextTransitionTick); 163 164 UNSERIALIZE_SCALAR(nextPacketTick); 165} 166 167void 168BaseTrafficGen::update() 169{ 170 // shift our progress-tracking event forward 171 reschedule(noProgressEvent, curTick() + progressCheck, true); 172 173 // if we have reached the time for the next state transition, then 174 // perform the transition 175 if (curTick() >= nextTransitionTick) { 176 transition(); 177 } else { 178 assert(curTick() >= nextPacketTick); 179 // get the next packet and try to send it 180 PacketPtr pkt = activeGenerator->getNextPacket(); 181 182 // If generating stream/substream IDs are enabled, 183 // try to pick and assign them to the new packet 184 if (streamGenerator) { 185 auto sid = streamGenerator->pickStreamID(); 186 auto ssid = streamGenerator->pickSubStreamID(); 187 188 pkt->req->setStreamId(sid); 189 190 if (streamGenerator->ssidValid()) { 191 pkt->req->setSubStreamId(ssid); 192 } 193 } 194 195 // suppress packets that are not destined for a memory, such as 196 // device accesses that could be part of a trace 197 if (pkt && system->isMemAddr(pkt->getAddr())) { 198 numPackets++; 199 // Only attempts to send if not blocked by pending responses 200 blockedWaitingResp = allocateWaitingRespSlot(pkt); 201 if (blockedWaitingResp || !port.sendTimingReq(pkt)) { 202 retryPkt = pkt; 203 retryPktTick = curTick(); 204 } 205 } else if (pkt) { 206 DPRINTF(TrafficGen, "Suppressed packet %s 0x%x\n", 207 pkt->cmdString(), pkt->getAddr()); 208 209 ++numSuppressed; 210 if (!(static_cast<int>(numSuppressed.value()) % 10000)) 211 warn("%s suppressed %d packets with non-memory addresses\n", 212 name(), numSuppressed.value()); 213 214 delete pkt; 215 pkt = nullptr; 216 } 217 } 218 219 // if we are waiting for a retry or for a response, do not schedule any 220 // further events, in the case of a transition or a successful send, go 221 // ahead and determine when the next update should take place 222 if (retryPkt == NULL) { 223 nextPacketTick = activeGenerator->nextPacketTick(elasticReq, 0); 224 scheduleUpdate(); 225 } 226} 227 228void 229BaseTrafficGen::transition() 230{ 231 if (activeGenerator) 232 activeGenerator->exit(); 233 234 activeGenerator = nextGenerator(); 235 236 if (activeGenerator) { 237 const Tick duration = activeGenerator->duration; 238 if (duration != MaxTick && duration != 0) { 239 // we could have been delayed and not transitioned on the 240 // exact tick when we were supposed to (due to back 241 // pressure when sending a packet) 242 nextTransitionTick = curTick() + duration; 243 } else { 244 nextTransitionTick = MaxTick; 245 } 246 247 activeGenerator->enter(); 248 nextPacketTick = activeGenerator->nextPacketTick(elasticReq, 0); 249 } else { 250 nextPacketTick = MaxTick; 251 nextTransitionTick = MaxTick; 252 assert(!updateEvent.scheduled()); 253 } 254} 255 256void 257BaseTrafficGen::scheduleUpdate() 258{ 259 // Has the generator run out of work? In that case, force a 260 // transition if a transition period hasn't been configured. 261 while (activeGenerator && 262 nextPacketTick == MaxTick && nextTransitionTick == MaxTick) { 263 transition(); 264 } 265 266 if (!activeGenerator) 267 return; 268 269 // schedule next update event based on either the next execute 270 // tick or the next transition, which ever comes first 271 const Tick nextEventTick = std::min(nextPacketTick, nextTransitionTick); 272 273 DPRINTF(TrafficGen, "Next event scheduled at %lld\n", nextEventTick); 274 275 // The next transition tick may be in the past if there was a 276 // retry, so ensure that we don't schedule anything in the past. 277 schedule(updateEvent, std::max(curTick(), nextEventTick)); 278} 279 280void 281BaseTrafficGen::start() 282{ 283 transition(); 284 scheduleUpdate(); 285} 286 287void 288BaseTrafficGen::recvReqRetry() 289{ 290 DPRINTF(TrafficGen, "Received retry\n"); 291 numRetries++; 292 retryReq(); 293} 294 295void 296BaseTrafficGen::retryReq() 297{ 298 assert(retryPkt != NULL); 299 assert(retryPktTick != 0); 300 assert(!blockedWaitingResp); 301 302 // attempt to send the packet, and if we are successful start up 303 // the machinery again 304 if (port.sendTimingReq(retryPkt)) { 305 retryPkt = NULL; 306 // remember how much delay was incurred due to back-pressure 307 // when sending the request, we also use this to derive 308 // the tick for the next packet 309 Tick delay = curTick() - retryPktTick; 310 retryPktTick = 0; 311 retryTicks += delay; 312 313 if (drainState() != DrainState::Draining) { 314 // packet is sent, so find out when the next one is due 315 nextPacketTick = activeGenerator->nextPacketTick(elasticReq, 316 delay); 317 scheduleUpdate(); 318 } else { 319 // shut things down 320 nextPacketTick = MaxTick; 321 nextTransitionTick = MaxTick; 322 signalDrainDone(); 323 } 324 } 325} 326 327void 328BaseTrafficGen::noProgress() 329{ 330 fatal("BaseTrafficGen %s spent %llu ticks without making progress", 331 name(), progressCheck); 332} 333 334void 335BaseTrafficGen::regStats() 336{ 337 ClockedObject::regStats(); 338 339 // Initialise all the stats 340 using namespace Stats; 341 342 numPackets 343 .name(name() + ".numPackets") 344 .desc("Number of packets generated"); 345 346 numSuppressed 347 .name(name() + ".numSuppressed") 348 .desc("Number of suppressed packets to non-memory space"); 349 350 numRetries 351 .name(name() + ".numRetries") 352 .desc("Number of retries"); 353 354 retryTicks 355 .name(name() + ".retryTicks") 356 .desc("Time spent waiting due to back-pressure (ticks)"); 357 358 bytesRead 359 .name(name() + ".bytesRead") 360 .desc("Number of bytes read"); 361 362 bytesWritten 363 .name(name() + ".bytesWritten") 364 .desc("Number of bytes written"); 365 366 totalReadLatency 367 .name(name() + ".totalReadLatency") 368 .desc("Total latency of read requests"); 369 370 totalWriteLatency 371 .name(name() + ".totalWriteLatency") 372 .desc("Total latency of write requests"); 373 374 totalReads 375 .name(name() + ".totalReads") 376 .desc("Total num of reads"); 377 378 totalWrites 379 .name(name() + ".totalWrites") 380 .desc("Total num of writes"); 381 382 avgReadLatency 383 .name(name() + ".avgReadLatency") 384 .desc("Avg latency of read requests"); 385 avgReadLatency = totalReadLatency / totalReads; 386 387 avgWriteLatency 388 .name(name() + ".avgWriteLatency") 389 .desc("Avg latency of write requests"); 390 avgWriteLatency = totalWriteLatency / totalWrites; 391 392 readBW 393 .name(name() + ".readBW") 394 .desc("Read bandwidth in bytes/s"); 395 readBW = bytesRead / simSeconds; 396 397 writeBW 398 .name(name() + ".writeBW") 399 .desc("Write bandwidth in bytes/s"); 400 writeBW = bytesWritten / simSeconds; 401 402} 403 404std::shared_ptr<BaseGen> 405BaseTrafficGen::createIdle(Tick duration) 406{ 407 return std::shared_ptr<BaseGen>(new IdleGen(*this, masterID, duration)); 408} 409 410std::shared_ptr<BaseGen> 411BaseTrafficGen::createExit(Tick duration) 412{ 413 return std::shared_ptr<BaseGen>(new ExitGen(*this, masterID, duration)); 414} 415 416std::shared_ptr<BaseGen> 417BaseTrafficGen::createLinear(Tick duration, 418 Addr start_addr, Addr end_addr, Addr blocksize, 419 Tick min_period, Tick max_period, 420 uint8_t read_percent, Addr data_limit) 421{ 422 return std::shared_ptr<BaseGen>(new LinearGen(*this, masterID, 423 duration, start_addr, 424 end_addr, blocksize, 425 system->cacheLineSize(), 426 min_period, max_period, 427 read_percent, data_limit)); 428} 429 430std::shared_ptr<BaseGen> 431BaseTrafficGen::createRandom(Tick duration, 432 Addr start_addr, Addr end_addr, Addr blocksize, 433 Tick min_period, Tick max_period, 434 uint8_t read_percent, Addr data_limit) 435{ 436 return std::shared_ptr<BaseGen>(new RandomGen(*this, masterID, 437 duration, start_addr, 438 end_addr, blocksize, 439 system->cacheLineSize(), 440 min_period, max_period, 441 read_percent, data_limit)); 442} 443 444std::shared_ptr<BaseGen> 445BaseTrafficGen::createDram(Tick duration, 446 Addr start_addr, Addr end_addr, Addr blocksize, 447 Tick min_period, Tick max_period, 448 uint8_t read_percent, Addr data_limit, 449 unsigned int num_seq_pkts, unsigned int page_size, 450 unsigned int nbr_of_banks_DRAM, 451 unsigned int nbr_of_banks_util, 452 unsigned int addr_mapping, 453 unsigned int nbr_of_ranks) 454{ 455 return std::shared_ptr<BaseGen>(new DramGen(*this, masterID, 456 duration, start_addr, 457 end_addr, blocksize, 458 system->cacheLineSize(), 459 min_period, max_period, 460 read_percent, data_limit, 461 num_seq_pkts, page_size, 462 nbr_of_banks_DRAM, 463 nbr_of_banks_util, 464 addr_mapping, 465 nbr_of_ranks)); 466} 467 468std::shared_ptr<BaseGen> 469BaseTrafficGen::createDramRot(Tick duration, 470 Addr start_addr, Addr end_addr, Addr blocksize, 471 Tick min_period, Tick max_period, 472 uint8_t read_percent, Addr data_limit, 473 unsigned int num_seq_pkts, 474 unsigned int page_size, 475 unsigned int nbr_of_banks_DRAM, 476 unsigned int nbr_of_banks_util, 477 unsigned int addr_mapping, 478 unsigned int nbr_of_ranks, 479 unsigned int max_seq_count_per_rank) 480{ 481 return std::shared_ptr<BaseGen>(new DramRotGen(*this, masterID, 482 duration, start_addr, 483 end_addr, blocksize, 484 system->cacheLineSize(), 485 min_period, max_period, 486 read_percent, data_limit, 487 num_seq_pkts, page_size, 488 nbr_of_banks_DRAM, 489 nbr_of_banks_util, 490 addr_mapping, 491 nbr_of_ranks, 492 max_seq_count_per_rank)); 493} 494 495std::shared_ptr<BaseGen> 496BaseTrafficGen::createTrace(Tick duration, 497 const std::string& trace_file, Addr addr_offset) 498{ 499#if HAVE_PROTOBUF 500 return std::shared_ptr<BaseGen>( 501 new TraceGen(*this, masterID, duration, trace_file, addr_offset)); 502#else 503 panic("Can't instantiate trace generation without Protobuf support!\n"); 504#endif 505} 506 507bool 508BaseTrafficGen::recvTimingResp(PacketPtr pkt) 509{ 510 auto iter = waitingResp.find(pkt->req); 511 512 panic_if(iter == waitingResp.end(), "%s: " 513 "Received unexpected response [%s reqPtr=%x]\n", 514 pkt->print(), pkt->req); 515 516 assert(iter->second <= curTick()); 517 518 if (pkt->isWrite()) { 519 ++totalWrites; 520 bytesWritten += pkt->req->getSize(); 521 totalWriteLatency += curTick() - iter->second; 522 } else { 523 ++totalReads; 524 bytesRead += pkt->req->getSize(); 525 totalReadLatency += curTick() - iter->second; 526 } 527 528 waitingResp.erase(iter); 529 530 delete pkt; 531 532 // Sends up the request if we were blocked 533 if (blockedWaitingResp) { 534 blockedWaitingResp = false; 535 retryReq(); 536 } 537 538 return true; 539} 540