RubyTester.py revision 13892
12567SN/A# Copyright (c) 2005-2007 The Regents of The University of Michigan 212531Sandreas.sandberg@arm.com# Copyright (c) 2009 Advanced Micro Devices, Inc. 37650SAli.Saidi@ARM.com# All rights reserved. 47650SAli.Saidi@ARM.com# 57650SAli.Saidi@ARM.com# Redistribution and use in source and binary forms, with or without 67650SAli.Saidi@ARM.com# modification, are permitted provided that the following conditions are 77650SAli.Saidi@ARM.com# met: redistributions of source code must retain the above copyright 87650SAli.Saidi@ARM.com# notice, this list of conditions and the following disclaimer; 97650SAli.Saidi@ARM.com# redistributions in binary form must reproduce the above copyright 107650SAli.Saidi@ARM.com# notice, this list of conditions and the following disclaimer in the 117650SAli.Saidi@ARM.com# documentation and/or other materials provided with the distribution; 127650SAli.Saidi@ARM.com# neither the name of the copyright holders nor the names of its 137650SAli.Saidi@ARM.com# contributors may be used to endorse or promote products derived from 142567SN/A# this software without specific prior written permission. 152567SN/A# 162567SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172567SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182567SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192567SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202567SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212567SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222567SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232567SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242567SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252567SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262567SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272567SN/A# 282567SN/Afrom m5.params import * 292567SN/Afrom m5.proxy import * 302567SN/A 312567SN/Afrom m5.objects.ClockedObject import ClockedObject 322567SN/A 332567SN/Aclass RubyTester(ClockedObject): 342567SN/A type = 'RubyTester' 352567SN/A cxx_header = "cpu/testers/rubytest/RubyTester.hh" 362567SN/A num_cpus = Param.Int("number of cpus / RubyPorts") 372567SN/A cpuInstDataPort = VectorMasterPort("cpu combo ports to inst & data caches") 382567SN/A cpuInstPort = VectorMasterPort("cpu ports to only inst caches") 392665SN/A cpuDataPort = VectorMasterPort("cpu ports to only data caches") 402665SN/A checks_to_complete = Param.Int(100, "checks to complete") 412567SN/A deadlock_threshold = Param.Int(50000, "how often to check for deadlock") 422567SN/A wakeup_frequency = Param.Int(10, "number of cycles between wakeups") 436757SAli.Saidi@ARM.com check_flush = Param.Bool(False, "check cache flushing") 446757SAli.Saidi@ARM.com system = Param.System(Parent.any, "System we belong to") 452567SN/A