RubyTester.hh revision 11025:4872dbdea907
1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
15 * Copyright (c) 2009 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42#ifndef __CPU_RUBYTEST_RUBYTESTER_HH__
43#define __CPU_RUBYTEST_RUBYTESTER_HH__
44
45#include <iostream>
46#include <string>
47#include <vector>
48
49#include "cpu/testers/rubytest/CheckTable.hh"
50#include "mem/mem_object.hh"
51#include "mem/packet.hh"
52#include "mem/ruby/common/SubBlock.hh"
53#include "mem/ruby/common/TypeDefines.hh"
54#include "params/RubyTester.hh"
55
56class RubyTester : public MemObject
57{
58  public:
59    class CpuPort : public MasterPort
60    {
61      private:
62        RubyTester *tester;
63
64      public:
65        //
66        // Currently, each instatiation of the RubyTester::CpuPort supports
67        // only instruction or data requests, not both.  However, for those
68        // RubyPorts that support both types of requests, separate InstOnly
69        // and DataOnly CpuPorts will map to that RubyPort
70
71        CpuPort(const std::string &_name, RubyTester *_tester, PortID _id)
72            : MasterPort(_name, _tester, _id), tester(_tester)
73        {}
74
75      protected:
76        virtual bool recvTimingResp(PacketPtr pkt);
77        virtual void recvReqRetry()
78        { panic("%s does not expect a retry\n", name()); }
79    };
80
81    struct SenderState : public Packet::SenderState
82    {
83        SubBlock subBlock;
84
85        SenderState(Addr addr, int size) : subBlock(addr, size) {}
86
87    };
88
89    typedef RubyTesterParams Params;
90    RubyTester(const Params *p);
91    ~RubyTester();
92
93    virtual BaseMasterPort &getMasterPort(const std::string &if_name,
94                                          PortID idx = InvalidPortID);
95
96    bool isInstReadableCpuPort(int idx);
97
98    MasterPort* getReadableCpuPort(int idx);
99    MasterPort* getWritableCpuPort(int idx);
100
101    virtual void init();
102
103    void wakeup();
104
105    void incrementCheckCompletions() { m_checks_completed++; }
106
107    void printStats(std::ostream& out) const {}
108    void clearStats() {}
109    void printConfig(std::ostream& out) const {}
110
111    void print(std::ostream& out) const;
112    bool getCheckFlush() { return m_check_flush; }
113
114    MasterID masterId() { return _masterId; }
115  protected:
116    class CheckStartEvent : public Event
117    {
118      private:
119        RubyTester *tester;
120
121      public:
122        CheckStartEvent(RubyTester *_tester)
123            : Event(CPU_Tick_Pri), tester(_tester)
124        {}
125        void process() { tester->wakeup(); }
126        virtual const char *description() const { return "RubyTester tick"; }
127    };
128
129    CheckStartEvent checkStartEvent;
130
131    MasterID _masterId;
132
133  private:
134    void hitCallback(NodeID proc, SubBlock* data);
135
136    void checkForDeadlock();
137
138    // Private copy constructor and assignment operator
139    RubyTester(const RubyTester& obj);
140    RubyTester& operator=(const RubyTester& obj);
141
142    CheckTable* m_checkTable_ptr;
143    std::vector<Cycles> m_last_progress_vector;
144
145    int m_num_cpus;
146    uint64 m_checks_completed;
147    std::vector<MasterPort*> writePorts;
148    std::vector<MasterPort*> readPorts;
149    uint64 m_checks_to_complete;
150    int m_deadlock_threshold;
151    int m_num_writers;
152    int m_num_readers;
153    int m_wakeup_frequency;
154    bool m_check_flush;
155    int m_num_inst_ports;
156};
157
158inline std::ostream&
159operator<<(std::ostream& out, const RubyTester& obj)
160{
161    obj.print(out);
162    out << std::flush;
163    return out;
164}
165
166#endif // __CPU_RUBYTEST_RUBYTESTER_HH__
167