Check.hh revision 7632
16899SN/A/*
26899SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
36899SN/A * Copyright (c) 2009 Advanced Micro Devices, Inc.
46899SN/A * All rights reserved.
56899SN/A *
66899SN/A * Redistribution and use in source and binary forms, with or without
76899SN/A * modification, are permitted provided that the following conditions are
86899SN/A * met: redistributions of source code must retain the above copyright
96899SN/A * notice, this list of conditions and the following disclaimer;
106899SN/A * redistributions in binary form must reproduce the above copyright
116899SN/A * notice, this list of conditions and the following disclaimer in the
126899SN/A * documentation and/or other materials provided with the distribution;
136899SN/A * neither the name of the copyright holders nor the names of its
146899SN/A * contributors may be used to endorse or promote products derived from
156899SN/A * this software without specific prior written permission.
166899SN/A *
176899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
186899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
196899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
206899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
216899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
226899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
236899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
246899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
256899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
266899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
276899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
286899SN/A */
296899SN/A
307053SN/A#ifndef __CPU_RUBYTEST_CHECK_HH__
317053SN/A#define __CPU_RUBYTEST_CHECK_HH__
326899SN/A
337055SN/A#include <iostream>
347055SN/A
357632SBrad.Beckmann@amd.com#include "cpu/testers/rubytest/RubyTester.hh"
367053SN/A#include "mem/protocol/AccessModeType.hh"
377053SN/A#include "mem/protocol/TesterStatus.hh"
387053SN/A#include "mem/ruby/common/Address.hh"
396899SN/A#include "mem/ruby/common/Global.hh"
406899SN/A#include "mem/ruby/system/NodeID.hh"
417053SN/A
426899SN/Aclass SubBlock;
436899SN/A
446899SN/Aconst int CHECK_SIZE_BITS = 2;
457053SN/Aconst int CHECK_SIZE = (1 << CHECK_SIZE_BITS);
466899SN/A
477053SN/Aclass Check
487053SN/A{
497053SN/A  public:
507053SN/A    Check(const Address& address, const Address& pc, int _num_cpu_sequencer,
517053SN/A          RubyTester* _tester);
526899SN/A
537053SN/A    void initiate(); // Does Action or Check or nether
547053SN/A    void performCallback(NodeID proc, SubBlock* data);
557053SN/A    const Address& getAddress() { return m_address; }
567053SN/A    void changeAddress(const Address& address);
576899SN/A
587055SN/A    void print(std::ostream& out) const;
596899SN/A
607053SN/A  private:
617053SN/A    void initiatePrefetch();
627053SN/A    void initiateAction();
637053SN/A    void initiateCheck();
646899SN/A
657053SN/A    void pickValue();
667053SN/A    void pickInitiatingNode();
676899SN/A
687053SN/A    void debugPrint();
696899SN/A
707053SN/A    TesterStatus m_status;
717053SN/A    uint8 m_value;
727053SN/A    int m_store_count;
737053SN/A    NodeID m_initiatingNode;
747053SN/A    Address m_address;
757053SN/A    Address m_pc;
767053SN/A    AccessModeType m_access_mode;
777053SN/A    int m_num_cpu_sequencers;
787053SN/A    RubyTester* m_tester_ptr;
796899SN/A};
806899SN/A
817055SN/Ainline std::ostream&
827055SN/Aoperator<<(std::ostream& out, const Check& obj)
836899SN/A{
847053SN/A    obj.print(out);
857055SN/A    out << std::flush;
867053SN/A    return out;
876899SN/A}
886899SN/A
897053SN/A#endif // __CPU_RUBYTEST_CHECK_HH__
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