Check.cc revision 9171
16899SN/A/* 26899SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36899SN/A * Copyright (c) 2009 Advanced Micro Devices, Inc. 46899SN/A * All rights reserved. 56899SN/A * 66899SN/A * Redistribution and use in source and binary forms, with or without 76899SN/A * modification, are permitted provided that the following conditions are 86899SN/A * met: redistributions of source code must retain the above copyright 96899SN/A * notice, this list of conditions and the following disclaimer; 106899SN/A * redistributions in binary form must reproduce the above copyright 116899SN/A * notice, this list of conditions and the following disclaimer in the 126899SN/A * documentation and/or other materials provided with the distribution; 136899SN/A * neither the name of the copyright holders nor the names of its 146899SN/A * contributors may be used to endorse or promote products derived from 156899SN/A * this software without specific prior written permission. 166899SN/A * 176899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286899SN/A */ 296899SN/A 307632SBrad.Beckmann@amd.com#include "cpu/testers/rubytest/Check.hh" 318232Snate@binkert.org#include "debug/RubyTest.hh" 327053SN/A#include "mem/ruby/common/SubBlock.hh" 336899SN/A#include "mem/ruby/system/Sequencer.hh" 346899SN/A#include "mem/ruby/system/System.hh" 356899SN/A 367053SN/Atypedef RubyTester::SenderState SenderState; 377053SN/A 387053SN/ACheck::Check(const Address& address, const Address& pc, 398932SBrad.Beckmann@amd.com int _num_writers, int _num_readers, RubyTester* _tester) 408932SBrad.Beckmann@amd.com : m_num_writers(_num_writers), m_num_readers(_num_readers), 418932SBrad.Beckmann@amd.com m_tester_ptr(_tester) 426899SN/A{ 437053SN/A m_status = TesterStatus_Idle; 446899SN/A 457053SN/A pickValue(); 467053SN/A pickInitiatingNode(); 477053SN/A changeAddress(address); 487053SN/A m_pc = pc; 498164Snilay@cs.wisc.edu m_access_mode = RubyAccessMode(random() % RubyAccessMode_NUM); 507053SN/A m_store_count = 0; 516899SN/A} 526899SN/A 537053SN/Avoid 547053SN/ACheck::initiate() 556899SN/A{ 567053SN/A DPRINTF(RubyTest, "initiating\n"); 577053SN/A debugPrint(); 586899SN/A 597053SN/A // currently no protocols support prefetches 607053SN/A if (false && (random() & 0xf) == 0) { 617053SN/A initiatePrefetch(); // Prefetch from random processor 627053SN/A } 636899SN/A 648184Ssomayeh@cs.wisc.edu if (m_tester_ptr->getCheckFlush() && (random() & 0xff) == 0) { 658184Ssomayeh@cs.wisc.edu initiateFlush(); // issue a Flush request from random processor 668184Ssomayeh@cs.wisc.edu } 678184Ssomayeh@cs.wisc.edu 687053SN/A if (m_status == TesterStatus_Idle) { 697053SN/A initiateAction(); 707053SN/A } else if (m_status == TesterStatus_Ready) { 717053SN/A initiateCheck(); 727053SN/A } else { 737053SN/A // Pending - do nothing 747053SN/A DPRINTF(RubyTest, 757053SN/A "initiating action/check - failed: action/check is pending\n"); 767053SN/A } 776899SN/A} 786899SN/A 797053SN/Avoid 807053SN/ACheck::initiatePrefetch() 816899SN/A{ 827053SN/A DPRINTF(RubyTest, "initiating prefetch\n"); 836899SN/A 848932SBrad.Beckmann@amd.com int index = random() % m_num_readers; 858950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 866899SN/A 877053SN/A Request::Flags flags; 887053SN/A flags.set(Request::PREFETCH); 896899SN/A 907053SN/A Packet::Command cmd; 916899SN/A 927053SN/A // 1 in 8 chance this will be an exclusive prefetch 937053SN/A if ((random() & 0x7) != 0) { 947053SN/A cmd = MemCmd::ReadReq; 957053SN/A 968932SBrad.Beckmann@amd.com // if necessary, make the request an instruction fetch 978950Sandreas.hansson@arm.com if (m_tester_ptr->isInstReadableCpuPort(index)) { 987053SN/A flags.set(Request::INST_FETCH); 997053SN/A } 1007053SN/A } else { 1017053SN/A cmd = MemCmd::WriteReq; 1027053SN/A flags.set(Request::PF_EXCLUSIVE); 1036899SN/A } 1046899SN/A 1057568SN/A // Prefetches are assumed to be 0 sized 1068832SAli.Saidi@ARM.com Request *req = new Request(m_address.getAddress(), 0, flags, 1078832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 1088190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 1097568SN/A 1108949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1116899SN/A 1127053SN/A // push the subblock onto the sender state. The sequencer will 1137053SN/A // update the subblock on the return 1147053SN/A pkt->senderState = 1157053SN/A new SenderState(m_address, req->getSize(), pkt->senderState); 1166899SN/A 1178975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1187053SN/A DPRINTF(RubyTest, "successfully initiated prefetch.\n"); 1197053SN/A } else { 1207053SN/A // If the packet did not issue, must delete 1217053SN/A SenderState* senderState = safe_cast<SenderState*>(pkt->senderState); 1227053SN/A pkt->senderState = senderState->saved; 1237053SN/A delete senderState; 1247053SN/A delete pkt->req; 1257053SN/A delete pkt; 1266899SN/A 1277053SN/A DPRINTF(RubyTest, 1287053SN/A "prefetch initiation failed because Port was busy.\n"); 1297053SN/A } 1306899SN/A} 1316899SN/A 1327053SN/Avoid 1338184Ssomayeh@cs.wisc.eduCheck::initiateFlush() 1348184Ssomayeh@cs.wisc.edu{ 1358184Ssomayeh@cs.wisc.edu 1368184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush\n"); 1378184Ssomayeh@cs.wisc.edu 1388932SBrad.Beckmann@amd.com int index = random() % m_num_writers; 1398950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1408184Ssomayeh@cs.wisc.edu 1418184Ssomayeh@cs.wisc.edu Request::Flags flags; 1428184Ssomayeh@cs.wisc.edu 1438832SAli.Saidi@ARM.com Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 1448832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 1458184Ssomayeh@cs.wisc.edu 1468184Ssomayeh@cs.wisc.edu Packet::Command cmd; 1478184Ssomayeh@cs.wisc.edu 1488184Ssomayeh@cs.wisc.edu cmd = MemCmd::FlushReq; 1498184Ssomayeh@cs.wisc.edu 1508949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1518184Ssomayeh@cs.wisc.edu 1528184Ssomayeh@cs.wisc.edu // push the subblock onto the sender state. The sequencer will 1538184Ssomayeh@cs.wisc.edu // update the subblock on the return 1548184Ssomayeh@cs.wisc.edu pkt->senderState = 1558184Ssomayeh@cs.wisc.edu new SenderState(m_address, req->getSize(), pkt->senderState); 1568184Ssomayeh@cs.wisc.edu 1578975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1588184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush - successful\n"); 1598184Ssomayeh@cs.wisc.edu } 1608184Ssomayeh@cs.wisc.edu} 1618184Ssomayeh@cs.wisc.edu 1628184Ssomayeh@cs.wisc.eduvoid 1637053SN/ACheck::initiateAction() 1646899SN/A{ 1657053SN/A DPRINTF(RubyTest, "initiating Action\n"); 1667053SN/A assert(m_status == TesterStatus_Idle); 1676899SN/A 1688932SBrad.Beckmann@amd.com int index = random() % m_num_writers; 1698950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1706899SN/A 1717053SN/A Request::Flags flags; 1726899SN/A 1737053SN/A // Create the particular address for the next byte to be written 1747053SN/A Address writeAddr(m_address.getAddress() + m_store_count); 1756899SN/A 1767053SN/A // Stores are assumed to be 1 byte-sized 1778832SAli.Saidi@ARM.com Request *req = new Request(writeAddr.getAddress(), 1, flags, 1788832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), 1797053SN/A m_pc.getAddress()); 1806899SN/A 1818190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 1827053SN/A Packet::Command cmd; 1837053SN/A 1847053SN/A // 1 out of 8 chance, issue an atomic rather than a write 1857053SN/A // if ((random() & 0x7) == 0) { 1867053SN/A // cmd = MemCmd::SwapReq; 1877053SN/A // } else { 1886899SN/A cmd = MemCmd::WriteReq; 1897053SN/A // } 1906899SN/A 1918949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1927053SN/A uint8_t* writeData = new uint8_t; 1937053SN/A *writeData = m_value + m_store_count; 1947053SN/A pkt->dataDynamic(writeData); 1956899SN/A 1967053SN/A DPRINTF(RubyTest, "data 0x%x check 0x%x\n", 1977053SN/A *(pkt->getPtr<uint8_t>()), *writeData); 1986899SN/A 1997053SN/A // push the subblock onto the sender state. The sequencer will 2007053SN/A // update the subblock on the return 2017053SN/A pkt->senderState = 2027053SN/A new SenderState(writeAddr, req->getSize(), pkt->senderState); 2036899SN/A 2048975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2057053SN/A DPRINTF(RubyTest, "initiating action - successful\n"); 2067053SN/A DPRINTF(RubyTest, "status before action update: %s\n", 2077053SN/A (TesterStatus_to_string(m_status)).c_str()); 2087053SN/A m_status = TesterStatus_Action_Pending; 2097053SN/A } else { 2107053SN/A // If the packet did not issue, must delete 2117053SN/A // Note: No need to delete the data, the packet destructor 2127053SN/A // will delete it 2137053SN/A SenderState* senderState = safe_cast<SenderState*>(pkt->senderState); 2147053SN/A pkt->senderState = senderState->saved; 2157053SN/A delete senderState; 2167053SN/A delete pkt->req; 2177053SN/A delete pkt; 2187053SN/A 2197053SN/A DPRINTF(RubyTest, "failed to initiate action - sequencer not ready\n"); 2207053SN/A } 2217053SN/A 2227053SN/A DPRINTF(RubyTest, "status after action update: %s\n", 2236899SN/A (TesterStatus_to_string(m_status)).c_str()); 2246899SN/A} 2256899SN/A 2267053SN/Avoid 2277053SN/ACheck::initiateCheck() 2286899SN/A{ 2297053SN/A DPRINTF(RubyTest, "Initiating Check\n"); 2307053SN/A assert(m_status == TesterStatus_Ready); 2316899SN/A 2328932SBrad.Beckmann@amd.com int index = random() % m_num_readers; 2338950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 2346899SN/A 2357053SN/A Request::Flags flags; 2366899SN/A 2378932SBrad.Beckmann@amd.com // If necessary, make the request an instruction fetch 2388950Sandreas.hansson@arm.com if (m_tester_ptr->isInstReadableCpuPort(index)) { 2397053SN/A flags.set(Request::INST_FETCH); 2407053SN/A } 2416899SN/A 2427568SN/A // Checks are sized depending on the number of bytes written 2437568SN/A Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 2448832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 2457568SN/A 2468190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 2478949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, MemCmd::ReadReq); 2487053SN/A uint8_t* dataArray = new uint8_t[CHECK_SIZE]; 2497053SN/A pkt->dataDynamicArray(dataArray); 2506899SN/A 2517053SN/A // push the subblock onto the sender state. The sequencer will 2527053SN/A // update the subblock on the return 2537053SN/A pkt->senderState = 2547053SN/A new SenderState(m_address, req->getSize(), pkt->senderState); 2556899SN/A 2568975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2577053SN/A DPRINTF(RubyTest, "initiating check - successful\n"); 2587053SN/A DPRINTF(RubyTest, "status before check update: %s\n", 2597053SN/A TesterStatus_to_string(m_status).c_str()); 2607053SN/A m_status = TesterStatus_Check_Pending; 2617053SN/A } else { 2627053SN/A // If the packet did not issue, must delete 2637053SN/A // Note: No need to delete the data, the packet destructor 2647053SN/A // will delete it 2657053SN/A SenderState* senderState = safe_cast<SenderState*>(pkt->senderState); 2667053SN/A pkt->senderState = senderState->saved; 2677053SN/A delete senderState; 2687053SN/A delete pkt->req; 2697053SN/A delete pkt; 2706899SN/A 2717053SN/A DPRINTF(RubyTest, "failed to initiate check - cpu port not ready\n"); 2727053SN/A } 2737053SN/A 2747053SN/A DPRINTF(RubyTest, "status after check update: %s\n", 2757053SN/A TesterStatus_to_string(m_status).c_str()); 2766899SN/A} 2776899SN/A 2787053SN/Avoid 2797053SN/ACheck::performCallback(NodeID proc, SubBlock* data) 2806899SN/A{ 2817053SN/A Address address = data->getAddress(); 2826899SN/A 2837053SN/A // This isn't exactly right since we now have multi-byte checks 2847053SN/A // assert(getAddress() == address); 2856899SN/A 2867053SN/A assert(getAddress().getLineAddress() == address.getLineAddress()); 2877053SN/A assert(data != NULL); 2887053SN/A 2897053SN/A DPRINTF(RubyTest, "RubyTester Callback\n"); 2906899SN/A debugPrint(); 2916899SN/A 2927053SN/A if (m_status == TesterStatus_Action_Pending) { 2937053SN/A DPRINTF(RubyTest, "Action callback write value: %d, currently %d\n", 2947053SN/A (m_value + m_store_count), data->getByte(0)); 2957053SN/A // Perform store one byte at a time 2967053SN/A data->setByte(0, (m_value + m_store_count)); 2977053SN/A m_store_count++; 2987053SN/A if (m_store_count == CHECK_SIZE) { 2997053SN/A m_status = TesterStatus_Ready; 3007053SN/A } else { 3017053SN/A m_status = TesterStatus_Idle; 3027053SN/A } 3037053SN/A DPRINTF(RubyTest, "Action callback return data now %d\n", 3047053SN/A data->getByte(0)); 3057053SN/A } else if (m_status == TesterStatus_Check_Pending) { 3067053SN/A DPRINTF(RubyTest, "Check callback\n"); 3077053SN/A // Perform load/check 3087053SN/A for (int byte_number=0; byte_number<CHECK_SIZE; byte_number++) { 3097053SN/A if (uint8(m_value + byte_number) != data->getByte(byte_number)) { 3107805Snilay@cs.wisc.edu panic("Action/check failure: proc: %d address: %s data: %s " 3117805Snilay@cs.wisc.edu "byte_number: %d m_value+byte_number: %d byte: %d %s" 3127805Snilay@cs.wisc.edu "Time: %d\n", 3137805Snilay@cs.wisc.edu proc, address, data, byte_number, 3147805Snilay@cs.wisc.edu (int)m_value + byte_number, 3157805Snilay@cs.wisc.edu (int)data->getByte(byte_number), *this, 3169171Snilay@cs.wisc.edu g_system_ptr->getTime()); 3177053SN/A } 3187053SN/A } 3197053SN/A DPRINTF(RubyTest, "Action/check success\n"); 3207053SN/A debugPrint(); 3216899SN/A 3227053SN/A // successful check complete, increment complete 3237053SN/A m_tester_ptr->incrementCheckCompletions(); 3246899SN/A 3257053SN/A m_status = TesterStatus_Idle; 3267053SN/A pickValue(); 3277053SN/A 3287053SN/A } else { 3297805Snilay@cs.wisc.edu panic("Unexpected TesterStatus: %s proc: %d data: %s m_status: %s " 3307805Snilay@cs.wisc.edu "time: %d\n", 3319171Snilay@cs.wisc.edu *this, proc, data, m_status, g_system_ptr->getTime()); 3327053SN/A } 3337053SN/A 3347053SN/A DPRINTF(RubyTest, "proc: %d, Address: 0x%x\n", proc, 3357053SN/A getAddress().getLineAddress()); 3367053SN/A DPRINTF(RubyTest, "Callback done\n"); 3377053SN/A debugPrint(); 3386899SN/A} 3396899SN/A 3407053SN/Avoid 3417053SN/ACheck::changeAddress(const Address& address) 3426899SN/A{ 3437053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3447053SN/A m_status = TesterStatus_Idle; 3457053SN/A m_address = address; 3467053SN/A m_store_count = 0; 3476899SN/A} 3486899SN/A 3497053SN/Avoid 3507053SN/ACheck::pickValue() 3516899SN/A{ 3527053SN/A assert(m_status == TesterStatus_Idle); 3537053SN/A m_status = TesterStatus_Idle; 3547053SN/A m_value = random() & 0xff; // One byte 3557053SN/A m_store_count = 0; 3566899SN/A} 3576899SN/A 3587053SN/Avoid 3597053SN/ACheck::pickInitiatingNode() 3606899SN/A{ 3617053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3627053SN/A m_status = TesterStatus_Idle; 3638932SBrad.Beckmann@amd.com m_initiatingNode = (random() % m_num_writers); 3647053SN/A DPRINTF(RubyTest, "picked initiating node %d\n", m_initiatingNode); 3657053SN/A m_store_count = 0; 3666899SN/A} 3676899SN/A 3687053SN/Avoid 3697055SN/ACheck::print(std::ostream& out) const 3706899SN/A{ 3717053SN/A out << "[" 3727053SN/A << m_address << ", value: " 3737053SN/A << (int)m_value << ", status: " 3747053SN/A << m_status << ", initiating node: " 3757053SN/A << m_initiatingNode << ", store_count: " 3767053SN/A << m_store_count 3777055SN/A << "]" << std::flush; 3786899SN/A} 3796899SN/A 3807053SN/Avoid 3817053SN/ACheck::debugPrint() 3826899SN/A{ 3837053SN/A DPRINTF(RubyTest, 3847053SN/A "[%#x, value: %d, status: %s, initiating node: %d, store_count: %d]\n", 3857053SN/A m_address.getAddress(), (int)m_value, 3867053SN/A TesterStatus_to_string(m_status).c_str(), 3877053SN/A m_initiatingNode, m_store_count); 3886899SN/A} 389