Check.cc revision 11793
16899SN/A/* 26899SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36899SN/A * Copyright (c) 2009 Advanced Micro Devices, Inc. 46899SN/A * All rights reserved. 56899SN/A * 66899SN/A * Redistribution and use in source and binary forms, with or without 76899SN/A * modification, are permitted provided that the following conditions are 86899SN/A * met: redistributions of source code must retain the above copyright 96899SN/A * notice, this list of conditions and the following disclaimer; 106899SN/A * redistributions in binary form must reproduce the above copyright 116899SN/A * notice, this list of conditions and the following disclaimer in the 126899SN/A * documentation and/or other materials provided with the distribution; 136899SN/A * neither the name of the copyright holders nor the names of its 146899SN/A * contributors may be used to endorse or promote products derived from 156899SN/A * this software without specific prior written permission. 166899SN/A * 176899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286899SN/A */ 296899SN/A 3011793Sbrandon.potter@amd.com#include "cpu/testers/rubytest/Check.hh" 3111793Sbrandon.potter@amd.com 3210348Sandreas.hansson@arm.com#include "base/random.hh" 338232Snate@binkert.org#include "debug/RubyTest.hh" 347053SN/A#include "mem/ruby/common/SubBlock.hh" 356899SN/A 367053SN/Atypedef RubyTester::SenderState SenderState; 377053SN/A 3811025Snilay@cs.wisc.eduCheck::Check(Addr address, Addr pc, int _num_writers, int _num_readers, 3911025Snilay@cs.wisc.edu RubyTester* _tester) 408932SBrad.Beckmann@amd.com : m_num_writers(_num_writers), m_num_readers(_num_readers), 418932SBrad.Beckmann@amd.com m_tester_ptr(_tester) 426899SN/A{ 437053SN/A m_status = TesterStatus_Idle; 446899SN/A 457053SN/A pickValue(); 467053SN/A pickInitiatingNode(); 477053SN/A changeAddress(address); 487053SN/A m_pc = pc; 4910348Sandreas.hansson@arm.com m_access_mode = RubyAccessMode(random_mt.random(0, 5010348Sandreas.hansson@arm.com RubyAccessMode_NUM - 1)); 517053SN/A m_store_count = 0; 526899SN/A} 536899SN/A 547053SN/Avoid 557053SN/ACheck::initiate() 566899SN/A{ 577053SN/A DPRINTF(RubyTest, "initiating\n"); 587053SN/A debugPrint(); 596899SN/A 607053SN/A // currently no protocols support prefetches 6110348Sandreas.hansson@arm.com if (false && (random_mt.random(0, 0xf) == 0)) { 627053SN/A initiatePrefetch(); // Prefetch from random processor 637053SN/A } 646899SN/A 6510348Sandreas.hansson@arm.com if (m_tester_ptr->getCheckFlush() && (random_mt.random(0, 0xff) == 0)) { 668184Ssomayeh@cs.wisc.edu initiateFlush(); // issue a Flush request from random processor 678184Ssomayeh@cs.wisc.edu } 688184Ssomayeh@cs.wisc.edu 697053SN/A if (m_status == TesterStatus_Idle) { 707053SN/A initiateAction(); 717053SN/A } else if (m_status == TesterStatus_Ready) { 727053SN/A initiateCheck(); 737053SN/A } else { 747053SN/A // Pending - do nothing 757053SN/A DPRINTF(RubyTest, 767053SN/A "initiating action/check - failed: action/check is pending\n"); 777053SN/A } 786899SN/A} 796899SN/A 807053SN/Avoid 817053SN/ACheck::initiatePrefetch() 826899SN/A{ 837053SN/A DPRINTF(RubyTest, "initiating prefetch\n"); 846899SN/A 8510348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_readers - 1); 868950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 876899SN/A 887053SN/A Request::Flags flags; 897053SN/A flags.set(Request::PREFETCH); 906899SN/A 917053SN/A Packet::Command cmd; 926899SN/A 937053SN/A // 1 in 8 chance this will be an exclusive prefetch 9410348Sandreas.hansson@arm.com if (random_mt.random(0, 0x7) != 0) { 957053SN/A cmd = MemCmd::ReadReq; 967053SN/A 978932SBrad.Beckmann@amd.com // if necessary, make the request an instruction fetch 9811266SBrad.Beckmann@amd.com if (m_tester_ptr->isInstOnlyCpuPort(index) || 9911266SBrad.Beckmann@amd.com (m_tester_ptr->isInstDataCpuPort(index) && 10011266SBrad.Beckmann@amd.com (random_mt.random(0, 0x1)))) { 1017053SN/A flags.set(Request::INST_FETCH); 1027053SN/A } 1037053SN/A } else { 1047053SN/A cmd = MemCmd::WriteReq; 1057053SN/A flags.set(Request::PF_EXCLUSIVE); 1066899SN/A } 1076899SN/A 1087568SN/A // Prefetches are assumed to be 0 sized 10911025Snilay@cs.wisc.edu Request *req = new Request(m_address, 0, flags, 11011025Snilay@cs.wisc.edu m_tester_ptr->masterId(), curTick(), m_pc); 11111435Smitch.hayenga@arm.com req->setContext(index); 1127568SN/A 1138949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 11410562Sandreas.hansson@arm.com // despite the oddity of the 0 size (questionable if this should 11510562Sandreas.hansson@arm.com // even be allowed), a prefetch is still a read and as such needs 11610562Sandreas.hansson@arm.com // a place to store the result 11710566Sandreas.hansson@arm.com uint8_t *data = new uint8_t[1]; 11810562Sandreas.hansson@arm.com pkt->dataDynamic(data); 1196899SN/A 1207053SN/A // push the subblock onto the sender state. The sequencer will 1217053SN/A // update the subblock on the return 1229542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 1236899SN/A 1248975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1257053SN/A DPRINTF(RubyTest, "successfully initiated prefetch.\n"); 1267053SN/A } else { 1277053SN/A // If the packet did not issue, must delete 1289542Sandreas.hansson@arm.com delete pkt->senderState; 1297053SN/A delete pkt->req; 1307053SN/A delete pkt; 1316899SN/A 1327053SN/A DPRINTF(RubyTest, 1337053SN/A "prefetch initiation failed because Port was busy.\n"); 1347053SN/A } 1356899SN/A} 1366899SN/A 1377053SN/Avoid 1388184Ssomayeh@cs.wisc.eduCheck::initiateFlush() 1398184Ssomayeh@cs.wisc.edu{ 1408184Ssomayeh@cs.wisc.edu 1418184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush\n"); 1428184Ssomayeh@cs.wisc.edu 14310348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_writers - 1); 1448950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1458184Ssomayeh@cs.wisc.edu 1468184Ssomayeh@cs.wisc.edu Request::Flags flags; 1478184Ssomayeh@cs.wisc.edu 14811025Snilay@cs.wisc.edu Request *req = new Request(m_address, CHECK_SIZE, flags, 14911025Snilay@cs.wisc.edu m_tester_ptr->masterId(), curTick(), m_pc); 1508184Ssomayeh@cs.wisc.edu 1518184Ssomayeh@cs.wisc.edu Packet::Command cmd; 1528184Ssomayeh@cs.wisc.edu 1538184Ssomayeh@cs.wisc.edu cmd = MemCmd::FlushReq; 1548184Ssomayeh@cs.wisc.edu 1558949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1568184Ssomayeh@cs.wisc.edu 1578184Ssomayeh@cs.wisc.edu // push the subblock onto the sender state. The sequencer will 1588184Ssomayeh@cs.wisc.edu // update the subblock on the return 1599542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 1608184Ssomayeh@cs.wisc.edu 1618975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1628184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush - successful\n"); 1638184Ssomayeh@cs.wisc.edu } 1648184Ssomayeh@cs.wisc.edu} 1658184Ssomayeh@cs.wisc.edu 1668184Ssomayeh@cs.wisc.eduvoid 1677053SN/ACheck::initiateAction() 1686899SN/A{ 1697053SN/A DPRINTF(RubyTest, "initiating Action\n"); 1707053SN/A assert(m_status == TesterStatus_Idle); 1716899SN/A 17210348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_writers - 1); 1738950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1746899SN/A 1757053SN/A Request::Flags flags; 1766899SN/A 1777053SN/A // Create the particular address for the next byte to be written 17811025Snilay@cs.wisc.edu Addr writeAddr(m_address + m_store_count); 1796899SN/A 1807053SN/A // Stores are assumed to be 1 byte-sized 18111025Snilay@cs.wisc.edu Request *req = new Request(writeAddr, 1, flags, m_tester_ptr->masterId(), 18211025Snilay@cs.wisc.edu curTick(), m_pc); 1836899SN/A 18411435Smitch.hayenga@arm.com req->setContext(index); 1857053SN/A Packet::Command cmd; 1867053SN/A 1877053SN/A // 1 out of 8 chance, issue an atomic rather than a write 1887053SN/A // if ((random() & 0x7) == 0) { 1897053SN/A // cmd = MemCmd::SwapReq; 1907053SN/A // } else { 1916899SN/A cmd = MemCmd::WriteReq; 1927053SN/A // } 1936899SN/A 1948949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 19510566Sandreas.hansson@arm.com uint8_t *writeData = new uint8_t[1]; 1967053SN/A *writeData = m_value + m_store_count; 1977053SN/A pkt->dataDynamic(writeData); 1986899SN/A 19911266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Seq write: index %d data 0x%x check 0x%x\n", index, 20010563Sandreas.hansson@arm.com *(pkt->getConstPtr<uint8_t>()), *writeData); 2016899SN/A 2027053SN/A // push the subblock onto the sender state. The sequencer will 2037053SN/A // update the subblock on the return 2049542Sandreas.hansson@arm.com pkt->senderState = new SenderState(writeAddr, req->getSize()); 2056899SN/A 2068975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2077053SN/A DPRINTF(RubyTest, "initiating action - successful\n"); 2087053SN/A DPRINTF(RubyTest, "status before action update: %s\n", 2097053SN/A (TesterStatus_to_string(m_status)).c_str()); 2107053SN/A m_status = TesterStatus_Action_Pending; 21111266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Action_Pending\n", m_address); 2127053SN/A } else { 2137053SN/A // If the packet did not issue, must delete 2147053SN/A // Note: No need to delete the data, the packet destructor 2157053SN/A // will delete it 2169542Sandreas.hansson@arm.com delete pkt->senderState; 2177053SN/A delete pkt->req; 2187053SN/A delete pkt; 2197053SN/A 2207053SN/A DPRINTF(RubyTest, "failed to initiate action - sequencer not ready\n"); 2217053SN/A } 2227053SN/A 2237053SN/A DPRINTF(RubyTest, "status after action update: %s\n", 2246899SN/A (TesterStatus_to_string(m_status)).c_str()); 2256899SN/A} 2266899SN/A 2277053SN/Avoid 2287053SN/ACheck::initiateCheck() 2296899SN/A{ 2307053SN/A DPRINTF(RubyTest, "Initiating Check\n"); 2317053SN/A assert(m_status == TesterStatus_Ready); 2326899SN/A 23310348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_readers - 1); 2348950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 2356899SN/A 2367053SN/A Request::Flags flags; 2376899SN/A 2388932SBrad.Beckmann@amd.com // If necessary, make the request an instruction fetch 23911266SBrad.Beckmann@amd.com if (m_tester_ptr->isInstOnlyCpuPort(index) || 24011266SBrad.Beckmann@amd.com (m_tester_ptr->isInstDataCpuPort(index) && 24111266SBrad.Beckmann@amd.com (random_mt.random(0, 0x1)))) { 2427053SN/A flags.set(Request::INST_FETCH); 2437053SN/A } 2446899SN/A 2457568SN/A // Checks are sized depending on the number of bytes written 24611025Snilay@cs.wisc.edu Request *req = new Request(m_address, CHECK_SIZE, flags, 24711025Snilay@cs.wisc.edu m_tester_ptr->masterId(), curTick(), m_pc); 2487568SN/A 24911435Smitch.hayenga@arm.com req->setContext(index); 2508949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, MemCmd::ReadReq); 2519208Snilay@cs.wisc.edu uint8_t *dataArray = new uint8_t[CHECK_SIZE]; 25210566Sandreas.hansson@arm.com pkt->dataDynamic(dataArray); 2536899SN/A 25411266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Seq read: index %d\n", index); 25511266SBrad.Beckmann@amd.com 2567053SN/A // push the subblock onto the sender state. The sequencer will 2577053SN/A // update the subblock on the return 2589542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 2596899SN/A 2608975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2617053SN/A DPRINTF(RubyTest, "initiating check - successful\n"); 2627053SN/A DPRINTF(RubyTest, "status before check update: %s\n", 2637053SN/A TesterStatus_to_string(m_status).c_str()); 2647053SN/A m_status = TesterStatus_Check_Pending; 26511266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Check_Pending\n", m_address); 2667053SN/A } else { 2677053SN/A // If the packet did not issue, must delete 2687053SN/A // Note: No need to delete the data, the packet destructor 2697053SN/A // will delete it 2709542Sandreas.hansson@arm.com delete pkt->senderState; 2717053SN/A delete pkt->req; 2727053SN/A delete pkt; 2736899SN/A 2747053SN/A DPRINTF(RubyTest, "failed to initiate check - cpu port not ready\n"); 2757053SN/A } 2767053SN/A 2777053SN/A DPRINTF(RubyTest, "status after check update: %s\n", 2787053SN/A TesterStatus_to_string(m_status).c_str()); 2796899SN/A} 2806899SN/A 2817053SN/Avoid 28210302Snilay@cs.wisc.eduCheck::performCallback(NodeID proc, SubBlock* data, Cycles curTime) 2836899SN/A{ 28411025Snilay@cs.wisc.edu Addr address = data->getAddress(); 2856899SN/A 2867053SN/A // This isn't exactly right since we now have multi-byte checks 2877053SN/A // assert(getAddress() == address); 2886899SN/A 28911025Snilay@cs.wisc.edu assert(makeLineAddress(m_address) == makeLineAddress(address)); 2907053SN/A assert(data != NULL); 2917053SN/A 2927053SN/A DPRINTF(RubyTest, "RubyTester Callback\n"); 2936899SN/A debugPrint(); 2946899SN/A 2957053SN/A if (m_status == TesterStatus_Action_Pending) { 2967053SN/A DPRINTF(RubyTest, "Action callback write value: %d, currently %d\n", 2977053SN/A (m_value + m_store_count), data->getByte(0)); 2987053SN/A // Perform store one byte at a time 2997053SN/A data->setByte(0, (m_value + m_store_count)); 3007053SN/A m_store_count++; 3017053SN/A if (m_store_count == CHECK_SIZE) { 3027053SN/A m_status = TesterStatus_Ready; 30311266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Ready\n", m_address); 3047053SN/A } else { 3057053SN/A m_status = TesterStatus_Idle; 30611266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Idle store_count: %d\n", 30711266SBrad.Beckmann@amd.com m_address, m_store_count); 3087053SN/A } 3097053SN/A DPRINTF(RubyTest, "Action callback return data now %d\n", 3107053SN/A data->getByte(0)); 3117053SN/A } else if (m_status == TesterStatus_Check_Pending) { 3127053SN/A DPRINTF(RubyTest, "Check callback\n"); 3137053SN/A // Perform load/check 3147053SN/A for (int byte_number=0; byte_number<CHECK_SIZE; byte_number++) { 3159208Snilay@cs.wisc.edu if (uint8_t(m_value + byte_number) != data->getByte(byte_number)) { 3167805Snilay@cs.wisc.edu panic("Action/check failure: proc: %d address: %s data: %s " 3177805Snilay@cs.wisc.edu "byte_number: %d m_value+byte_number: %d byte: %d %s" 3187805Snilay@cs.wisc.edu "Time: %d\n", 3197805Snilay@cs.wisc.edu proc, address, data, byte_number, 3207805Snilay@cs.wisc.edu (int)m_value + byte_number, 3219475Snilay@cs.wisc.edu (int)data->getByte(byte_number), *this, curTime); 3227053SN/A } 3237053SN/A } 3247053SN/A DPRINTF(RubyTest, "Action/check success\n"); 3257053SN/A debugPrint(); 3266899SN/A 3277053SN/A // successful check complete, increment complete 3287053SN/A m_tester_ptr->incrementCheckCompletions(); 3296899SN/A 3307053SN/A m_status = TesterStatus_Idle; 33111266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Idle\n", m_address); 3327053SN/A pickValue(); 3337053SN/A 3347053SN/A } else { 3357805Snilay@cs.wisc.edu panic("Unexpected TesterStatus: %s proc: %d data: %s m_status: %s " 3369475Snilay@cs.wisc.edu "time: %d\n", *this, proc, data, m_status, curTime); 3377053SN/A } 3387053SN/A 3397053SN/A DPRINTF(RubyTest, "proc: %d, Address: 0x%x\n", proc, 34011025Snilay@cs.wisc.edu makeLineAddress(m_address)); 3417053SN/A DPRINTF(RubyTest, "Callback done\n"); 3427053SN/A debugPrint(); 3436899SN/A} 3446899SN/A 3457053SN/Avoid 34611025Snilay@cs.wisc.eduCheck::changeAddress(Addr address) 3476899SN/A{ 3487053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3497053SN/A m_status = TesterStatus_Idle; 3507053SN/A m_address = address; 35111266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Idle\n", m_address); 3527053SN/A m_store_count = 0; 3536899SN/A} 3546899SN/A 3557053SN/Avoid 3567053SN/ACheck::pickValue() 3576899SN/A{ 3587053SN/A assert(m_status == TesterStatus_Idle); 35910348Sandreas.hansson@arm.com m_value = random_mt.random(0, 0xff); // One byte 3607053SN/A m_store_count = 0; 3616899SN/A} 3626899SN/A 3637053SN/Avoid 3647053SN/ACheck::pickInitiatingNode() 3656899SN/A{ 3667053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3677053SN/A m_status = TesterStatus_Idle; 36810348Sandreas.hansson@arm.com m_initiatingNode = (random_mt.random(0, m_num_writers - 1)); 36911266SBrad.Beckmann@amd.com DPRINTF(RubyTest, "Check %s, State=Idle, picked initiating node %d\n", 37011266SBrad.Beckmann@amd.com m_address, m_initiatingNode); 3717053SN/A m_store_count = 0; 3726899SN/A} 3736899SN/A 3747053SN/Avoid 3757055SN/ACheck::print(std::ostream& out) const 3766899SN/A{ 3777053SN/A out << "[" 3787053SN/A << m_address << ", value: " 3797053SN/A << (int)m_value << ", status: " 3807053SN/A << m_status << ", initiating node: " 3817053SN/A << m_initiatingNode << ", store_count: " 3827053SN/A << m_store_count 3837055SN/A << "]" << std::flush; 3846899SN/A} 3856899SN/A 3867053SN/Avoid 3877053SN/ACheck::debugPrint() 3886899SN/A{ 3897053SN/A DPRINTF(RubyTest, 3907053SN/A "[%#x, value: %d, status: %s, initiating node: %d, store_count: %d]\n", 39111025Snilay@cs.wisc.edu m_address, (int)m_value, TesterStatus_to_string(m_status).c_str(), 3927053SN/A m_initiatingNode, m_store_count); 3936899SN/A} 394