Check.cc revision 10348
16899SN/A/* 26899SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36899SN/A * Copyright (c) 2009 Advanced Micro Devices, Inc. 46899SN/A * All rights reserved. 56899SN/A * 66899SN/A * Redistribution and use in source and binary forms, with or without 76899SN/A * modification, are permitted provided that the following conditions are 86899SN/A * met: redistributions of source code must retain the above copyright 96899SN/A * notice, this list of conditions and the following disclaimer; 106899SN/A * redistributions in binary form must reproduce the above copyright 116899SN/A * notice, this list of conditions and the following disclaimer in the 126899SN/A * documentation and/or other materials provided with the distribution; 136899SN/A * neither the name of the copyright holders nor the names of its 146899SN/A * contributors may be used to endorse or promote products derived from 156899SN/A * this software without specific prior written permission. 166899SN/A * 176899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286899SN/A */ 296899SN/A 3010348Sandreas.hansson@arm.com#include "base/random.hh" 317632SBrad.Beckmann@amd.com#include "cpu/testers/rubytest/Check.hh" 328232Snate@binkert.org#include "debug/RubyTest.hh" 337053SN/A#include "mem/ruby/common/SubBlock.hh" 346899SN/A#include "mem/ruby/system/Sequencer.hh" 356899SN/A#include "mem/ruby/system/System.hh" 366899SN/A 377053SN/Atypedef RubyTester::SenderState SenderState; 387053SN/A 397053SN/ACheck::Check(const Address& address, const Address& pc, 408932SBrad.Beckmann@amd.com int _num_writers, int _num_readers, RubyTester* _tester) 418932SBrad.Beckmann@amd.com : m_num_writers(_num_writers), m_num_readers(_num_readers), 428932SBrad.Beckmann@amd.com m_tester_ptr(_tester) 436899SN/A{ 447053SN/A m_status = TesterStatus_Idle; 456899SN/A 467053SN/A pickValue(); 477053SN/A pickInitiatingNode(); 487053SN/A changeAddress(address); 497053SN/A m_pc = pc; 5010348Sandreas.hansson@arm.com m_access_mode = RubyAccessMode(random_mt.random(0, 5110348Sandreas.hansson@arm.com RubyAccessMode_NUM - 1)); 527053SN/A m_store_count = 0; 536899SN/A} 546899SN/A 557053SN/Avoid 567053SN/ACheck::initiate() 576899SN/A{ 587053SN/A DPRINTF(RubyTest, "initiating\n"); 597053SN/A debugPrint(); 606899SN/A 617053SN/A // currently no protocols support prefetches 6210348Sandreas.hansson@arm.com if (false && (random_mt.random(0, 0xf) == 0)) { 637053SN/A initiatePrefetch(); // Prefetch from random processor 647053SN/A } 656899SN/A 6610348Sandreas.hansson@arm.com if (m_tester_ptr->getCheckFlush() && (random_mt.random(0, 0xff) == 0)) { 678184Ssomayeh@cs.wisc.edu initiateFlush(); // issue a Flush request from random processor 688184Ssomayeh@cs.wisc.edu } 698184Ssomayeh@cs.wisc.edu 707053SN/A if (m_status == TesterStatus_Idle) { 717053SN/A initiateAction(); 727053SN/A } else if (m_status == TesterStatus_Ready) { 737053SN/A initiateCheck(); 747053SN/A } else { 757053SN/A // Pending - do nothing 767053SN/A DPRINTF(RubyTest, 777053SN/A "initiating action/check - failed: action/check is pending\n"); 787053SN/A } 796899SN/A} 806899SN/A 817053SN/Avoid 827053SN/ACheck::initiatePrefetch() 836899SN/A{ 847053SN/A DPRINTF(RubyTest, "initiating prefetch\n"); 856899SN/A 8610348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_readers - 1); 878950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 886899SN/A 897053SN/A Request::Flags flags; 907053SN/A flags.set(Request::PREFETCH); 916899SN/A 927053SN/A Packet::Command cmd; 936899SN/A 947053SN/A // 1 in 8 chance this will be an exclusive prefetch 9510348Sandreas.hansson@arm.com if (random_mt.random(0, 0x7) != 0) { 967053SN/A cmd = MemCmd::ReadReq; 977053SN/A 988932SBrad.Beckmann@amd.com // if necessary, make the request an instruction fetch 998950Sandreas.hansson@arm.com if (m_tester_ptr->isInstReadableCpuPort(index)) { 1007053SN/A flags.set(Request::INST_FETCH); 1017053SN/A } 1027053SN/A } else { 1037053SN/A cmd = MemCmd::WriteReq; 1047053SN/A flags.set(Request::PF_EXCLUSIVE); 1056899SN/A } 1066899SN/A 1077568SN/A // Prefetches are assumed to be 0 sized 1088832SAli.Saidi@ARM.com Request *req = new Request(m_address.getAddress(), 0, flags, 1098832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 1108190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 1117568SN/A 1128949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1136899SN/A 1147053SN/A // push the subblock onto the sender state. The sequencer will 1157053SN/A // update the subblock on the return 1169542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 1176899SN/A 1188975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1197053SN/A DPRINTF(RubyTest, "successfully initiated prefetch.\n"); 1207053SN/A } else { 1217053SN/A // If the packet did not issue, must delete 1229542Sandreas.hansson@arm.com delete pkt->senderState; 1237053SN/A delete pkt->req; 1247053SN/A delete pkt; 1256899SN/A 1267053SN/A DPRINTF(RubyTest, 1277053SN/A "prefetch initiation failed because Port was busy.\n"); 1287053SN/A } 1296899SN/A} 1306899SN/A 1317053SN/Avoid 1328184Ssomayeh@cs.wisc.eduCheck::initiateFlush() 1338184Ssomayeh@cs.wisc.edu{ 1348184Ssomayeh@cs.wisc.edu 1358184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush\n"); 1368184Ssomayeh@cs.wisc.edu 13710348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_writers - 1); 1388950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1398184Ssomayeh@cs.wisc.edu 1408184Ssomayeh@cs.wisc.edu Request::Flags flags; 1418184Ssomayeh@cs.wisc.edu 1428832SAli.Saidi@ARM.com Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 1438832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 1448184Ssomayeh@cs.wisc.edu 1458184Ssomayeh@cs.wisc.edu Packet::Command cmd; 1468184Ssomayeh@cs.wisc.edu 1478184Ssomayeh@cs.wisc.edu cmd = MemCmd::FlushReq; 1488184Ssomayeh@cs.wisc.edu 1498949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1508184Ssomayeh@cs.wisc.edu 1518184Ssomayeh@cs.wisc.edu // push the subblock onto the sender state. The sequencer will 1528184Ssomayeh@cs.wisc.edu // update the subblock on the return 1539542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 1548184Ssomayeh@cs.wisc.edu 1558975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1568184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush - successful\n"); 1578184Ssomayeh@cs.wisc.edu } 1588184Ssomayeh@cs.wisc.edu} 1598184Ssomayeh@cs.wisc.edu 1608184Ssomayeh@cs.wisc.eduvoid 1617053SN/ACheck::initiateAction() 1626899SN/A{ 1637053SN/A DPRINTF(RubyTest, "initiating Action\n"); 1647053SN/A assert(m_status == TesterStatus_Idle); 1656899SN/A 16610348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_writers - 1); 1678950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1686899SN/A 1697053SN/A Request::Flags flags; 1706899SN/A 1717053SN/A // Create the particular address for the next byte to be written 1727053SN/A Address writeAddr(m_address.getAddress() + m_store_count); 1736899SN/A 1747053SN/A // Stores are assumed to be 1 byte-sized 1758832SAli.Saidi@ARM.com Request *req = new Request(writeAddr.getAddress(), 1, flags, 1768832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), 1777053SN/A m_pc.getAddress()); 1786899SN/A 1798190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 1807053SN/A Packet::Command cmd; 1817053SN/A 1827053SN/A // 1 out of 8 chance, issue an atomic rather than a write 1837053SN/A // if ((random() & 0x7) == 0) { 1847053SN/A // cmd = MemCmd::SwapReq; 1857053SN/A // } else { 1866899SN/A cmd = MemCmd::WriteReq; 1877053SN/A // } 1886899SN/A 1898949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1909208Snilay@cs.wisc.edu uint8_t *writeData = new uint8_t; 1917053SN/A *writeData = m_value + m_store_count; 1927053SN/A pkt->dataDynamic(writeData); 1936899SN/A 1947053SN/A DPRINTF(RubyTest, "data 0x%x check 0x%x\n", 1957053SN/A *(pkt->getPtr<uint8_t>()), *writeData); 1966899SN/A 1977053SN/A // push the subblock onto the sender state. The sequencer will 1987053SN/A // update the subblock on the return 1999542Sandreas.hansson@arm.com pkt->senderState = new SenderState(writeAddr, req->getSize()); 2006899SN/A 2018975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2027053SN/A DPRINTF(RubyTest, "initiating action - successful\n"); 2037053SN/A DPRINTF(RubyTest, "status before action update: %s\n", 2047053SN/A (TesterStatus_to_string(m_status)).c_str()); 2057053SN/A m_status = TesterStatus_Action_Pending; 2067053SN/A } else { 2077053SN/A // If the packet did not issue, must delete 2087053SN/A // Note: No need to delete the data, the packet destructor 2097053SN/A // will delete it 2109542Sandreas.hansson@arm.com delete pkt->senderState; 2117053SN/A delete pkt->req; 2127053SN/A delete pkt; 2137053SN/A 2147053SN/A DPRINTF(RubyTest, "failed to initiate action - sequencer not ready\n"); 2157053SN/A } 2167053SN/A 2177053SN/A DPRINTF(RubyTest, "status after action update: %s\n", 2186899SN/A (TesterStatus_to_string(m_status)).c_str()); 2196899SN/A} 2206899SN/A 2217053SN/Avoid 2227053SN/ACheck::initiateCheck() 2236899SN/A{ 2247053SN/A DPRINTF(RubyTest, "Initiating Check\n"); 2257053SN/A assert(m_status == TesterStatus_Ready); 2266899SN/A 22710348Sandreas.hansson@arm.com int index = random_mt.random(0, m_num_readers - 1); 2288950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 2296899SN/A 2307053SN/A Request::Flags flags; 2316899SN/A 2328932SBrad.Beckmann@amd.com // If necessary, make the request an instruction fetch 2338950Sandreas.hansson@arm.com if (m_tester_ptr->isInstReadableCpuPort(index)) { 2347053SN/A flags.set(Request::INST_FETCH); 2357053SN/A } 2366899SN/A 2377568SN/A // Checks are sized depending on the number of bytes written 2387568SN/A Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 2398832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 2407568SN/A 2418190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 2428949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, MemCmd::ReadReq); 2439208Snilay@cs.wisc.edu uint8_t *dataArray = new uint8_t[CHECK_SIZE]; 2447053SN/A pkt->dataDynamicArray(dataArray); 2456899SN/A 2467053SN/A // push the subblock onto the sender state. The sequencer will 2477053SN/A // update the subblock on the return 2489542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 2496899SN/A 2508975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2517053SN/A DPRINTF(RubyTest, "initiating check - successful\n"); 2527053SN/A DPRINTF(RubyTest, "status before check update: %s\n", 2537053SN/A TesterStatus_to_string(m_status).c_str()); 2547053SN/A m_status = TesterStatus_Check_Pending; 2557053SN/A } else { 2567053SN/A // If the packet did not issue, must delete 2577053SN/A // Note: No need to delete the data, the packet destructor 2587053SN/A // will delete it 2599542Sandreas.hansson@arm.com delete pkt->senderState; 2607053SN/A delete pkt->req; 2617053SN/A delete pkt; 2626899SN/A 2637053SN/A DPRINTF(RubyTest, "failed to initiate check - cpu port not ready\n"); 2647053SN/A } 2657053SN/A 2667053SN/A DPRINTF(RubyTest, "status after check update: %s\n", 2677053SN/A TesterStatus_to_string(m_status).c_str()); 2686899SN/A} 2696899SN/A 2707053SN/Avoid 27110302Snilay@cs.wisc.eduCheck::performCallback(NodeID proc, SubBlock* data, Cycles curTime) 2726899SN/A{ 2737053SN/A Address address = data->getAddress(); 2746899SN/A 2757053SN/A // This isn't exactly right since we now have multi-byte checks 2767053SN/A // assert(getAddress() == address); 2776899SN/A 2787053SN/A assert(getAddress().getLineAddress() == address.getLineAddress()); 2797053SN/A assert(data != NULL); 2807053SN/A 2817053SN/A DPRINTF(RubyTest, "RubyTester Callback\n"); 2826899SN/A debugPrint(); 2836899SN/A 2847053SN/A if (m_status == TesterStatus_Action_Pending) { 2857053SN/A DPRINTF(RubyTest, "Action callback write value: %d, currently %d\n", 2867053SN/A (m_value + m_store_count), data->getByte(0)); 2877053SN/A // Perform store one byte at a time 2887053SN/A data->setByte(0, (m_value + m_store_count)); 2897053SN/A m_store_count++; 2907053SN/A if (m_store_count == CHECK_SIZE) { 2917053SN/A m_status = TesterStatus_Ready; 2927053SN/A } else { 2937053SN/A m_status = TesterStatus_Idle; 2947053SN/A } 2957053SN/A DPRINTF(RubyTest, "Action callback return data now %d\n", 2967053SN/A data->getByte(0)); 2977053SN/A } else if (m_status == TesterStatus_Check_Pending) { 2987053SN/A DPRINTF(RubyTest, "Check callback\n"); 2997053SN/A // Perform load/check 3007053SN/A for (int byte_number=0; byte_number<CHECK_SIZE; byte_number++) { 3019208Snilay@cs.wisc.edu if (uint8_t(m_value + byte_number) != data->getByte(byte_number)) { 3027805Snilay@cs.wisc.edu panic("Action/check failure: proc: %d address: %s data: %s " 3037805Snilay@cs.wisc.edu "byte_number: %d m_value+byte_number: %d byte: %d %s" 3047805Snilay@cs.wisc.edu "Time: %d\n", 3057805Snilay@cs.wisc.edu proc, address, data, byte_number, 3067805Snilay@cs.wisc.edu (int)m_value + byte_number, 3079475Snilay@cs.wisc.edu (int)data->getByte(byte_number), *this, curTime); 3087053SN/A } 3097053SN/A } 3107053SN/A DPRINTF(RubyTest, "Action/check success\n"); 3117053SN/A debugPrint(); 3126899SN/A 3137053SN/A // successful check complete, increment complete 3147053SN/A m_tester_ptr->incrementCheckCompletions(); 3156899SN/A 3167053SN/A m_status = TesterStatus_Idle; 3177053SN/A pickValue(); 3187053SN/A 3197053SN/A } else { 3207805Snilay@cs.wisc.edu panic("Unexpected TesterStatus: %s proc: %d data: %s m_status: %s " 3219475Snilay@cs.wisc.edu "time: %d\n", *this, proc, data, m_status, curTime); 3227053SN/A } 3237053SN/A 3247053SN/A DPRINTF(RubyTest, "proc: %d, Address: 0x%x\n", proc, 3257053SN/A getAddress().getLineAddress()); 3267053SN/A DPRINTF(RubyTest, "Callback done\n"); 3277053SN/A debugPrint(); 3286899SN/A} 3296899SN/A 3307053SN/Avoid 3317053SN/ACheck::changeAddress(const Address& address) 3326899SN/A{ 3337053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3347053SN/A m_status = TesterStatus_Idle; 3357053SN/A m_address = address; 3367053SN/A m_store_count = 0; 3376899SN/A} 3386899SN/A 3397053SN/Avoid 3407053SN/ACheck::pickValue() 3416899SN/A{ 3427053SN/A assert(m_status == TesterStatus_Idle); 3437053SN/A m_status = TesterStatus_Idle; 34410348Sandreas.hansson@arm.com m_value = random_mt.random(0, 0xff); // One byte 3457053SN/A m_store_count = 0; 3466899SN/A} 3476899SN/A 3487053SN/Avoid 3497053SN/ACheck::pickInitiatingNode() 3506899SN/A{ 3517053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3527053SN/A m_status = TesterStatus_Idle; 35310348Sandreas.hansson@arm.com m_initiatingNode = (random_mt.random(0, m_num_writers - 1)); 3547053SN/A DPRINTF(RubyTest, "picked initiating node %d\n", m_initiatingNode); 3557053SN/A m_store_count = 0; 3566899SN/A} 3576899SN/A 3587053SN/Avoid 3597055SN/ACheck::print(std::ostream& out) const 3606899SN/A{ 3617053SN/A out << "[" 3627053SN/A << m_address << ", value: " 3637053SN/A << (int)m_value << ", status: " 3647053SN/A << m_status << ", initiating node: " 3657053SN/A << m_initiatingNode << ", store_count: " 3667053SN/A << m_store_count 3677055SN/A << "]" << std::flush; 3686899SN/A} 3696899SN/A 3707053SN/Avoid 3717053SN/ACheck::debugPrint() 3726899SN/A{ 3737053SN/A DPRINTF(RubyTest, 3747053SN/A "[%#x, value: %d, status: %s, initiating node: %d, store_count: %d]\n", 3757053SN/A m_address.getAddress(), (int)m_value, 3767053SN/A TesterStatus_to_string(m_status).c_str(), 3777053SN/A m_initiatingNode, m_store_count); 3786899SN/A} 379