Check.cc revision 10302
16899SN/A/* 26899SN/A * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 36899SN/A * Copyright (c) 2009 Advanced Micro Devices, Inc. 46899SN/A * All rights reserved. 56899SN/A * 66899SN/A * Redistribution and use in source and binary forms, with or without 76899SN/A * modification, are permitted provided that the following conditions are 86899SN/A * met: redistributions of source code must retain the above copyright 96899SN/A * notice, this list of conditions and the following disclaimer; 106899SN/A * redistributions in binary form must reproduce the above copyright 116899SN/A * notice, this list of conditions and the following disclaimer in the 126899SN/A * documentation and/or other materials provided with the distribution; 136899SN/A * neither the name of the copyright holders nor the names of its 146899SN/A * contributors may be used to endorse or promote products derived from 156899SN/A * this software without specific prior written permission. 166899SN/A * 176899SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186899SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196899SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206899SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216899SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226899SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236899SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246899SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256899SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266899SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276899SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286899SN/A */ 296899SN/A 307632SBrad.Beckmann@amd.com#include "cpu/testers/rubytest/Check.hh" 318232Snate@binkert.org#include "debug/RubyTest.hh" 327053SN/A#include "mem/ruby/common/SubBlock.hh" 336899SN/A#include "mem/ruby/system/Sequencer.hh" 346899SN/A#include "mem/ruby/system/System.hh" 356899SN/A 367053SN/Atypedef RubyTester::SenderState SenderState; 377053SN/A 387053SN/ACheck::Check(const Address& address, const Address& pc, 398932SBrad.Beckmann@amd.com int _num_writers, int _num_readers, RubyTester* _tester) 408932SBrad.Beckmann@amd.com : m_num_writers(_num_writers), m_num_readers(_num_readers), 418932SBrad.Beckmann@amd.com m_tester_ptr(_tester) 426899SN/A{ 437053SN/A m_status = TesterStatus_Idle; 446899SN/A 457053SN/A pickValue(); 467053SN/A pickInitiatingNode(); 477053SN/A changeAddress(address); 487053SN/A m_pc = pc; 498164Snilay@cs.wisc.edu m_access_mode = RubyAccessMode(random() % RubyAccessMode_NUM); 507053SN/A m_store_count = 0; 516899SN/A} 526899SN/A 537053SN/Avoid 547053SN/ACheck::initiate() 556899SN/A{ 567053SN/A DPRINTF(RubyTest, "initiating\n"); 577053SN/A debugPrint(); 586899SN/A 597053SN/A // currently no protocols support prefetches 607053SN/A if (false && (random() & 0xf) == 0) { 617053SN/A initiatePrefetch(); // Prefetch from random processor 627053SN/A } 636899SN/A 648184Ssomayeh@cs.wisc.edu if (m_tester_ptr->getCheckFlush() && (random() & 0xff) == 0) { 658184Ssomayeh@cs.wisc.edu initiateFlush(); // issue a Flush request from random processor 668184Ssomayeh@cs.wisc.edu } 678184Ssomayeh@cs.wisc.edu 687053SN/A if (m_status == TesterStatus_Idle) { 697053SN/A initiateAction(); 707053SN/A } else if (m_status == TesterStatus_Ready) { 717053SN/A initiateCheck(); 727053SN/A } else { 737053SN/A // Pending - do nothing 747053SN/A DPRINTF(RubyTest, 757053SN/A "initiating action/check - failed: action/check is pending\n"); 767053SN/A } 776899SN/A} 786899SN/A 797053SN/Avoid 807053SN/ACheck::initiatePrefetch() 816899SN/A{ 827053SN/A DPRINTF(RubyTest, "initiating prefetch\n"); 836899SN/A 848932SBrad.Beckmann@amd.com int index = random() % m_num_readers; 858950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 866899SN/A 877053SN/A Request::Flags flags; 887053SN/A flags.set(Request::PREFETCH); 896899SN/A 907053SN/A Packet::Command cmd; 916899SN/A 927053SN/A // 1 in 8 chance this will be an exclusive prefetch 937053SN/A if ((random() & 0x7) != 0) { 947053SN/A cmd = MemCmd::ReadReq; 957053SN/A 968932SBrad.Beckmann@amd.com // if necessary, make the request an instruction fetch 978950Sandreas.hansson@arm.com if (m_tester_ptr->isInstReadableCpuPort(index)) { 987053SN/A flags.set(Request::INST_FETCH); 997053SN/A } 1007053SN/A } else { 1017053SN/A cmd = MemCmd::WriteReq; 1027053SN/A flags.set(Request::PF_EXCLUSIVE); 1036899SN/A } 1046899SN/A 1057568SN/A // Prefetches are assumed to be 0 sized 1068832SAli.Saidi@ARM.com Request *req = new Request(m_address.getAddress(), 0, flags, 1078832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 1088190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 1097568SN/A 1108949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1116899SN/A 1127053SN/A // push the subblock onto the sender state. The sequencer will 1137053SN/A // update the subblock on the return 1149542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 1156899SN/A 1168975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1177053SN/A DPRINTF(RubyTest, "successfully initiated prefetch.\n"); 1187053SN/A } else { 1197053SN/A // If the packet did not issue, must delete 1209542Sandreas.hansson@arm.com delete pkt->senderState; 1217053SN/A delete pkt->req; 1227053SN/A delete pkt; 1236899SN/A 1247053SN/A DPRINTF(RubyTest, 1257053SN/A "prefetch initiation failed because Port was busy.\n"); 1267053SN/A } 1276899SN/A} 1286899SN/A 1297053SN/Avoid 1308184Ssomayeh@cs.wisc.eduCheck::initiateFlush() 1318184Ssomayeh@cs.wisc.edu{ 1328184Ssomayeh@cs.wisc.edu 1338184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush\n"); 1348184Ssomayeh@cs.wisc.edu 1358932SBrad.Beckmann@amd.com int index = random() % m_num_writers; 1368950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1378184Ssomayeh@cs.wisc.edu 1388184Ssomayeh@cs.wisc.edu Request::Flags flags; 1398184Ssomayeh@cs.wisc.edu 1408832SAli.Saidi@ARM.com Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 1418832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 1428184Ssomayeh@cs.wisc.edu 1438184Ssomayeh@cs.wisc.edu Packet::Command cmd; 1448184Ssomayeh@cs.wisc.edu 1458184Ssomayeh@cs.wisc.edu cmd = MemCmd::FlushReq; 1468184Ssomayeh@cs.wisc.edu 1478949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1488184Ssomayeh@cs.wisc.edu 1498184Ssomayeh@cs.wisc.edu // push the subblock onto the sender state. The sequencer will 1508184Ssomayeh@cs.wisc.edu // update the subblock on the return 1519542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 1528184Ssomayeh@cs.wisc.edu 1538975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 1548184Ssomayeh@cs.wisc.edu DPRINTF(RubyTest, "initiating Flush - successful\n"); 1558184Ssomayeh@cs.wisc.edu } 1568184Ssomayeh@cs.wisc.edu} 1578184Ssomayeh@cs.wisc.edu 1588184Ssomayeh@cs.wisc.eduvoid 1597053SN/ACheck::initiateAction() 1606899SN/A{ 1617053SN/A DPRINTF(RubyTest, "initiating Action\n"); 1627053SN/A assert(m_status == TesterStatus_Idle); 1636899SN/A 1648932SBrad.Beckmann@amd.com int index = random() % m_num_writers; 1658950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getWritableCpuPort(index); 1666899SN/A 1677053SN/A Request::Flags flags; 1686899SN/A 1697053SN/A // Create the particular address for the next byte to be written 1707053SN/A Address writeAddr(m_address.getAddress() + m_store_count); 1716899SN/A 1727053SN/A // Stores are assumed to be 1 byte-sized 1738832SAli.Saidi@ARM.com Request *req = new Request(writeAddr.getAddress(), 1, flags, 1748832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), 1757053SN/A m_pc.getAddress()); 1766899SN/A 1778190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 1787053SN/A Packet::Command cmd; 1797053SN/A 1807053SN/A // 1 out of 8 chance, issue an atomic rather than a write 1817053SN/A // if ((random() & 0x7) == 0) { 1827053SN/A // cmd = MemCmd::SwapReq; 1837053SN/A // } else { 1846899SN/A cmd = MemCmd::WriteReq; 1857053SN/A // } 1866899SN/A 1878949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, cmd); 1889208Snilay@cs.wisc.edu uint8_t *writeData = new uint8_t; 1897053SN/A *writeData = m_value + m_store_count; 1907053SN/A pkt->dataDynamic(writeData); 1916899SN/A 1927053SN/A DPRINTF(RubyTest, "data 0x%x check 0x%x\n", 1937053SN/A *(pkt->getPtr<uint8_t>()), *writeData); 1946899SN/A 1957053SN/A // push the subblock onto the sender state. The sequencer will 1967053SN/A // update the subblock on the return 1979542Sandreas.hansson@arm.com pkt->senderState = new SenderState(writeAddr, req->getSize()); 1986899SN/A 1998975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2007053SN/A DPRINTF(RubyTest, "initiating action - successful\n"); 2017053SN/A DPRINTF(RubyTest, "status before action update: %s\n", 2027053SN/A (TesterStatus_to_string(m_status)).c_str()); 2037053SN/A m_status = TesterStatus_Action_Pending; 2047053SN/A } else { 2057053SN/A // If the packet did not issue, must delete 2067053SN/A // Note: No need to delete the data, the packet destructor 2077053SN/A // will delete it 2089542Sandreas.hansson@arm.com delete pkt->senderState; 2097053SN/A delete pkt->req; 2107053SN/A delete pkt; 2117053SN/A 2127053SN/A DPRINTF(RubyTest, "failed to initiate action - sequencer not ready\n"); 2137053SN/A } 2147053SN/A 2157053SN/A DPRINTF(RubyTest, "status after action update: %s\n", 2166899SN/A (TesterStatus_to_string(m_status)).c_str()); 2176899SN/A} 2186899SN/A 2197053SN/Avoid 2207053SN/ACheck::initiateCheck() 2216899SN/A{ 2227053SN/A DPRINTF(RubyTest, "Initiating Check\n"); 2237053SN/A assert(m_status == TesterStatus_Ready); 2246899SN/A 2258932SBrad.Beckmann@amd.com int index = random() % m_num_readers; 2268950Sandreas.hansson@arm.com MasterPort* port = m_tester_ptr->getReadableCpuPort(index); 2276899SN/A 2287053SN/A Request::Flags flags; 2296899SN/A 2308932SBrad.Beckmann@amd.com // If necessary, make the request an instruction fetch 2318950Sandreas.hansson@arm.com if (m_tester_ptr->isInstReadableCpuPort(index)) { 2327053SN/A flags.set(Request::INST_FETCH); 2337053SN/A } 2346899SN/A 2357568SN/A // Checks are sized depending on the number of bytes written 2367568SN/A Request *req = new Request(m_address.getAddress(), CHECK_SIZE, flags, 2378832SAli.Saidi@ARM.com m_tester_ptr->masterId(), curTick(), m_pc.getAddress()); 2387568SN/A 2398190SLisa.Hsu@amd.com req->setThreadContext(index, 0); 2408949Sandreas.hansson@arm.com PacketPtr pkt = new Packet(req, MemCmd::ReadReq); 2419208Snilay@cs.wisc.edu uint8_t *dataArray = new uint8_t[CHECK_SIZE]; 2427053SN/A pkt->dataDynamicArray(dataArray); 2436899SN/A 2447053SN/A // push the subblock onto the sender state. The sequencer will 2457053SN/A // update the subblock on the return 2469542Sandreas.hansson@arm.com pkt->senderState = new SenderState(m_address, req->getSize()); 2476899SN/A 2488975Sandreas.hansson@arm.com if (port->sendTimingReq(pkt)) { 2497053SN/A DPRINTF(RubyTest, "initiating check - successful\n"); 2507053SN/A DPRINTF(RubyTest, "status before check update: %s\n", 2517053SN/A TesterStatus_to_string(m_status).c_str()); 2527053SN/A m_status = TesterStatus_Check_Pending; 2537053SN/A } else { 2547053SN/A // If the packet did not issue, must delete 2557053SN/A // Note: No need to delete the data, the packet destructor 2567053SN/A // will delete it 2579542Sandreas.hansson@arm.com delete pkt->senderState; 2587053SN/A delete pkt->req; 2597053SN/A delete pkt; 2606899SN/A 2617053SN/A DPRINTF(RubyTest, "failed to initiate check - cpu port not ready\n"); 2627053SN/A } 2637053SN/A 2647053SN/A DPRINTF(RubyTest, "status after check update: %s\n", 2657053SN/A TesterStatus_to_string(m_status).c_str()); 2666899SN/A} 2676899SN/A 2687053SN/Avoid 26910302Snilay@cs.wisc.eduCheck::performCallback(NodeID proc, SubBlock* data, Cycles curTime) 2706899SN/A{ 2717053SN/A Address address = data->getAddress(); 2726899SN/A 2737053SN/A // This isn't exactly right since we now have multi-byte checks 2747053SN/A // assert(getAddress() == address); 2756899SN/A 2767053SN/A assert(getAddress().getLineAddress() == address.getLineAddress()); 2777053SN/A assert(data != NULL); 2787053SN/A 2797053SN/A DPRINTF(RubyTest, "RubyTester Callback\n"); 2806899SN/A debugPrint(); 2816899SN/A 2827053SN/A if (m_status == TesterStatus_Action_Pending) { 2837053SN/A DPRINTF(RubyTest, "Action callback write value: %d, currently %d\n", 2847053SN/A (m_value + m_store_count), data->getByte(0)); 2857053SN/A // Perform store one byte at a time 2867053SN/A data->setByte(0, (m_value + m_store_count)); 2877053SN/A m_store_count++; 2887053SN/A if (m_store_count == CHECK_SIZE) { 2897053SN/A m_status = TesterStatus_Ready; 2907053SN/A } else { 2917053SN/A m_status = TesterStatus_Idle; 2927053SN/A } 2937053SN/A DPRINTF(RubyTest, "Action callback return data now %d\n", 2947053SN/A data->getByte(0)); 2957053SN/A } else if (m_status == TesterStatus_Check_Pending) { 2967053SN/A DPRINTF(RubyTest, "Check callback\n"); 2977053SN/A // Perform load/check 2987053SN/A for (int byte_number=0; byte_number<CHECK_SIZE; byte_number++) { 2999208Snilay@cs.wisc.edu if (uint8_t(m_value + byte_number) != data->getByte(byte_number)) { 3007805Snilay@cs.wisc.edu panic("Action/check failure: proc: %d address: %s data: %s " 3017805Snilay@cs.wisc.edu "byte_number: %d m_value+byte_number: %d byte: %d %s" 3027805Snilay@cs.wisc.edu "Time: %d\n", 3037805Snilay@cs.wisc.edu proc, address, data, byte_number, 3047805Snilay@cs.wisc.edu (int)m_value + byte_number, 3059475Snilay@cs.wisc.edu (int)data->getByte(byte_number), *this, curTime); 3067053SN/A } 3077053SN/A } 3087053SN/A DPRINTF(RubyTest, "Action/check success\n"); 3097053SN/A debugPrint(); 3106899SN/A 3117053SN/A // successful check complete, increment complete 3127053SN/A m_tester_ptr->incrementCheckCompletions(); 3136899SN/A 3147053SN/A m_status = TesterStatus_Idle; 3157053SN/A pickValue(); 3167053SN/A 3177053SN/A } else { 3187805Snilay@cs.wisc.edu panic("Unexpected TesterStatus: %s proc: %d data: %s m_status: %s " 3199475Snilay@cs.wisc.edu "time: %d\n", *this, proc, data, m_status, curTime); 3207053SN/A } 3217053SN/A 3227053SN/A DPRINTF(RubyTest, "proc: %d, Address: 0x%x\n", proc, 3237053SN/A getAddress().getLineAddress()); 3247053SN/A DPRINTF(RubyTest, "Callback done\n"); 3257053SN/A debugPrint(); 3266899SN/A} 3276899SN/A 3287053SN/Avoid 3297053SN/ACheck::changeAddress(const Address& address) 3306899SN/A{ 3317053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3327053SN/A m_status = TesterStatus_Idle; 3337053SN/A m_address = address; 3347053SN/A m_store_count = 0; 3356899SN/A} 3366899SN/A 3377053SN/Avoid 3387053SN/ACheck::pickValue() 3396899SN/A{ 3407053SN/A assert(m_status == TesterStatus_Idle); 3417053SN/A m_status = TesterStatus_Idle; 3427053SN/A m_value = random() & 0xff; // One byte 3437053SN/A m_store_count = 0; 3446899SN/A} 3456899SN/A 3467053SN/Avoid 3477053SN/ACheck::pickInitiatingNode() 3486899SN/A{ 3497053SN/A assert(m_status == TesterStatus_Idle || m_status == TesterStatus_Ready); 3507053SN/A m_status = TesterStatus_Idle; 3518932SBrad.Beckmann@amd.com m_initiatingNode = (random() % m_num_writers); 3527053SN/A DPRINTF(RubyTest, "picked initiating node %d\n", m_initiatingNode); 3537053SN/A m_store_count = 0; 3546899SN/A} 3556899SN/A 3567053SN/Avoid 3577055SN/ACheck::print(std::ostream& out) const 3586899SN/A{ 3597053SN/A out << "[" 3607053SN/A << m_address << ", value: " 3617053SN/A << (int)m_value << ", status: " 3627053SN/A << m_status << ", initiating node: " 3637053SN/A << m_initiatingNode << ", store_count: " 3647053SN/A << m_store_count 3657055SN/A << "]" << std::flush; 3666899SN/A} 3676899SN/A 3687053SN/Avoid 3697053SN/ACheck::debugPrint() 3706899SN/A{ 3717053SN/A DPRINTF(RubyTest, 3727053SN/A "[%#x, value: %d, status: %s, initiating node: %d, store_count: %d]\n", 3737053SN/A m_address.getAddress(), (int)m_value, 3747053SN/A TesterStatus_to_string(m_status).c_str(), 3757053SN/A m_initiatingNode, m_store_count); 3766899SN/A} 377