MemTest.py revision 4486
16019Shines@cs.fsu.edu# Copyright (c) 2005-2007 The Regents of The University of Michigan
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276019Shines@cs.fsu.edu# Authors: Nathan Binkert
286019Shines@cs.fsu.edu
296019Shines@cs.fsu.edufrom m5.SimObject import SimObject
306019Shines@cs.fsu.edufrom m5.params import *
316019Shines@cs.fsu.edufrom m5.proxy import *
326019Shines@cs.fsu.edufrom m5 import build_env
336019Shines@cs.fsu.edu
346019Shines@cs.fsu.educlass MemTest(SimObject):
356019Shines@cs.fsu.edu    type = 'MemTest'
366019Shines@cs.fsu.edu    max_loads = Param.Counter("number of loads to execute")
376019Shines@cs.fsu.edu    atomic = Param.Bool(False, "Execute tester in atomic mode? (or timing)\n")
386019Shines@cs.fsu.edu    memory_size = Param.Int(65536, "memory size")
396019Shines@cs.fsu.edu    percent_dest_unaligned = Param.Percent(50,
407399SAli.Saidi@ARM.com        "percent of copy dest address that are unaligned")
417399SAli.Saidi@ARM.com    percent_reads = Param.Percent(65, "target read percentage")
426019Shines@cs.fsu.edu    percent_source_unaligned = Param.Percent(50,
436019Shines@cs.fsu.edu        "percent of copy source address that are unaligned")
446019Shines@cs.fsu.edu    percent_functional = Param.Percent(50, "percent of access that are functional")
456019Shines@cs.fsu.edu    percent_uncacheable = Param.Percent(10,
466019Shines@cs.fsu.edu        "target uncacheable percentage")
476019Shines@cs.fsu.edu    progress_interval = Param.Counter(1000000,
486116Snate@binkert.org        "progress report interval (in accesses)")
496019Shines@cs.fsu.edu    trace_addr = Param.Addr(0, "address to trace")
506019Shines@cs.fsu.edu
516019Shines@cs.fsu.edu    test = Port("Port to the memory system to test")
526019Shines@cs.fsu.edu    functional = Port("Port to the functional memory used for verification")
536019Shines@cs.fsu.edu