MemTest.py revision 3187
12139SN/Afrom m5.SimObject import SimObject 22139SN/Afrom m5.params import * 32139SN/Afrom m5.proxy import * 42139SN/Afrom m5 import build_env 52139SN/A 62139SN/Aclass MemTest(SimObject): 72139SN/A type = 'MemTest' 82139SN/A max_loads = Param.Counter("number of loads to execute") 92139SN/A memory_size = Param.Int(65536, "memory size") 102139SN/A percent_dest_unaligned = Param.Percent(50, 112139SN/A "percent of copy dest address that are unaligned") 122139SN/A percent_reads = Param.Percent(65, "target read percentage") 132139SN/A percent_source_unaligned = Param.Percent(50, 142139SN/A "percent of copy source address that are unaligned") 152139SN/A percent_uncacheable = Param.Percent(10, 162139SN/A "target uncacheable percentage") 172139SN/A progress_interval = Param.Counter(1000000, 182139SN/A "progress report interval (in accesses)") 192139SN/A trace_addr = Param.Addr(0, "address to trace") 202139SN/A 212139SN/A test = Port("Port to the memory system to test") 222139SN/A functional = Port("Port to the functional memory used for verification") 232139SN/A