SeriesRequestGenerator.cc revision 7553
18012Ssaidi@eecs.umich.edu/* 28029Snate@binkert.org * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 38029Snate@binkert.org * Copyright (c) 2009-2010 Advanced Micro Devices, Inc. 48013Sbinkertn@umich.edu * All rights reserved. 58029Snate@binkert.org * 68029Snate@binkert.org * Redistribution and use in source and binary forms, with or without 78029Snate@binkert.org * modification, are permitted provided that the following conditions are 88029Snate@binkert.org * met: redistributions of source code must retain the above copyright 98029Snate@binkert.org * notice, this list of conditions and the following disclaimer; 108029Snate@binkert.org * redistributions in binary form must reproduce the above copyright 118029Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 128029Snate@binkert.org * documentation and/or other materials provided with the distribution; 138029Snate@binkert.org * neither the name of the copyright holders nor the names of its 148029Snate@binkert.org * contributors may be used to endorse or promote products derived from 158013Sbinkertn@umich.edu * this software without specific prior written permission. 168029Snate@binkert.org * 178029Snate@binkert.org * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 188029Snate@binkert.org * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 198029Snate@binkert.org * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 208029Snate@binkert.org * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 218029Snate@binkert.org * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 228029Snate@binkert.org * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 238029Snate@binkert.org * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 248029Snate@binkert.org * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 258029Snate@binkert.org * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 268029Snate@binkert.org * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 278013Sbinkertn@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 288012Ssaidi@eecs.umich.edu */ 298013Sbinkertn@umich.edu 308012Ssaidi@eecs.umich.edu#include "cpu/directedtest/RubyDirectedTester.hh" 317997Ssaidi@eecs.umich.edu#include "cpu/directedtest/DirectedGenerator.hh" 328013Sbinkertn@umich.edu#include "cpu/directedtest/SeriesRequestGenerator.hh" 337997Ssaidi@eecs.umich.edu 347997Ssaidi@eecs.umich.eduSeriesRequestGenerator::SeriesRequestGenerator(const Params *p) 357997Ssaidi@eecs.umich.edu : DirectedGenerator(p) 367997Ssaidi@eecs.umich.edu{ 377997Ssaidi@eecs.umich.edu m_status = SeriesRequestGeneratorStatus_Thinking; 387997Ssaidi@eecs.umich.edu m_active_node = 0; 397997Ssaidi@eecs.umich.edu m_address = 0x0; 407997Ssaidi@eecs.umich.edu m_addr_increment_size = p->addr_increment_size; 417997Ssaidi@eecs.umich.edu m_issue_writes = p->issue_writes; 427997Ssaidi@eecs.umich.edu} 437997Ssaidi@eecs.umich.edu 447997Ssaidi@eecs.umich.eduSeriesRequestGenerator::~SeriesRequestGenerator() 457997Ssaidi@eecs.umich.edu{ 467997Ssaidi@eecs.umich.edu} 477997Ssaidi@eecs.umich.edu 487997Ssaidi@eecs.umich.edubool 497997Ssaidi@eecs.umich.eduSeriesRequestGenerator::initiate() 507997Ssaidi@eecs.umich.edu{ 517997Ssaidi@eecs.umich.edu DPRINTF(DirectedTest, "initiating request\n"); 527997Ssaidi@eecs.umich.edu assert(m_status == SeriesRequestGeneratorStatus_Thinking); 53 54 RubyDirectedTester::CpuPort* port = 55 safe_cast<RubyDirectedTester::CpuPort*>(m_directed_tester-> 56 getCpuPort(m_active_node)); 57 58 Request::Flags flags; 59 60 // For simplicity, requests are assumed to be 1 byte-sized 61 Request *req = new Request(m_address, 1, flags); 62 63 Packet::Command cmd; 64 if (m_issue_writes) { 65 cmd = MemCmd::WriteReq; 66 } else { 67 cmd = MemCmd::ReadReq; 68 } 69 PacketPtr pkt = new Packet(req, cmd, m_active_node); 70 uint8_t* dummyData = new uint8_t; 71 *dummyData = 0; 72 pkt->dataDynamic(dummyData); 73 74 if (port->sendTiming(pkt)) { 75 DPRINTF(DirectedTest, "initiating request - successful\n"); 76 m_status = SeriesRequestGeneratorStatus_Request_Pending; 77 return true; 78 } else { 79 // If the packet did not issue, must delete 80 // Note: No need to delete the data, the packet destructor 81 // will delete it 82 delete pkt->req; 83 delete pkt; 84 85 DPRINTF(DirectedTest, "failed to initiate request - sequencer not ready\n"); 86 return false; 87 } 88} 89 90void 91SeriesRequestGenerator::performCallback(uint proc, Addr address) 92{ 93 assert(m_active_node == proc); 94 assert(m_address == address); 95 assert(m_status == SeriesRequestGeneratorStatus_Request_Pending); 96 97 m_status = SeriesRequestGeneratorStatus_Thinking; 98 m_active_node++; 99 if (m_active_node == m_num_cpus) { 100 // 101 // Cycle of requests completed, increment cycle completions and restart 102 // at cpu zero 103 // 104 m_directed_tester->incrementCycleCompletions(); 105 m_address += m_addr_increment_size; 106 m_active_node = 0; 107 } 108} 109 110SeriesRequestGenerator * 111SeriesRequestGeneratorParams::create() 112{ 113 return new SeriesRequestGenerator(this); 114} 115