RubyDirectedTester.cc revision 7823:dac01f14f20f
113481Sgiacomo.travaglini@arm.com/* 213481Sgiacomo.travaglini@arm.com * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood 313481Sgiacomo.travaglini@arm.com * Copyright (c) 2009-2010 Advanced Micro Devices, Inc. 413481Sgiacomo.travaglini@arm.com * All rights reserved. 513481Sgiacomo.travaglini@arm.com * 613481Sgiacomo.travaglini@arm.com * Redistribution and use in source and binary forms, with or without 713481Sgiacomo.travaglini@arm.com * modification, are permitted provided that the following conditions are 813481Sgiacomo.travaglini@arm.com * met: redistributions of source code must retain the above copyright 913481Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer; 1013481Sgiacomo.travaglini@arm.com * redistributions in binary form must reproduce the above copyright 1113481Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer in the 1213481Sgiacomo.travaglini@arm.com * documentation and/or other materials provided with the distribution; 1313481Sgiacomo.travaglini@arm.com * neither the name of the copyright holders nor the names of its 1413481Sgiacomo.travaglini@arm.com * contributors may be used to endorse or promote products derived from 1513481Sgiacomo.travaglini@arm.com * this software without specific prior written permission. 1613481Sgiacomo.travaglini@arm.com * 1713481Sgiacomo.travaglini@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1813481Sgiacomo.travaglini@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1913481Sgiacomo.travaglini@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2013481Sgiacomo.travaglini@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2113481Sgiacomo.travaglini@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2213481Sgiacomo.travaglini@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2313481Sgiacomo.travaglini@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2413481Sgiacomo.travaglini@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2513481Sgiacomo.travaglini@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2613481Sgiacomo.travaglini@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2713481Sgiacomo.travaglini@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2813481Sgiacomo.travaglini@arm.com */ 2913481Sgiacomo.travaglini@arm.com 3013481Sgiacomo.travaglini@arm.com#include "cpu/testers/directedtest/DirectedGenerator.hh" 3113481Sgiacomo.travaglini@arm.com#include "cpu/testers/directedtest/RubyDirectedTester.hh" 3213481Sgiacomo.travaglini@arm.com#include "mem/ruby/eventqueue/RubyEventQueue.hh" 3313481Sgiacomo.travaglini@arm.com#include "sim/sim_exit.hh" 3413481Sgiacomo.travaglini@arm.com 3513481Sgiacomo.travaglini@arm.comRubyDirectedTester::RubyDirectedTester(const Params *p) 3613481Sgiacomo.travaglini@arm.com : MemObject(p), directedStartEvent(this), 3713481Sgiacomo.travaglini@arm.com m_requests_to_complete(p->requests_to_complete), 3813481Sgiacomo.travaglini@arm.com generator(p->generator) 3913481Sgiacomo.travaglini@arm.com{ 4013481Sgiacomo.travaglini@arm.com m_requests_completed = 0; 4113481Sgiacomo.travaglini@arm.com 4213481Sgiacomo.travaglini@arm.com // add the check start event to the event queue 4313481Sgiacomo.travaglini@arm.com schedule(directedStartEvent, 1); 4413481Sgiacomo.travaglini@arm.com} 4513481Sgiacomo.travaglini@arm.com 4613481Sgiacomo.travaglini@arm.comRubyDirectedTester::~RubyDirectedTester() 4713481Sgiacomo.travaglini@arm.com{ 4813481Sgiacomo.travaglini@arm.com for (int i = 0; i < ports.size(); i++) 4913481Sgiacomo.travaglini@arm.com delete ports[i]; 5013481Sgiacomo.travaglini@arm.com} 5113481Sgiacomo.travaglini@arm.com 5213481Sgiacomo.travaglini@arm.comvoid 5313481Sgiacomo.travaglini@arm.comRubyDirectedTester::init() 5413481Sgiacomo.travaglini@arm.com{ 5513481Sgiacomo.travaglini@arm.com assert(ports.size() > 0); 5613481Sgiacomo.travaglini@arm.com generator->setDirectedTester(this); 5713481Sgiacomo.travaglini@arm.com} 5813481Sgiacomo.travaglini@arm.com 5913481Sgiacomo.travaglini@arm.comPort * 6013481Sgiacomo.travaglini@arm.comRubyDirectedTester::getPort(const std::string &if_name, int idx) 6113481Sgiacomo.travaglini@arm.com{ 6213481Sgiacomo.travaglini@arm.com if (if_name != "cpuPort") { 6313481Sgiacomo.travaglini@arm.com panic("RubyDirectedTester::getPort: unknown port %s requested", if_name); 6413481Sgiacomo.travaglini@arm.com } 6513481Sgiacomo.travaglini@arm.com 6613481Sgiacomo.travaglini@arm.com if (idx >= (int)ports.size()) { 6713481Sgiacomo.travaglini@arm.com ports.resize(idx + 1); 6813481Sgiacomo.travaglini@arm.com } 6913481Sgiacomo.travaglini@arm.com 7013481Sgiacomo.travaglini@arm.com if (ports[idx] != NULL) { 7113481Sgiacomo.travaglini@arm.com panic("RubyDirectedTester::getPort: port %d already assigned", idx); 7213481Sgiacomo.travaglini@arm.com } 7313481Sgiacomo.travaglini@arm.com 7413481Sgiacomo.travaglini@arm.com CpuPort *port = new CpuPort(csprintf("%s-port%d", name(), idx), this, idx); 7513481Sgiacomo.travaglini@arm.com 7613481Sgiacomo.travaglini@arm.com ports[idx] = port; 7713481Sgiacomo.travaglini@arm.com return port; 7813481Sgiacomo.travaglini@arm.com} 7913481Sgiacomo.travaglini@arm.com 8013481Sgiacomo.travaglini@arm.comTick 8113481Sgiacomo.travaglini@arm.comRubyDirectedTester::CpuPort::recvAtomic(PacketPtr pkt) 8213481Sgiacomo.travaglini@arm.com{ 8313481Sgiacomo.travaglini@arm.com panic("RubyDirectedTester::CpuPort::recvAtomic() not implemented!\n"); 8413481Sgiacomo.travaglini@arm.com return 0; 8513481Sgiacomo.travaglini@arm.com} 8613481Sgiacomo.travaglini@arm.com 8713481Sgiacomo.travaglini@arm.combool 8813481Sgiacomo.travaglini@arm.comRubyDirectedTester::CpuPort::recvTiming(PacketPtr pkt) 8913481Sgiacomo.travaglini@arm.com{ 9013481Sgiacomo.travaglini@arm.com tester->hitCallback(idx, pkt->getAddr()); 9113481Sgiacomo.travaglini@arm.com 9213481Sgiacomo.travaglini@arm.com // 9313481Sgiacomo.travaglini@arm.com // Now that the tester has completed, delete the packet, then return 9413481Sgiacomo.travaglini@arm.com // 9513481Sgiacomo.travaglini@arm.com delete pkt->req; 9613481Sgiacomo.travaglini@arm.com delete pkt; 9713481Sgiacomo.travaglini@arm.com return true; 9813481Sgiacomo.travaglini@arm.com} 9913481Sgiacomo.travaglini@arm.com 10013481Sgiacomo.travaglini@arm.comPort* 10113481Sgiacomo.travaglini@arm.comRubyDirectedTester::getCpuPort(int idx) 10213481Sgiacomo.travaglini@arm.com{ 10313481Sgiacomo.travaglini@arm.com assert(idx >= 0 && idx < ports.size()); 10413481Sgiacomo.travaglini@arm.com 10513481Sgiacomo.travaglini@arm.com return ports[idx]; 10613481Sgiacomo.travaglini@arm.com} 10713481Sgiacomo.travaglini@arm.com 10813481Sgiacomo.travaglini@arm.comvoid 10913481Sgiacomo.travaglini@arm.comRubyDirectedTester::hitCallback(NodeID proc, Addr addr) 11013481Sgiacomo.travaglini@arm.com{ 11113481Sgiacomo.travaglini@arm.com DPRINTF(DirectedTest, 11213481Sgiacomo.travaglini@arm.com "completed request for proc: %d addr: 0x%x\n", 11313481Sgiacomo.travaglini@arm.com proc, 11413481Sgiacomo.travaglini@arm.com addr); 11513481Sgiacomo.travaglini@arm.com 11613481Sgiacomo.travaglini@arm.com generator->performCallback(proc, addr); 11713481Sgiacomo.travaglini@arm.com schedule(directedStartEvent, curTick()); 11813481Sgiacomo.travaglini@arm.com} 11913481Sgiacomo.travaglini@arm.com 12013481Sgiacomo.travaglini@arm.comvoid 12113481Sgiacomo.travaglini@arm.comRubyDirectedTester::wakeup() 12213481Sgiacomo.travaglini@arm.com{ 12313481Sgiacomo.travaglini@arm.com if (m_requests_completed < m_requests_to_complete) { 12413481Sgiacomo.travaglini@arm.com if (!generator->initiate()) { 12513481Sgiacomo.travaglini@arm.com schedule(directedStartEvent, curTick() + 1); 12613481Sgiacomo.travaglini@arm.com } 12713481Sgiacomo.travaglini@arm.com } else { 12813481Sgiacomo.travaglini@arm.com exitSimLoop("Ruby DirectedTester completed"); 12913481Sgiacomo.travaglini@arm.com } 13013481Sgiacomo.travaglini@arm.com} 13113481Sgiacomo.travaglini@arm.com 13213481Sgiacomo.travaglini@arm.comRubyDirectedTester * 13313481Sgiacomo.travaglini@arm.comRubyDirectedTesterParams::create() 13413481Sgiacomo.travaglini@arm.com{ 13513481Sgiacomo.travaglini@arm.com return new RubyDirectedTester(this); 13613481Sgiacomo.travaglini@arm.com} 13713481Sgiacomo.travaglini@arm.com