simple_thread.cc revision 8735 
1/*
2 * Copyright (c) 2001-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 *          Nathan Binkert
30 *          Lisa Hsu
31 *          Kevin Lim
32 */
33
34#include <string>
35
36#include "arch/isa_traits.hh"
37#include "arch/utility.hh"
38#include "config/the_isa.hh"
39#include "cpu/base.hh"
40#include "cpu/simple_thread.hh"
41#include "cpu/thread_context.hh"
42#include "params/BaseCPU.hh"
43
44#if FULL_SYSTEM
45#include "arch/kernel_stats.hh"
46#include "arch/stacktrace.hh"
47#include "base/callback.hh"
48#include "base/cprintf.hh"
49#include "base/output.hh"
50#include "base/trace.hh"
51#include "cpu/profile.hh"
52#include "cpu/quiesce_event.hh"
53#include "mem/fs_translating_port_proxy.hh"
54#include "sim/serialize.hh"
55#include "sim/sim_exit.hh"
56#else
57#include "mem/se_translating_port_proxy.hh"
58#include "sim/process.hh"
59#include "sim/system.hh"
60#endif
61
62using namespace std;
63
64// constructor
65#if FULL_SYSTEM
66SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
67                           TheISA::TLB *_itb, TheISA::TLB *_dtb,
68                           bool use_kernel_stats)
69    : ThreadState(_cpu, _thread_num),
70      system(_sys), itb(_itb), dtb(_dtb)
71
72{
73    tc = new ProxyThreadContext<SimpleThread>(this);
74
75    quiesceEvent = new EndQuiesceEvent(tc);
76
77    clearArchRegs();
78
79    if (baseCpu->params()->profile) {
80        profile = new FunctionProfile(system->kernelSymtab);
81        Callback *cb =
82            new MakeCallback<SimpleThread,
83            &SimpleThread::dumpFuncProfile>(this);
84        registerExitCallback(cb);
85    }
86
87    // let's fill with a dummy node for now so we don't get a segfault
88    // on the first cycle when there's no node available.
89    static ProfileNode dummyNode;
90    profileNode = &dummyNode;
91    profilePC = 3;
92
93    if (use_kernel_stats)
94        kernelStats = new TheISA::Kernel::Statistics(system);
95}
96#else
97SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
98                           TheISA::TLB *_itb, TheISA::TLB *_dtb)
99    : ThreadState(_cpu, _thread_num, _process),
100      itb(_itb), dtb(_dtb)
101{
102    clearArchRegs();
103    tc = new ProxyThreadContext<SimpleThread>(this);
104}
105
106#endif
107
108SimpleThread::SimpleThread()
109#if FULL_SYSTEM
110    : ThreadState(NULL, -1)
111#else
112    : ThreadState(NULL, -1, NULL)
113#endif
114{
115    tc = new ProxyThreadContext<SimpleThread>(this);
116}
117
118SimpleThread::~SimpleThread()
119{
120    delete tc;
121}
122
123void
124SimpleThread::takeOverFrom(ThreadContext *oldContext)
125{
126    // some things should already be set up
127#if FULL_SYSTEM
128    assert(system == oldContext->getSystemPtr());
129#else
130    assert(process == oldContext->getProcessPtr());
131#endif
132
133    copyState(oldContext);
134#if FULL_SYSTEM
135    EndQuiesceEvent *quiesce = oldContext->getQuiesceEvent();
136    if (quiesce) {
137        // Point the quiesce event's TC at this TC so that it wakes up
138        // the proper CPU.
139        quiesce->tc = tc;
140    }
141    if (quiesceEvent) {
142        quiesceEvent->tc = tc;
143    }
144
145    TheISA::Kernel::Statistics *stats = oldContext->getKernelStats();
146    if (stats) {
147        kernelStats = stats;
148    }
149#endif
150
151    storeCondFailures = 0;
152
153    oldContext->setStatus(ThreadContext::Halted);
154}
155
156void
157SimpleThread::copyTC(ThreadContext *context)
158{
159    copyState(context);
160
161#if FULL_SYSTEM
162    EndQuiesceEvent *quiesce = context->getQuiesceEvent();
163    if (quiesce) {
164        quiesceEvent = quiesce;
165    }
166    TheISA::Kernel::Statistics *stats = context->getKernelStats();
167    if (stats) {
168        kernelStats = stats;
169    }
170#endif
171}
172
173void
174SimpleThread::copyState(ThreadContext *oldContext)
175{
176    // copy over functional state
177    _status = oldContext->status();
178    copyArchRegs(oldContext);
179#if !FULL_SYSTEM
180    funcExeInst = oldContext->readFuncExeInst();
181#endif
182
183    _threadId = oldContext->threadId();
184    _contextId = oldContext->contextId();
185}
186
187void
188SimpleThread::serialize(ostream &os)
189{
190    ThreadState::serialize(os);
191    SERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
192    SERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
193    _pcState.serialize(os);
194    // thread_num and cpu_id are deterministic from the config
195
196    //
197    // Now must serialize all the ISA dependent state
198    //
199    isa.serialize(baseCpu, os);
200}
201
202
203void
204SimpleThread::unserialize(Checkpoint *cp, const std::string &section)
205{
206    ThreadState::unserialize(cp, section);
207    UNSERIALIZE_ARRAY(floatRegs.i, TheISA::NumFloatRegs);
208    UNSERIALIZE_ARRAY(intRegs, TheISA::NumIntRegs);
209    _pcState.unserialize(cp, section);
210    // thread_num and cpu_id are deterministic from the config
211
212    //
213    // Now must unserialize all the ISA dependent state
214    //
215    isa.unserialize(baseCpu, cp, section);
216}
217
218#if FULL_SYSTEM
219void
220SimpleThread::dumpFuncProfile()
221{
222    std::ostream *os = simout.create(csprintf("profile.%s.dat",
223                                              baseCpu->name()));
224    profile->dump(tc, *os);
225}
226#endif
227
228void
229SimpleThread::activate(int delay)
230{
231    if (status() == ThreadContext::Active)
232        return;
233
234    lastActivate = curTick();
235
236//    if (status() == ThreadContext::Unallocated) {
237//      cpu->activateWhenReady(_threadId);
238//      return;
239//   }
240
241    _status = ThreadContext::Active;
242
243    // status() == Suspended
244    baseCpu->activateContext(_threadId, delay);
245}
246
247void
248SimpleThread::suspend()
249{
250    if (status() == ThreadContext::Suspended)
251        return;
252
253    lastActivate = curTick();
254    lastSuspend = curTick();
255/*
256#if FULL_SYSTEM
257    // Don't change the status from active if there are pending interrupts
258    if (cpu->checkInterrupts()) {
259        assert(status() == ThreadContext::Active);
260        return;
261    }
262#endif
263*/
264    _status = ThreadContext::Suspended;
265    baseCpu->suspendContext(_threadId);
266}
267
268
269void
270SimpleThread::halt()
271{
272    if (status() == ThreadContext::Halted)
273        return;
274
275    _status = ThreadContext::Halted;
276    baseCpu->haltContext(_threadId);
277}
278
279
280void
281SimpleThread::regStats(const string &name)
282{
283#if FULL_SYSTEM
284    if (kernelStats)
285        kernelStats->regStats(name + ".kern");
286#endif
287}
288
289void
290SimpleThread::copyArchRegs(ThreadContext *src_tc)
291{
292    TheISA::copyRegs(src_tc, tc);
293}
294
295