simple_thread.cc revision 10319
12SN/A/*
22188SN/A * Copyright (c) 2001-2006 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665SN/A *
282665SN/A * Authors: Steve Reinhardt
292665SN/A *          Nathan Binkert
302665SN/A *          Lisa Hsu
312665SN/A *          Kevin Lim
322SN/A */
332SN/A
342SN/A#include <string>
352SN/A
362465SN/A#include "arch/isa_traits.hh"
373565Sgblack@eecs.umich.edu#include "arch/kernel_stats.hh"
385529Snate@binkert.org#include "arch/stacktrace.hh"
398777Sgblack@eecs.umich.edu#include "arch/utility.hh"
401917SN/A#include "base/callback.hh"
411070SN/A#include "base/cprintf.hh"
421917SN/A#include "base/output.hh"
432188SN/A#include "base/trace.hh"
448777Sgblack@eecs.umich.edu#include "config/the_isa.hh"
458777Sgblack@eecs.umich.edu#include "cpu/base.hh"
461917SN/A#include "cpu/profile.hh"
472290SN/A#include "cpu/quiesce_event.hh"
488777Sgblack@eecs.umich.edu#include "cpu/simple_thread.hh"
498777Sgblack@eecs.umich.edu#include "cpu/thread_context.hh"
508706Sandreas.hansson@arm.com#include "mem/fs_translating_port_proxy.hh"
518799Sgblack@eecs.umich.edu#include "mem/se_translating_port_proxy.hh"
528809Sgblack@eecs.umich.edu#include "params/BaseCPU.hh"
5310319SAndreas.Sandberg@ARM.com#include "sim/faults.hh"
548793Sgblack@eecs.umich.edu#include "sim/full_system.hh"
558777Sgblack@eecs.umich.edu#include "sim/process.hh"
561070SN/A#include "sim/serialize.hh"
571917SN/A#include "sim/sim_exit.hh"
582519SN/A#include "sim/system.hh"
592SN/A
602SN/Ausing namespace std;
612SN/A
622SN/A// constructor
638820Sgblack@eecs.umich.eduSimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
648820Sgblack@eecs.umich.edu                           Process *_process, TheISA::TLB *_itb,
659384SAndreas.Sandberg@arm.com                           TheISA::TLB *_dtb, TheISA::ISA *_isa)
669384SAndreas.Sandberg@arm.com    : ThreadState(_cpu, _thread_num, _process), isa(_isa), system(_sys),
679384SAndreas.Sandberg@arm.com      itb(_itb), dtb(_dtb)
688766Sgblack@eecs.umich.edu{
698766Sgblack@eecs.umich.edu    clearArchRegs();
708766Sgblack@eecs.umich.edu    tc = new ProxyThreadContext<SimpleThread>(this);
718766Sgblack@eecs.umich.edu}
729377Sgblack@eecs.umich.edu
732683Sktlim@umich.eduSimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
746022Sgblack@eecs.umich.edu                           TheISA::TLB *_itb, TheISA::TLB *_dtb,
759384SAndreas.Sandberg@arm.com                           TheISA::ISA *_isa, bool use_kernel_stats)
769384SAndreas.Sandberg@arm.com    : ThreadState(_cpu, _thread_num, NULL), isa(_isa), system(_sys), itb(_itb),
779384SAndreas.Sandberg@arm.com      dtb(_dtb)
782SN/A{
792683Sktlim@umich.edu    tc = new ProxyThreadContext<SimpleThread>(this);
802190SN/A
812680SN/A    quiesceEvent = new EndQuiesceEvent(tc);
822290SN/A
836316Sgblack@eecs.umich.edu    clearArchRegs();
841917SN/A
858735Sandreas.hanson@arm.com    if (baseCpu->params()->profile) {
861982SN/A        profile = new FunctionProfile(system->kernelSymtab);
871917SN/A        Callback *cb =
882683Sktlim@umich.edu            new MakeCallback<SimpleThread,
892683Sktlim@umich.edu            &SimpleThread::dumpFuncProfile>(this);
901917SN/A        registerExitCallback(cb);
911917SN/A    }
921917SN/A
931917SN/A    // let's fill with a dummy node for now so we don't get a segfault
941917SN/A    // on the first cycle when there's no node available.
951917SN/A    static ProfileNode dummyNode;
961917SN/A    profileNode = &dummyNode;
971917SN/A    profilePC = 3;
982521SN/A
995482Snate@binkert.org    if (use_kernel_stats)
1003548Sgblack@eecs.umich.edu        kernelStats = new TheISA::Kernel::Statistics(system);
1012SN/A}
1022862Sktlim@umich.edu
1032683Sktlim@umich.eduSimpleThread::~SimpleThread()
1041070SN/A{
1052680SN/A    delete tc;
1061070SN/A}
1071070SN/A
1081917SN/Avoid
1092683Sktlim@umich.eduSimpleThread::takeOverFrom(ThreadContext *oldContext)
110180SN/A{
1119441SAndreas.Sandberg@ARM.com    ::takeOverFrom(*tc, *oldContext);
1129478Snilay@cs.wisc.edu    decoder.takeOverFrom(oldContext->getDecoderPtr());
113180SN/A
1149441SAndreas.Sandberg@ARM.com    kernelStats = oldContext->getKernelStats();
1159441SAndreas.Sandberg@ARM.com    funcExeInst = oldContext->readFuncExeInst();
116180SN/A    storeCondFailures = 0;
1172864Sktlim@umich.edu}
1182864Sktlim@umich.edu
1192864Sktlim@umich.eduvoid
1202862Sktlim@umich.eduSimpleThread::copyState(ThreadContext *oldContext)
1212862Sktlim@umich.edu{
1222862Sktlim@umich.edu    // copy over functional state
1232862Sktlim@umich.edu    _status = oldContext->status();
1242862Sktlim@umich.edu    copyArchRegs(oldContext);
1258793Sgblack@eecs.umich.edu    if (FullSystem)
1268793Sgblack@eecs.umich.edu        funcExeInst = oldContext->readFuncExeInst();
1275714Shsul@eecs.umich.edu
1285715Shsul@eecs.umich.edu    _threadId = oldContext->threadId();
1295714Shsul@eecs.umich.edu    _contextId = oldContext->contextId();
1302862Sktlim@umich.edu}
1312862Sktlim@umich.edu
1322862Sktlim@umich.eduvoid
1332683Sktlim@umich.eduSimpleThread::serialize(ostream &os)
134217SN/A{
1352862Sktlim@umich.edu    ThreadState::serialize(os);
1369428SAndreas.Sandberg@ARM.com    ::serialize(*tc, os);
137217SN/A}
138217SN/A
139217SN/A
140217SN/Avoid
1412683Sktlim@umich.eduSimpleThread::unserialize(Checkpoint *cp, const std::string &section)
142217SN/A{
1432862Sktlim@umich.edu    ThreadState::unserialize(cp, section);
1449428SAndreas.Sandberg@ARM.com    ::unserialize(*tc, cp, section);
145217SN/A}
146217SN/A
1472683Sktlim@umich.eduvoid
1489461Snilay@cs.wisc.eduSimpleThread::startup()
1499461Snilay@cs.wisc.edu{
1509461Snilay@cs.wisc.edu    isa->startup(tc);
1519461Snilay@cs.wisc.edu}
1529461Snilay@cs.wisc.edu
1539461Snilay@cs.wisc.eduvoid
1542683Sktlim@umich.eduSimpleThread::dumpFuncProfile()
1552683Sktlim@umich.edu{
1568735Sandreas.hanson@arm.com    std::ostream *os = simout.create(csprintf("profile.%s.dat",
1578735Sandreas.hanson@arm.com                                              baseCpu->name()));
1582683Sktlim@umich.edu    profile->dump(tc, *os);
1592683Sktlim@umich.edu}
160217SN/A
161217SN/Avoid
1629180Sandreas.hansson@arm.comSimpleThread::activate(Cycles delay)
1632SN/A{
1642680SN/A    if (status() == ThreadContext::Active)
1652SN/A        return;
1662SN/A
1677823Ssteve.reinhardt@amd.com    lastActivate = curTick();
1682188SN/A
1694400Srdreslin@umich.edu//    if (status() == ThreadContext::Unallocated) {
1705715Shsul@eecs.umich.edu//      cpu->activateWhenReady(_threadId);
1715543Ssaidi@eecs.umich.edu//      return;
1724400Srdreslin@umich.edu//   }
1732290SN/A
1742680SN/A    _status = ThreadContext::Active;
1752290SN/A
1762290SN/A    // status() == Suspended
1778735Sandreas.hanson@arm.com    baseCpu->activateContext(_threadId, delay);
178393SN/A}
179393SN/A
180393SN/Avoid
1812683Sktlim@umich.eduSimpleThread::suspend()
182393SN/A{
1832680SN/A    if (status() == ThreadContext::Suspended)
184393SN/A        return;
185393SN/A
1867823Ssteve.reinhardt@amd.com    lastActivate = curTick();
1877823Ssteve.reinhardt@amd.com    lastSuspend = curTick();
1882680SN/A    _status = ThreadContext::Suspended;
1898735Sandreas.hanson@arm.com    baseCpu->suspendContext(_threadId);
1902SN/A}
1912SN/A
192393SN/A
193393SN/Avoid
1942683Sktlim@umich.eduSimpleThread::halt()
195393SN/A{
1962680SN/A    if (status() == ThreadContext::Halted)
197393SN/A        return;
198393SN/A
1992680SN/A    _status = ThreadContext::Halted;
2008735Sandreas.hanson@arm.com    baseCpu->haltContext(_threadId);
201393SN/A}
202393SN/A
203393SN/A
204393SN/Avoid
2052683Sktlim@umich.eduSimpleThread::regStats(const string &name)
2062SN/A{
2078793Sgblack@eecs.umich.edu    if (FullSystem && kernelStats)
2082341SN/A        kernelStats->regStats(name + ".kern");
2092SN/A}
210716SN/A
211716SN/Avoid
2122683Sktlim@umich.eduSimpleThread::copyArchRegs(ThreadContext *src_tc)
2132190SN/A{
2142680SN/A    TheISA::copyRegs(src_tc, tc);
2152190SN/A}
2162190SN/A
21710319SAndreas.Sandberg@ARM.com// The following methods are defined in src/arch/alpha/ev5.cc for
21810319SAndreas.Sandberg@ARM.com// Alpha.
21910319SAndreas.Sandberg@ARM.com#if THE_ISA != ALPHA_ISA
22010319SAndreas.Sandberg@ARM.comFault
22110319SAndreas.Sandberg@ARM.comSimpleThread::hwrei()
22210319SAndreas.Sandberg@ARM.com{
22310319SAndreas.Sandberg@ARM.com    return NoFault;
22410319SAndreas.Sandberg@ARM.com}
22510319SAndreas.Sandberg@ARM.com
22610319SAndreas.Sandberg@ARM.combool
22710319SAndreas.Sandberg@ARM.comSimpleThread::simPalCheck(int palFunc)
22810319SAndreas.Sandberg@ARM.com{
22910319SAndreas.Sandberg@ARM.com    return true;
23010319SAndreas.Sandberg@ARM.com}
23110319SAndreas.Sandberg@ARM.com#endif
232