pc_event.cc revision 2665
12SN/A/*
21762SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Nathan Binkert
292665Ssaidi@eecs.umich.edu *          Steve Reinhardt
302SN/A */
312SN/A
322SN/A#include <algorithm>
332SN/A#include <map>
342SN/A#include <string>
352SN/A#include <utility>
362SN/A
371492SN/A#include "base/trace.hh"
381858SN/A#include "config/full_system.hh"
391717SN/A#include "cpu/base.hh"
4056SN/A#include "cpu/exec_context.hh"
4156SN/A#include "cpu/pc_event.hh"
421492SN/A#include "sim/debug.hh"
431696SN/A#include "sim/root.hh"
442190SN/A#include "sim/system.hh"
452SN/A
462SN/Ausing namespace std;
472SN/A
482SN/APCEventQueue::PCEventQueue()
492SN/A{}
502SN/A
512SN/APCEventQueue::~PCEventQueue()
522SN/A{}
532SN/A
542SN/Abool
552SN/APCEventQueue::remove(PCEvent *event)
562SN/A{
572SN/A    int removed = 0;
582SN/A    range_t range = equal_range(event);
592SN/A    for (iterator i = range.first; i != range.second; ++i) {
602SN/A        if (*i == event) {
612SN/A            DPRINTF(PCEvent, "PC based event removed at %#x: %s\n",
622SN/A                    event->pc(), event->descr());
632SN/A            pc_map.erase(i);
642SN/A            ++removed;
652SN/A        }
662SN/A    }
672SN/A
682SN/A    return removed > 0;
692SN/A}
702SN/A
712SN/Abool
722SN/APCEventQueue::schedule(PCEvent *event)
732SN/A{
742SN/A    pc_map.push_back(event);
752SN/A    sort(pc_map.begin(), pc_map.end(), MapCompare());
762SN/A
772SN/A    DPRINTF(PCEvent, "PC based event scheduled for %#x: %s\n",
782SN/A            event->pc(), event->descr());
792SN/A
802SN/A    return true;
812SN/A}
822SN/A
832SN/Abool
8476SN/APCEventQueue::doService(ExecContext *xc)
852SN/A{
862190SN/A    Addr pc = xc->readPC() & ~0x3;
872SN/A    int serviced = 0;
882SN/A    range_t range = equal_range(pc);
892SN/A    for (iterator i = range.first; i != range.second; ++i) {
902SN/A        // Make sure that the pc wasn't changed as the side effect of
912SN/A        // another event.  This for example, prevents two invocations
922SN/A        // of the SkipFuncEvent.  Maybe we should have separate PC
932SN/A        // event queues for each processor?
942190SN/A        if (pc != (xc->readPC() & ~0x3))
952SN/A            continue;
962SN/A
972SN/A        DPRINTF(PCEvent, "PC based event serviced at %#x: %s\n",
982SN/A                (*i)->pc(), (*i)->descr());
992SN/A
1002SN/A        (*i)->process(xc);
1012SN/A        ++serviced;
1022SN/A    }
1032SN/A
1042SN/A    return serviced > 0;
1052SN/A}
1062SN/A
1072SN/Avoid
1082SN/APCEventQueue::dump() const
1092SN/A{
1102SN/A    const_iterator i = pc_map.begin();
1112SN/A    const_iterator e = pc_map.end();
1122SN/A
1132SN/A    for (; i != e; ++i)
1142SN/A        cprintf("%d: event at %#x: %s\n", curTick, (*i)->pc(),
1152SN/A                (*i)->descr());
1162SN/A}
1172SN/A
1182SN/APCEventQueue::range_t
1192SN/APCEventQueue::equal_range(Addr pc)
1202SN/A{
1212SN/A    return std::equal_range(pc_map.begin(), pc_map.end(), pc, MapCompare());
1222SN/A}
1232SN/A
1241885SN/ABreakPCEvent::BreakPCEvent(PCEventQueue *q, const std::string &desc, Addr addr,
1251885SN/A                           bool del)
1261885SN/A    : PCEvent(q, desc, addr), remove(del)
1272SN/A{
1282SN/A}
1292SN/A
1302SN/Avoid
1312SN/ABreakPCEvent::process(ExecContext *xc)
1322SN/A{
1332190SN/A    StringWrap name(xc->getCpuPtr()->name() + ".break_event");
1341646SN/A    DPRINTFN("break event %s triggered\n", descr());
1352SN/A    debug_break();
1362SN/A    if (remove)
1372SN/A        delete this;
1382SN/A}
1392SN/A
1401858SN/A#if FULL_SYSTEM
1412SN/Aextern "C"
1422SN/Avoid
1432130SN/Asched_break_pc_sys(System *sys, Addr addr)
1442SN/A{
1451885SN/A    new BreakPCEvent(&sys->pcEventQueue, "debug break", addr, true);
1462SN/A}
1472SN/A
1482SN/Aextern "C"
1492SN/Avoid
1502130SN/Asched_break_pc(Addr addr)
1512SN/A{
1522SN/A     for (vector<System *>::iterator sysi = System::systemList.begin();
1532SN/A          sysi != System::systemList.end(); ++sysi) {
1542SN/A         sched_break_pc_sys(*sysi, addr);
1552SN/A    }
1562SN/A
1572SN/A}
1582SN/A#endif
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