thread_state.hh revision 11168
12329SN/A/* 29428SAndreas.Sandberg@ARM.com * Copyright (c) 2012 ARM Limited 39428SAndreas.Sandberg@ARM.com * All rights reserved 49428SAndreas.Sandberg@ARM.com * 59428SAndreas.Sandberg@ARM.com * The license below extends only to copyright in the software and shall 69428SAndreas.Sandberg@ARM.com * not be construed as granting a license to any other intellectual 79428SAndreas.Sandberg@ARM.com * property including but not limited to intellectual property relating 89428SAndreas.Sandberg@ARM.com * to a hardware implementation of the functionality of the software 99428SAndreas.Sandberg@ARM.com * licensed hereunder. You may use the software subject to the license 109428SAndreas.Sandberg@ARM.com * terms below provided that you ensure that this notice is replicated 119428SAndreas.Sandberg@ARM.com * unmodified and in its entirety in all distributions of the software, 129428SAndreas.Sandberg@ARM.com * modified or unmodified, in source code or in binary form. 139428SAndreas.Sandberg@ARM.com * 142329SN/A * Copyright (c) 2006 The Regents of The University of Michigan 152329SN/A * All rights reserved. 162329SN/A * 172329SN/A * Redistribution and use in source and binary forms, with or without 182329SN/A * modification, are permitted provided that the following conditions are 192329SN/A * met: redistributions of source code must retain the above copyright 202329SN/A * notice, this list of conditions and the following disclaimer; 212329SN/A * redistributions in binary form must reproduce the above copyright 222329SN/A * notice, this list of conditions and the following disclaimer in the 232329SN/A * documentation and/or other materials provided with the distribution; 242329SN/A * neither the name of the copyright holders nor the names of its 252329SN/A * contributors may be used to endorse or promote products derived from 262329SN/A * this software without specific prior written permission. 272329SN/A * 282329SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292329SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302329SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312329SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322329SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332329SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342329SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352329SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362329SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372329SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382329SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392689Sktlim@umich.edu * 402689Sktlim@umich.edu * Authors: Kevin Lim 412329SN/A */ 422292SN/A 432292SN/A#ifndef __CPU_O3_THREAD_STATE_HH__ 442292SN/A#define __CPU_O3_THREAD_STATE_HH__ 452292SN/A 462362SN/A#include "base/callback.hh" 472362SN/A#include "base/output.hh" 482680Sktlim@umich.edu#include "cpu/thread_context.hh" 492292SN/A#include "cpu/thread_state.hh" 508793Sgblack@eecs.umich.edu#include "sim/full_system.hh" 512362SN/A#include "sim/sim_exit.hh" 522292SN/A 538777Sgblack@eecs.umich.educlass EndQuiesceEvent; 542292SN/Aclass Event; 558777Sgblack@eecs.umich.educlass FunctionalMemory; 568777Sgblack@eecs.umich.educlass FunctionProfile; 572292SN/Aclass Process; 582292SN/Aclass ProfileNode; 592292SN/A 602329SN/A/** 612329SN/A * Class that has various thread state, such as the status, the 622329SN/A * current instruction being processed, whether or not the thread has 632680Sktlim@umich.edu * a trap pending or is being externally updated, the ThreadContext 642680Sktlim@umich.edu * pointer, etc. It also handles anything related to a specific 652329SN/A * thread's process, such as syscalls and checking valid addresses. 662329SN/A */ 672292SN/Atemplate <class Impl> 682292SN/Astruct O3ThreadState : public ThreadState { 692680Sktlim@umich.edu typedef ThreadContext::Status Status; 702733Sktlim@umich.edu typedef typename Impl::O3CPU O3CPU; 712292SN/A 722292SN/A private: 732348SN/A /** Pointer to the CPU. */ 742733Sktlim@umich.edu O3CPU *cpu; 752292SN/A public: 769382SAli.Saidi@ARM.com /* This variable controls if writes to a thread context should cause a all 779382SAli.Saidi@ARM.com * dynamic/speculative state to be thrown away. Nominally this is the 789382SAli.Saidi@ARM.com * desired behavior because the external thread context write has updated 799382SAli.Saidi@ARM.com * some state that could be used by an inflight instruction, however there 809382SAli.Saidi@ARM.com * are some cases like in a fault/trap handler where this behavior would 819382SAli.Saidi@ARM.com * lead to successive restarts and forward progress couldn't be made. This 829382SAli.Saidi@ARM.com * variable controls if the squashing will occur. 832348SN/A */ 849382SAli.Saidi@ARM.com bool noSquashFromTC; 852292SN/A 862348SN/A /** Whether or not the thread is currently waiting on a trap, and 872348SN/A * thus able to be externally updated without squashing. 882348SN/A */ 892292SN/A bool trapPending; 902292SN/A 918766Sgblack@eecs.umich.edu O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process) 928766Sgblack@eecs.umich.edu : ThreadState(_cpu, _thread_num, _process), 9310537Sandreas.hansson@arm.com cpu(_cpu), noSquashFromTC(false), trapPending(false), 9410537Sandreas.hansson@arm.com tc(nullptr) 952362SN/A { 968806Sgblack@eecs.umich.edu if (!FullSystem) 978806Sgblack@eecs.umich.edu return; 988793Sgblack@eecs.umich.edu 998806Sgblack@eecs.umich.edu if (cpu->params()->profile) { 1008806Sgblack@eecs.umich.edu profile = new FunctionProfile( 1018806Sgblack@eecs.umich.edu cpu->params()->system->kernelSymtab); 1028806Sgblack@eecs.umich.edu Callback *cb = 1038806Sgblack@eecs.umich.edu new MakeCallback<O3ThreadState, 1048806Sgblack@eecs.umich.edu &O3ThreadState::dumpFuncProfile>(this); 1058806Sgblack@eecs.umich.edu registerExitCallback(cb); 1062362SN/A } 1078806Sgblack@eecs.umich.edu 1088806Sgblack@eecs.umich.edu // let's fill with a dummy node for now so we don't get a segfault 1098806Sgblack@eecs.umich.edu // on the first cycle when there's no node available. 1108806Sgblack@eecs.umich.edu static ProfileNode dummyNode; 1118806Sgblack@eecs.umich.edu profileNode = &dummyNode; 1128806Sgblack@eecs.umich.edu profilePC = 3; 1132362SN/A } 1142292SN/A 11511168Sandreas.hansson@arm.com void serialize(CheckpointOut &cp) const override 1169428SAndreas.Sandberg@ARM.com { 11710905Sandreas.sandberg@arm.com ThreadState::serialize(cp); 1189428SAndreas.Sandberg@ARM.com // Use the ThreadContext serialization helper to serialize the 1199428SAndreas.Sandberg@ARM.com // TC. 12010905Sandreas.sandberg@arm.com ::serialize(*tc, cp); 1219428SAndreas.Sandberg@ARM.com } 1229428SAndreas.Sandberg@ARM.com 12311168Sandreas.hansson@arm.com void unserialize(CheckpointIn &cp) override 1249428SAndreas.Sandberg@ARM.com { 1259428SAndreas.Sandberg@ARM.com // Prevent squashing - we don't have any instructions in 1269428SAndreas.Sandberg@ARM.com // flight that we need to squash since we just instantiated a 1279428SAndreas.Sandberg@ARM.com // clean system. 1289428SAndreas.Sandberg@ARM.com noSquashFromTC = true; 12910905Sandreas.sandberg@arm.com ThreadState::unserialize(cp); 1309428SAndreas.Sandberg@ARM.com // Use the ThreadContext serialization helper to unserialize 1319428SAndreas.Sandberg@ARM.com // the TC. 13210905Sandreas.sandberg@arm.com ::unserialize(*tc, cp); 1339428SAndreas.Sandberg@ARM.com noSquashFromTC = false; 1349428SAndreas.Sandberg@ARM.com } 1359428SAndreas.Sandberg@ARM.com 1362680Sktlim@umich.edu /** Pointer to the ThreadContext of this thread. */ 1372680Sktlim@umich.edu ThreadContext *tc; 1382292SN/A 1392680Sktlim@umich.edu /** Returns a pointer to the TC of this thread. */ 1402680Sktlim@umich.edu ThreadContext *getTC() { return tc; } 1412292SN/A 1422348SN/A /** Handles the syscall. */ 1432680Sktlim@umich.edu void syscall(int64_t callnum) { process->syscall(callnum, tc); } 1442362SN/A 1452362SN/A void dumpFuncProfile() 1462362SN/A { 1472362SN/A std::ostream *os = simout.create(csprintf("profile.%s.dat", cpu->name())); 1483126Sktlim@umich.edu profile->dump(tc, *os); 1492362SN/A } 1502292SN/A}; 1512292SN/A 1522292SN/A#endif // __CPU_O3_THREAD_STATE_HH__ 153