scoreboard.hh revision 9916
12292SN/A/*
22689Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan
39916Ssteve.reinhardt@amd.com * Copyright (c) 2013 Advanced Micro Devices, Inc.
42292SN/A * All rights reserved.
52292SN/A *
62292SN/A * Redistribution and use in source and binary forms, with or without
72292SN/A * modification, are permitted provided that the following conditions are
82292SN/A * met: redistributions of source code must retain the above copyright
92292SN/A * notice, this list of conditions and the following disclaimer;
102292SN/A * redistributions in binary form must reproduce the above copyright
112292SN/A * notice, this list of conditions and the following disclaimer in the
122292SN/A * documentation and/or other materials provided with the distribution;
132292SN/A * neither the name of the copyright holders nor the names of its
142292SN/A * contributors may be used to endorse or promote products derived from
152292SN/A * this software without specific prior written permission.
162292SN/A *
172292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282689Sktlim@umich.edu *
292689Sktlim@umich.edu * Authors: Korey Sewell
302689Sktlim@umich.edu *          Kevin Lim
319916Ssteve.reinhardt@amd.com *          Steve Reinhardt
322292SN/A */
332292SN/A
342292SN/A#ifndef __CPU_O3_SCOREBOARD_HH__
352292SN/A#define __CPU_O3_SCOREBOARD_HH__
362292SN/A
372292SN/A#include <iostream>
382292SN/A#include <utility>
392292SN/A#include <vector>
408229Snate@binkert.org
412292SN/A#include "base/trace.hh"
429916Ssteve.reinhardt@amd.com#include "config/the_isa.hh"
432292SN/A#include "cpu/o3/comm.hh"
449916Ssteve.reinhardt@amd.com#include "debug/Scoreboard.hh"
452292SN/A
462292SN/A/**
479916Ssteve.reinhardt@amd.com * Implements a simple scoreboard to track which registers are
489916Ssteve.reinhardt@amd.com * ready. This class operates on the unified physical register space,
499916Ssteve.reinhardt@amd.com * so integer and floating-point registers are not distinguished.  For
509916Ssteve.reinhardt@amd.com * convenience, it also accepts operations on the physical-space
519916Ssteve.reinhardt@amd.com * mapping of misc registers, which are numbered starting after the
529916Ssteve.reinhardt@amd.com * end of the actual physical register file.  However, there is no
539916Ssteve.reinhardt@amd.com * actual scoreboard for misc registers, and they are always
549916Ssteve.reinhardt@amd.com * considered ready.
552292SN/A */
562292SN/Aclass Scoreboard
572292SN/A{
589916Ssteve.reinhardt@amd.com  private:
599916Ssteve.reinhardt@amd.com    /** The object name, for DPRINTF.  We have to declare this
609916Ssteve.reinhardt@amd.com     *  explicitly because Scoreboard is not a SimObject. */
619916Ssteve.reinhardt@amd.com    const std::string _name;
629916Ssteve.reinhardt@amd.com
639916Ssteve.reinhardt@amd.com    /** Scoreboard of physical integer registers, saying whether or not they
649916Ssteve.reinhardt@amd.com     *  are ready. */
659916Ssteve.reinhardt@amd.com    std::vector<bool> regScoreBoard;
669916Ssteve.reinhardt@amd.com
679916Ssteve.reinhardt@amd.com    /** The number of actual physical registers */
689916Ssteve.reinhardt@amd.com    unsigned numPhysRegs;
699916Ssteve.reinhardt@amd.com
709916Ssteve.reinhardt@amd.com    /**
719916Ssteve.reinhardt@amd.com     * The total number of registers which can be indexed, including
729916Ssteve.reinhardt@amd.com     * the misc registers that come after the physical registers and
739916Ssteve.reinhardt@amd.com     * which are hardwired to be always considered ready.
749916Ssteve.reinhardt@amd.com     */
759916Ssteve.reinhardt@amd.com    unsigned numTotalRegs;
769916Ssteve.reinhardt@amd.com
779916Ssteve.reinhardt@amd.com    /** The index of the zero register. */
789916Ssteve.reinhardt@amd.com    PhysRegIndex zeroRegIdx;
799916Ssteve.reinhardt@amd.com
809916Ssteve.reinhardt@amd.com    /** The index of the FP zero register. */
819916Ssteve.reinhardt@amd.com    PhysRegIndex fpZeroRegIdx;
829916Ssteve.reinhardt@amd.com
839916Ssteve.reinhardt@amd.com    bool isZeroReg(PhysRegIndex idx) const
849916Ssteve.reinhardt@amd.com    {
859916Ssteve.reinhardt@amd.com        return (idx == zeroRegIdx ||
869916Ssteve.reinhardt@amd.com                (THE_ISA == ALPHA_ISA && idx == fpZeroRegIdx));
879916Ssteve.reinhardt@amd.com    }
889916Ssteve.reinhardt@amd.com
892292SN/A  public:
902292SN/A    /** Constructs a scoreboard.
919916Ssteve.reinhardt@amd.com     *  @param _numPhysicalRegs Number of physical registers.
922292SN/A     *  @param _numMiscRegs Number of miscellaneous registers.
932292SN/A     *  @param _zeroRegIdx Index of the zero register.
949916Ssteve.reinhardt@amd.com     *  @param _fpZeroRegIdx Index of the FP zero register (if any, currently
959916Ssteve.reinhardt@amd.com     *                       used only for Alpha).
962292SN/A     */
979916Ssteve.reinhardt@amd.com    Scoreboard(const std::string &_my_name,
989916Ssteve.reinhardt@amd.com               unsigned _numPhysicalRegs,
992292SN/A               unsigned _numMiscRegs,
1009916Ssteve.reinhardt@amd.com               PhysRegIndex _zeroRegIdx,
1019916Ssteve.reinhardt@amd.com               PhysRegIndex _fpZeroRegIdx);
1022292SN/A
1032292SN/A    /** Destructor. */
1042292SN/A    ~Scoreboard() {}
1052292SN/A
1062292SN/A    /** Returns the name of the scoreboard. */
1079916Ssteve.reinhardt@amd.com    std::string name() const { return _name; };
1082292SN/A
1092292SN/A    /** Checks if the register is ready. */
1109916Ssteve.reinhardt@amd.com    bool getReg(PhysRegIndex reg_idx) const
1119916Ssteve.reinhardt@amd.com    {
1129916Ssteve.reinhardt@amd.com        assert(reg_idx < numTotalRegs);
1139916Ssteve.reinhardt@amd.com
1149916Ssteve.reinhardt@amd.com        if (reg_idx >= numPhysRegs) {
1159916Ssteve.reinhardt@amd.com            // misc regs are always ready
1169916Ssteve.reinhardt@amd.com            return true;
1179916Ssteve.reinhardt@amd.com        }
1189916Ssteve.reinhardt@amd.com
1199916Ssteve.reinhardt@amd.com        bool ready = regScoreBoard[reg_idx];
1209916Ssteve.reinhardt@amd.com
1219916Ssteve.reinhardt@amd.com        if (isZeroReg(reg_idx))
1229916Ssteve.reinhardt@amd.com            assert(ready);
1239916Ssteve.reinhardt@amd.com
1249916Ssteve.reinhardt@amd.com        return ready;
1259916Ssteve.reinhardt@amd.com    }
1262292SN/A
1272292SN/A    /** Sets the register as ready. */
1289916Ssteve.reinhardt@amd.com    void setReg(PhysRegIndex reg_idx)
1299916Ssteve.reinhardt@amd.com    {
1309916Ssteve.reinhardt@amd.com        assert(reg_idx < numTotalRegs);
1319916Ssteve.reinhardt@amd.com
1329916Ssteve.reinhardt@amd.com        if (reg_idx >= numPhysRegs) {
1339916Ssteve.reinhardt@amd.com            // misc regs are always ready, ignore attempts to change that
1349916Ssteve.reinhardt@amd.com            return;
1359916Ssteve.reinhardt@amd.com        }
1369916Ssteve.reinhardt@amd.com
1379916Ssteve.reinhardt@amd.com        DPRINTF(Scoreboard, "Setting reg %i as ready\n", reg_idx);
1389916Ssteve.reinhardt@amd.com
1399916Ssteve.reinhardt@amd.com        assert(reg_idx < numTotalRegs);
1409916Ssteve.reinhardt@amd.com        regScoreBoard[reg_idx] = true;
1419916Ssteve.reinhardt@amd.com    }
1422292SN/A
1432292SN/A    /** Sets the register as not ready. */
1449916Ssteve.reinhardt@amd.com    void unsetReg(PhysRegIndex reg_idx)
1459916Ssteve.reinhardt@amd.com    {
1469916Ssteve.reinhardt@amd.com        assert(reg_idx < numTotalRegs);
1472292SN/A
1489916Ssteve.reinhardt@amd.com        if (reg_idx >= numPhysRegs) {
1499916Ssteve.reinhardt@amd.com            // misc regs are always ready, ignore attempts to change that
1509916Ssteve.reinhardt@amd.com            return;
1519916Ssteve.reinhardt@amd.com        }
1522292SN/A
1539916Ssteve.reinhardt@amd.com        // zero reg should never be marked unready
1549916Ssteve.reinhardt@amd.com        if (isZeroReg(reg_idx))
1559916Ssteve.reinhardt@amd.com            return;
1562292SN/A
1579916Ssteve.reinhardt@amd.com        regScoreBoard[reg_idx] = false;
1587699Sgblack@eecs.umich.edu    }
1597699Sgblack@eecs.umich.edu
1602292SN/A};
1612292SN/A
1622292SN/A#endif
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