scoreboard.hh revision 8229
12292SN/A/*
22689Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan
32292SN/A * All rights reserved.
42292SN/A *
52292SN/A * Redistribution and use in source and binary forms, with or without
62292SN/A * modification, are permitted provided that the following conditions are
72292SN/A * met: redistributions of source code must retain the above copyright
82292SN/A * notice, this list of conditions and the following disclaimer;
92292SN/A * redistributions in binary form must reproduce the above copyright
102292SN/A * notice, this list of conditions and the following disclaimer in the
112292SN/A * documentation and/or other materials provided with the distribution;
122292SN/A * neither the name of the copyright holders nor the names of its
132292SN/A * contributors may be used to endorse or promote products derived from
142292SN/A * this software without specific prior written permission.
152292SN/A *
162292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272689Sktlim@umich.edu *
282689Sktlim@umich.edu * Authors: Korey Sewell
292689Sktlim@umich.edu *          Kevin Lim
302292SN/A */
312292SN/A
322292SN/A#ifndef __CPU_O3_SCOREBOARD_HH__
332292SN/A#define __CPU_O3_SCOREBOARD_HH__
342292SN/A
352292SN/A#include <iostream>
362292SN/A#include <utility>
372292SN/A#include <vector>
388229Snate@binkert.org
392292SN/A#include "base/trace.hh"
402292SN/A#include "base/traceflags.hh"
412292SN/A#include "cpu/o3/comm.hh"
422292SN/A
432292SN/A/**
442292SN/A * Implements a simple scoreboard to track which registers are ready.
452292SN/A * This class assumes that the fp registers start, index wise, right after
462292SN/A * the integer registers. The misc. registers start, index wise, right after
472292SN/A * the fp registers.
482292SN/A * @todo: Fix up handling of the zero register in case the decoder does not
492292SN/A * automatically make insts that write the zero register into nops.
502292SN/A */
512292SN/Aclass Scoreboard
522292SN/A{
532292SN/A  public:
542292SN/A    /** Constructs a scoreboard.
552292SN/A     *  @param activeThreads The number of active threads.
562292SN/A     *  @param _numLogicalIntRegs Number of logical integer registers.
572292SN/A     *  @param _numPhysicalIntRegs Number of physical integer registers.
582292SN/A     *  @param _numLogicalFloatRegs Number of logical fp registers.
592292SN/A     *  @param _numPhysicalFloatRegs Number of physical fp registers.
602292SN/A     *  @param _numMiscRegs Number of miscellaneous registers.
612292SN/A     *  @param _zeroRegIdx Index of the zero register.
622292SN/A     */
632292SN/A    Scoreboard(unsigned activeThreads,
642292SN/A               unsigned _numLogicalIntRegs,
652292SN/A               unsigned _numPhysicalIntRegs,
662292SN/A               unsigned _numLogicalFloatRegs,
672292SN/A               unsigned _numPhysicalFloatRegs,
682292SN/A               unsigned _numMiscRegs,
692292SN/A               unsigned _zeroRegIdx);
702292SN/A
712292SN/A    /** Destructor. */
722292SN/A    ~Scoreboard() {}
732292SN/A
742292SN/A    /** Returns the name of the scoreboard. */
752292SN/A    std::string name() const;
762292SN/A
772292SN/A    /** Checks if the register is ready. */
782292SN/A    bool getReg(PhysRegIndex ready_reg);
792292SN/A
802292SN/A    /** Sets the register as ready. */
812292SN/A    void setReg(PhysRegIndex phys_reg);
822292SN/A
832292SN/A    /** Sets the register as not ready. */
842292SN/A    void unsetReg(PhysRegIndex ready_reg);
852292SN/A
862292SN/A  private:
872292SN/A    /** Scoreboard of physical integer registers, saying whether or not they
882292SN/A     *  are ready.
892292SN/A     */
902292SN/A    std::vector<bool> regScoreBoard;
912292SN/A
922292SN/A    /** Number of logical integer registers. */
932292SN/A    int numLogicalIntRegs;
942292SN/A
952292SN/A    /** Number of physical integer registers. */
962292SN/A    int numPhysicalIntRegs;
972292SN/A
982292SN/A    /** Number of logical floating point registers. */
992292SN/A    int numLogicalFloatRegs;
1002292SN/A
1012292SN/A    /** Number of physical floating point registers. */
1022292SN/A    int numPhysicalFloatRegs;
1032292SN/A
1042292SN/A    /** Number of miscellaneous registers. */
1052292SN/A    int numMiscRegs;
1062292SN/A
1072292SN/A    /** Number of logical integer + float registers. */
1082292SN/A    int numLogicalRegs;
1092292SN/A
1102292SN/A    /** Number of physical integer + float registers. */
1112292SN/A    int numPhysicalRegs;
1122292SN/A
1132292SN/A    /** The logical index of the zero register. */
1142292SN/A    int zeroRegIdx;
1157699Sgblack@eecs.umich.edu
1167699Sgblack@eecs.umich.edu    int currentSize;
1177699Sgblack@eecs.umich.edu
1187699Sgblack@eecs.umich.edu    void
1197699Sgblack@eecs.umich.edu    resize(int newSize)
1207699Sgblack@eecs.umich.edu    {
1217699Sgblack@eecs.umich.edu        currentSize = newSize;
1227699Sgblack@eecs.umich.edu        regScoreBoard.resize(newSize);
1237699Sgblack@eecs.umich.edu    }
1247699Sgblack@eecs.umich.edu
1257699Sgblack@eecs.umich.edu    bool
1267699Sgblack@eecs.umich.edu    indexInBounds(int idx)
1277699Sgblack@eecs.umich.edu    {
1287699Sgblack@eecs.umich.edu        return idx < currentSize;
1297699Sgblack@eecs.umich.edu    }
1302292SN/A};
1312292SN/A
1322292SN/A#endif
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