rob_impl.hh revision 8822
11689SN/A/*
22329SN/A * Copyright (c) 2004-2006 The Regents of The University of Michigan
31689SN/A * All rights reserved.
41689SN/A *
51689SN/A * Redistribution and use in source and binary forms, with or without
61689SN/A * modification, are permitted provided that the following conditions are
71689SN/A * met: redistributions of source code must retain the above copyright
81689SN/A * notice, this list of conditions and the following disclaimer;
91689SN/A * redistributions in binary form must reproduce the above copyright
101689SN/A * notice, this list of conditions and the following disclaimer in the
111689SN/A * documentation and/or other materials provided with the distribution;
121689SN/A * neither the name of the copyright holders nor the names of its
131689SN/A * contributors may be used to endorse or promote products derived from
141689SN/A * this software without specific prior written permission.
151689SN/A *
161689SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171689SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181689SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191689SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201689SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211689SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221689SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231689SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241689SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251689SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261689SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Kevin Lim
292831Sksewell@umich.edu *          Korey Sewell
301689SN/A */
311689SN/A
326221Snate@binkert.org#include <list>
336221Snate@binkert.org
341717SN/A#include "cpu/o3/rob.hh"
358232Snate@binkert.org#include "debug/Fetch.hh"
368232Snate@binkert.org#include "debug/ROB.hh"
371060SN/A
386221Snate@binkert.orgusing namespace std;
392292SN/A
401061SN/Atemplate <class Impl>
414329Sktlim@umich.eduROB<Impl>::ROB(O3CPU *_cpu, unsigned _numEntries, unsigned _squashWidth,
422980Sgblack@eecs.umich.edu               std::string _smtROBPolicy, unsigned _smtROBThreshold,
436221Snate@binkert.org               ThreadID _numThreads)
444329Sktlim@umich.edu    : cpu(_cpu),
454329Sktlim@umich.edu      numEntries(_numEntries),
461060SN/A      squashWidth(_squashWidth),
471060SN/A      numInstsInROB(0),
482292SN/A      numThreads(_numThreads)
491060SN/A{
506221Snate@binkert.org    for (ThreadID tid = 0; tid  < numThreads; tid++) {
512877Sksewell@umich.edu        squashedSeqNum[tid] = 0;
522292SN/A        doneSquashing[tid] = true;
532292SN/A        threadEntries[tid] = 0;
542292SN/A    }
552292SN/A
562980Sgblack@eecs.umich.edu    std::string policy = _smtROBPolicy;
572292SN/A
582292SN/A    //Convert string to lowercase
592292SN/A    std::transform(policy.begin(), policy.end(), policy.begin(),
602292SN/A                   (int(*)(int)) tolower);
612292SN/A
622292SN/A    //Figure out rob policy
632292SN/A    if (policy == "dynamic") {
642292SN/A        robPolicy = Dynamic;
652292SN/A
662292SN/A        //Set Max Entries to Total ROB Capacity
676221Snate@binkert.org        for (ThreadID tid = 0; tid < numThreads; tid++) {
686221Snate@binkert.org            maxEntries[tid] = numEntries;
692292SN/A        }
702292SN/A
712292SN/A    } else if (policy == "partitioned") {
722292SN/A        robPolicy = Partitioned;
734329Sktlim@umich.edu        DPRINTF(Fetch, "ROB sharing policy set to Partitioned\n");
742292SN/A
752292SN/A        //@todo:make work if part_amt doesnt divide evenly.
762292SN/A        int part_amt = numEntries / numThreads;
772292SN/A
782292SN/A        //Divide ROB up evenly
796221Snate@binkert.org        for (ThreadID tid = 0; tid < numThreads; tid++) {
806221Snate@binkert.org            maxEntries[tid] = part_amt;
812292SN/A        }
822292SN/A
832292SN/A    } else if (policy == "threshold") {
842292SN/A        robPolicy = Threshold;
854329Sktlim@umich.edu        DPRINTF(Fetch, "ROB sharing policy set to Threshold\n");
862292SN/A
872292SN/A        int threshold =  _smtROBThreshold;;
882292SN/A
892292SN/A        //Divide up by threshold amount
906221Snate@binkert.org        for (ThreadID tid = 0; tid < numThreads; tid++) {
916221Snate@binkert.org            maxEntries[tid] = threshold;
922292SN/A        }
932292SN/A    } else {
942292SN/A        assert(0 && "Invalid ROB Sharing Policy.Options Are:{Dynamic,"
952292SN/A                    "Partitioned, Threshold}");
962292SN/A    }
971060SN/A
982292SN/A    // Set the per-thread iterators to the end of the instruction list.
996221Snate@binkert.org    for (ThreadID tid = 0; tid < numThreads; tid++) {
1006221Snate@binkert.org        squashIt[tid] = instList[tid].end();
1012292SN/A    }
1021060SN/A
1032292SN/A    // Initialize the "universal" ROB head & tail point to invalid
1042292SN/A    // pointers
1052292SN/A    head = instList[0].end();
1062292SN/A    tail = instList[0].end();
1072292SN/A}
1082292SN/A
1092292SN/Atemplate <class Impl>
1104329Sktlim@umich.edustd::string
1114329Sktlim@umich.eduROB<Impl>::name() const
1124329Sktlim@umich.edu{
1134329Sktlim@umich.edu    return cpu->name() + ".rob";
1144329Sktlim@umich.edu}
1154329Sktlim@umich.edu
1164329Sktlim@umich.edutemplate <class Impl>
1172292SN/Avoid
1186221Snate@binkert.orgROB<Impl>::setActiveThreads(list<ThreadID> *at_ptr)
1192292SN/A{
1202292SN/A    DPRINTF(ROB, "Setting active threads list pointer.\n");
1212292SN/A    activeThreads = at_ptr;
1222292SN/A}
1232292SN/A
1242307SN/Atemplate <class Impl>
1252307SN/Avoid
1262307SN/AROB<Impl>::switchOut()
1272307SN/A{
1286221Snate@binkert.org    for (ThreadID tid = 0; tid < numThreads; tid++) {
1292307SN/A        instList[tid].clear();
1302307SN/A    }
1312307SN/A}
1322307SN/A
1332307SN/Atemplate <class Impl>
1342307SN/Avoid
1352307SN/AROB<Impl>::takeOverFrom()
1362307SN/A{
1376221Snate@binkert.org    for (ThreadID tid = 0; tid  < numThreads; tid++) {
1382307SN/A        doneSquashing[tid] = true;
1392307SN/A        threadEntries[tid] = 0;
1402307SN/A        squashIt[tid] = instList[tid].end();
1412307SN/A    }
1422307SN/A    numInstsInROB = 0;
1432307SN/A
1442307SN/A    // Initialize the "universal" ROB head & tail point to invalid
1452307SN/A    // pointers
1462307SN/A    head = instList[0].end();
1472307SN/A    tail = instList[0].end();
1482307SN/A}
1492292SN/A
1502292SN/Atemplate <class Impl>
1512292SN/Avoid
1522292SN/AROB<Impl>::resetEntries()
1532292SN/A{
1542292SN/A    if (robPolicy != Dynamic || numThreads > 1) {
1553867Sbinkertn@umich.edu        int active_threads = activeThreads->size();
1562292SN/A
1576221Snate@binkert.org        list<ThreadID>::iterator threads = activeThreads->begin();
1586221Snate@binkert.org        list<ThreadID>::iterator end = activeThreads->end();
1592292SN/A
1603867Sbinkertn@umich.edu        while (threads != end) {
1616221Snate@binkert.org            ThreadID tid = *threads++;
1623867Sbinkertn@umich.edu
1632292SN/A            if (robPolicy == Partitioned) {
1643867Sbinkertn@umich.edu                maxEntries[tid] = numEntries / active_threads;
1652292SN/A            } else if (robPolicy == Threshold && active_threads == 1) {
1663867Sbinkertn@umich.edu                maxEntries[tid] = numEntries;
1672292SN/A            }
1682292SN/A        }
1692292SN/A    }
1702292SN/A}
1712292SN/A
1722292SN/Atemplate <class Impl>
1732292SN/Aint
1746221Snate@binkert.orgROB<Impl>::entryAmount(ThreadID num_threads)
1752292SN/A{
1762292SN/A    if (robPolicy == Partitioned) {
1772292SN/A        return numEntries / num_threads;
1782292SN/A    } else {
1792292SN/A        return 0;
1802292SN/A    }
1811060SN/A}
1821060SN/A
1831061SN/Atemplate <class Impl>
1841060SN/Aint
1851060SN/AROB<Impl>::countInsts()
1861060SN/A{
1876221Snate@binkert.org    int total = 0;
1881061SN/A
1896221Snate@binkert.org    for (ThreadID tid = 0; tid < numThreads; tid++)
1906221Snate@binkert.org        total += countInsts(tid);
1911060SN/A
1922292SN/A    return total;
1932292SN/A}
1941060SN/A
1952292SN/Atemplate <class Impl>
1962292SN/Aint
1976221Snate@binkert.orgROB<Impl>::countInsts(ThreadID tid)
1982292SN/A{
1992292SN/A    return instList[tid].size();
2001060SN/A}
2011060SN/A
2021061SN/Atemplate <class Impl>
2031060SN/Avoid
2041061SN/AROB<Impl>::insertInst(DynInstPtr &inst)
2051060SN/A{
2061060SN/A    assert(inst);
2071060SN/A
2087897Shestness@cs.utexas.edu    robWrites++;
2097897Shestness@cs.utexas.edu
2107720Sgblack@eecs.umich.edu    DPRINTF(ROB, "Adding inst PC %s to the ROB.\n", inst->pcState());
2111060SN/A
2121060SN/A    assert(numInstsInROB != numEntries);
2131060SN/A
2146221Snate@binkert.org    ThreadID tid = inst->threadNumber;
2151060SN/A
2162292SN/A    instList[tid].push_back(inst);
2172292SN/A
2182292SN/A    //Set Up head iterator if this is the 1st instruction in the ROB
2192292SN/A    if (numInstsInROB == 0) {
2202292SN/A        head = instList[tid].begin();
2212292SN/A        assert((*head) == inst);
2221060SN/A    }
2231060SN/A
2242292SN/A    //Must Decrement for iterator to actually be valid  since __.end()
2252292SN/A    //actually points to 1 after the last inst
2262292SN/A    tail = instList[tid].end();
2272292SN/A    tail--;
2282292SN/A
2292292SN/A    inst->setInROB();
2302292SN/A
2312292SN/A    ++numInstsInROB;
2322292SN/A    ++threadEntries[tid];
2332292SN/A
2341060SN/A    assert((*tail) == inst);
2351060SN/A
2362292SN/A    DPRINTF(ROB, "[tid:%i] Now has %d instructions.\n", tid, threadEntries[tid]);
2371060SN/A}
2381060SN/A
2392292SN/Atemplate <class Impl>
2402292SN/Avoid
2416221Snate@binkert.orgROB<Impl>::retireHead(ThreadID tid)
2422292SN/A{
2437897Shestness@cs.utexas.edu    robWrites++;
2447897Shestness@cs.utexas.edu
2451061SN/A    assert(numInstsInROB > 0);
2461060SN/A
2471060SN/A    // Get the head ROB instruction.
2482292SN/A    InstIt head_it = instList[tid].begin();
2491060SN/A
2502292SN/A    DynInstPtr head_inst = (*head_it);
2511858SN/A
2521060SN/A    assert(head_inst->readyToCommit());
2531060SN/A
2542292SN/A    DPRINTF(ROB, "[tid:%u]: Retiring head instruction, "
2557720Sgblack@eecs.umich.edu            "instruction PC %s, [sn:%lli]\n", tid, head_inst->pcState(),
2561060SN/A            head_inst->seqNum);
2571060SN/A
2581060SN/A    --numInstsInROB;
2592292SN/A    --threadEntries[tid];
2601060SN/A
2612731Sktlim@umich.edu    head_inst->clearInROB();
2622292SN/A    head_inst->setCommitted();
2632292SN/A
2642292SN/A    instList[tid].erase(head_it);
2652292SN/A
2662292SN/A    //Update "Global" Head of ROB
2672292SN/A    updateHead();
2682292SN/A
2692329SN/A    // @todo: A special case is needed if the instruction being
2702329SN/A    // retired is the only instruction in the ROB; otherwise the tail
2712329SN/A    // iterator will become invalidated.
2721681SN/A    cpu->removeFrontInst(head_inst);
2731060SN/A}
2742292SN/A
2752292SN/Atemplate <class Impl>
2762292SN/Abool
2776221Snate@binkert.orgROB<Impl>::isHeadReady(ThreadID tid)
2782292SN/A{
2797897Shestness@cs.utexas.edu    robReads++;
2802292SN/A    if (threadEntries[tid] != 0) {
2812292SN/A        return instList[tid].front()->readyToCommit();
2822292SN/A    }
2832292SN/A
2842292SN/A    return false;
2852292SN/A}
2862292SN/A
2872292SN/Atemplate <class Impl>
2882292SN/Abool
2892292SN/AROB<Impl>::canCommit()
2902292SN/A{
2912292SN/A    //@todo: set ActiveThreads through ROB or CPU
2926221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
2936221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
2942292SN/A
2953867Sbinkertn@umich.edu    while (threads != end) {
2966221Snate@binkert.org        ThreadID tid = *threads++;
2972292SN/A
2982292SN/A        if (isHeadReady(tid)) {
2992292SN/A            return true;
3002292SN/A        }
3011060SN/A    }
3021060SN/A
3031060SN/A    return false;
3041060SN/A}
3051060SN/A
3061061SN/Atemplate <class Impl>
3071060SN/Aunsigned
3081060SN/AROB<Impl>::numFreeEntries()
3091060SN/A{
3101060SN/A    return numEntries - numInstsInROB;
3111060SN/A}
3121060SN/A
3131061SN/Atemplate <class Impl>
3142292SN/Aunsigned
3156221Snate@binkert.orgROB<Impl>::numFreeEntries(ThreadID tid)
3161060SN/A{
3172292SN/A    return maxEntries[tid] - threadEntries[tid];
3181060SN/A}
3191060SN/A
3201061SN/Atemplate <class Impl>
3211060SN/Avoid
3226221Snate@binkert.orgROB<Impl>::doSquash(ThreadID tid)
3231060SN/A{
3247897Shestness@cs.utexas.edu    robWrites++;
3252292SN/A    DPRINTF(ROB, "[tid:%u]: Squashing instructions until [sn:%i].\n",
3262877Sksewell@umich.edu            tid, squashedSeqNum[tid]);
3271858SN/A
3282292SN/A    assert(squashIt[tid] != instList[tid].end());
3292292SN/A
3302877Sksewell@umich.edu    if ((*squashIt[tid])->seqNum < squashedSeqNum[tid]) {
3312292SN/A        DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n",
3322292SN/A                tid);
3332292SN/A
3342292SN/A        squashIt[tid] = instList[tid].end();
3352292SN/A
3362292SN/A        doneSquashing[tid] = true;
3372292SN/A        return;
3382292SN/A    }
3392292SN/A
3402292SN/A    bool robTailUpdate = false;
3411858SN/A
3421858SN/A    for (int numSquashed = 0;
3432292SN/A         numSquashed < squashWidth &&
3442292SN/A         squashIt[tid] != instList[tid].end() &&
3452877Sksewell@umich.edu         (*squashIt[tid])->seqNum > squashedSeqNum[tid];
3461858SN/A         ++numSquashed)
3471858SN/A    {
3487720Sgblack@eecs.umich.edu        DPRINTF(ROB, "[tid:%u]: Squashing instruction PC %s, seq num %i.\n",
3492292SN/A                (*squashIt[tid])->threadNumber,
3507720Sgblack@eecs.umich.edu                (*squashIt[tid])->pcState(),
3512292SN/A                (*squashIt[tid])->seqNum);
3521858SN/A
3531858SN/A        // Mark the instruction as squashed, and ready to commit so that
3541858SN/A        // it can drain out of the pipeline.
3552292SN/A        (*squashIt[tid])->setSquashed();
3561858SN/A
3572292SN/A        (*squashIt[tid])->setCanCommit();
3581858SN/A
3592292SN/A
3602292SN/A        if (squashIt[tid] == instList[tid].begin()) {
3612292SN/A            DPRINTF(ROB, "Reached head of instruction list while "
3621858SN/A                    "squashing.\n");
3631858SN/A
3642292SN/A            squashIt[tid] = instList[tid].end();
3651858SN/A
3662292SN/A            doneSquashing[tid] = true;
3671858SN/A
3681858SN/A            return;
3691858SN/A        }
3701858SN/A
3712292SN/A        InstIt tail_thread = instList[tid].end();
3722292SN/A        tail_thread--;
3732292SN/A
3742292SN/A        if ((*squashIt[tid]) == (*tail_thread))
3752292SN/A            robTailUpdate = true;
3762292SN/A
3772292SN/A        squashIt[tid]--;
3781858SN/A    }
3791858SN/A
3801858SN/A
3811858SN/A    // Check if ROB is done squashing.
3822877Sksewell@umich.edu    if ((*squashIt[tid])->seqNum <= squashedSeqNum[tid]) {
3832292SN/A        DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n",
3842292SN/A                tid);
3851858SN/A
3862292SN/A        squashIt[tid] = instList[tid].end();
3871858SN/A
3882292SN/A        doneSquashing[tid] = true;
3892292SN/A    }
3902292SN/A
3912292SN/A    if (robTailUpdate) {
3922292SN/A        updateTail();
3932292SN/A    }
3942292SN/A}
3952292SN/A
3962292SN/A
3972292SN/Atemplate <class Impl>
3982292SN/Avoid
3992292SN/AROB<Impl>::updateHead()
4002292SN/A{
4012292SN/A    DynInstPtr head_inst;
4022292SN/A    InstSeqNum lowest_num = 0;
4032292SN/A    bool first_valid = true;
4042292SN/A
4052292SN/A    // @todo: set ActiveThreads through ROB or CPU
4066221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
4076221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
4082292SN/A
4093867Sbinkertn@umich.edu    while (threads != end) {
4106221Snate@binkert.org        ThreadID tid = *threads++;
4112292SN/A
4123867Sbinkertn@umich.edu        if (instList[tid].empty())
4132292SN/A            continue;
4142292SN/A
4152292SN/A        if (first_valid) {
4163867Sbinkertn@umich.edu            head = instList[tid].begin();
4172292SN/A            lowest_num = (*head)->seqNum;
4182292SN/A            first_valid = false;
4192292SN/A            continue;
4202292SN/A        }
4212292SN/A
4223867Sbinkertn@umich.edu        InstIt head_thread = instList[tid].begin();
4232292SN/A
4242292SN/A        DynInstPtr head_inst = (*head_thread);
4252292SN/A
4262292SN/A        assert(head_inst != 0);
4272292SN/A
4282292SN/A        if (head_inst->seqNum < lowest_num) {
4292292SN/A            head = head_thread;
4302292SN/A            lowest_num = head_inst->seqNum;
4312292SN/A        }
4322292SN/A    }
4332292SN/A
4342292SN/A    if (first_valid) {
4352292SN/A        head = instList[0].end();
4362292SN/A    }
4372292SN/A
4382292SN/A}
4392292SN/A
4402292SN/Atemplate <class Impl>
4412292SN/Avoid
4422292SN/AROB<Impl>::updateTail()
4432292SN/A{
4442292SN/A    tail = instList[0].end();
4452292SN/A    bool first_valid = true;
4462292SN/A
4476221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
4486221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
4492292SN/A
4503867Sbinkertn@umich.edu    while (threads != end) {
4516221Snate@binkert.org        ThreadID tid = *threads++;
4522292SN/A
4532292SN/A        if (instList[tid].empty()) {
4542292SN/A            continue;
4552292SN/A        }
4562292SN/A
4572292SN/A        // If this is the first valid then assign w/out
4582292SN/A        // comparison
4592292SN/A        if (first_valid) {
4602292SN/A            tail = instList[tid].end();
4612292SN/A            tail--;
4622292SN/A            first_valid = false;
4632292SN/A            continue;
4642292SN/A        }
4652292SN/A
4662292SN/A        // Assign new tail if this thread's tail is younger
4672292SN/A        // than our current "tail high"
4682292SN/A        InstIt tail_thread = instList[tid].end();
4692292SN/A        tail_thread--;
4702292SN/A
4712292SN/A        if ((*tail_thread)->seqNum > (*tail)->seqNum) {
4722292SN/A            tail = tail_thread;
4732292SN/A        }
4742292SN/A    }
4752292SN/A}
4762292SN/A
4772292SN/A
4782292SN/Atemplate <class Impl>
4792292SN/Avoid
4806221Snate@binkert.orgROB<Impl>::squash(InstSeqNum squash_num, ThreadID tid)
4812292SN/A{
4822292SN/A    if (isEmpty()) {
4832292SN/A        DPRINTF(ROB, "Does not need to squash due to being empty "
4842292SN/A                "[sn:%i]\n",
4852292SN/A                squash_num);
4862292SN/A
4872292SN/A        return;
4882292SN/A    }
4892292SN/A
4902292SN/A    DPRINTF(ROB, "Starting to squash within the ROB.\n");
4912292SN/A
4922292SN/A    robStatus[tid] = ROBSquashing;
4932292SN/A
4942292SN/A    doneSquashing[tid] = false;
4951060SN/A
4962877Sksewell@umich.edu    squashedSeqNum[tid] = squash_num;
4971060SN/A
4982292SN/A    if (!instList[tid].empty()) {
4992292SN/A        InstIt tail_thread = instList[tid].end();
5002292SN/A        tail_thread--;
5011060SN/A
5022292SN/A        squashIt[tid] = tail_thread;
5031060SN/A
5042292SN/A        doSquash(tid);
5051858SN/A    }
5061060SN/A}
5072877Sksewell@umich.edu
5082292SN/Atemplate <class Impl>
5092292SN/Atypename Impl::DynInstPtr
5106221Snate@binkert.orgROB<Impl>::readHeadInst(ThreadID tid)
5112292SN/A{
5122292SN/A    if (threadEntries[tid] != 0) {
5132292SN/A        InstIt head_thread = instList[tid].begin();
5141060SN/A
5152292SN/A        assert((*head_thread)->isInROB()==true);
5161858SN/A
5172292SN/A        return *head_thread;
5182292SN/A    } else {
5192292SN/A        return dummyInst;
5202292SN/A    }
5211858SN/A}
5222877Sksewell@umich.edu
5232292SN/Atemplate <class Impl>
5242292SN/Atypename Impl::DynInstPtr
5256221Snate@binkert.orgROB<Impl>::readTailInst(ThreadID tid)
5262292SN/A{
5272292SN/A    InstIt tail_thread = instList[tid].end();
5282292SN/A    tail_thread--;
5292292SN/A
5302292SN/A    return *tail_thread;
5312292SN/A}
5322292SN/A
5337897Shestness@cs.utexas.edutemplate <class Impl>
5347897Shestness@cs.utexas.eduvoid
5357897Shestness@cs.utexas.eduROB<Impl>::regStats()
5367897Shestness@cs.utexas.edu{
5377897Shestness@cs.utexas.edu    using namespace Stats;
5387897Shestness@cs.utexas.edu    robReads
5397897Shestness@cs.utexas.edu        .name(name() + ".rob_reads")
5407897Shestness@cs.utexas.edu        .desc("The number of ROB reads");
5417897Shestness@cs.utexas.edu
5427897Shestness@cs.utexas.edu    robWrites
5437897Shestness@cs.utexas.edu        .name(name() + ".rob_writes")
5447897Shestness@cs.utexas.edu        .desc("The number of ROB writes");
5457897Shestness@cs.utexas.edu}
5467897Shestness@cs.utexas.edu
5478822Snilay@cs.wisc.edutemplate <class Impl>
5488822Snilay@cs.wisc.edutypename Impl::DynInstPtr
5498822Snilay@cs.wisc.eduROB<Impl>::findInst(ThreadID tid, InstSeqNum squash_inst)
5508822Snilay@cs.wisc.edu{
5518822Snilay@cs.wisc.edu    for (InstIt it = instList[tid].begin(); it != instList[tid].end(); it++) {
5528822Snilay@cs.wisc.edu        if ((*it)->seqNum == squash_inst) {
5538822Snilay@cs.wisc.edu            return *it;
5548822Snilay@cs.wisc.edu        }
5558822Snilay@cs.wisc.edu    }
5568822Snilay@cs.wisc.edu    return NULL;
5578822Snilay@cs.wisc.edu}
558