rob.hh revision 2733:e0eac8fc5774 
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_ROB_HH__
32#define __CPU_O3_ROB_HH__
33
34#include <string>
35#include <utility>
36#include <vector>
37
38/**
39 * ROB class.  The ROB is largely what drives squashing.
40 */
41template <class Impl>
42class ROB
43{
44  protected:
45    typedef TheISA::RegIndex RegIndex;
46  public:
47    //Typedefs from the Impl.
48    typedef typename Impl::O3CPU O3CPU;
49    typedef typename Impl::DynInstPtr DynInstPtr;
50
51    typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo;
52    typedef typename std::list<DynInstPtr>::iterator InstIt;
53
54    /** Possible ROB statuses. */
55    enum Status {
56        Running,
57        Idle,
58        ROBSquashing
59    };
60
61    /** SMT ROB Sharing Policy */
62    enum ROBPolicy{
63        Dynamic,
64        Partitioned,
65        Threshold
66    };
67
68  private:
69    /** Per-thread ROB status. */
70    Status robStatus[Impl::MaxThreads];
71
72    /** ROB resource sharing policy for SMT mode. */
73    ROBPolicy robPolicy;
74
75  public:
76    /** ROB constructor.
77     *  @param _numEntries      Number of entries in ROB.
78     *  @param _squashWidth     Number of instructions that can be squashed in a
79     *                          single cycle.
80     *  @param _smtROBPolicy    ROB Partitioning Scheme for SMT.
81     *  @param _smtROBThreshold Max Resources(by %) a thread can have in the ROB.
82     *  @param _numThreads      The number of active threads.
83     */
84    ROB(unsigned _numEntries, unsigned _squashWidth, std::string smtROBPolicy,
85        unsigned _smtROBThreshold, unsigned _numThreads);
86
87    std::string name() const;
88
89    /** Function to set the CPU pointer, necessary due to which object the ROB
90     *  is created within.
91     *  @param cpu_ptr Pointer to the implementation specific full CPU object.
92     */
93    void setCPU(O3CPU *cpu_ptr);
94
95    /** Sets pointer to the list of active threads.
96     *  @param at_ptr Pointer to the list of active threads.
97     */
98    void setActiveThreads(std::list<unsigned>* at_ptr);
99
100    /** Switches out the ROB. */
101    void switchOut();
102
103    /** Takes over another CPU's thread. */
104    void takeOverFrom();
105
106    /** Function to insert an instruction into the ROB. Note that whatever
107     *  calls this function must ensure that there is enough space within the
108     *  ROB for the new instruction.
109     *  @param inst The instruction being inserted into the ROB.
110     */
111    void insertInst(DynInstPtr &inst);
112
113    /** Returns pointer to the head instruction within the ROB.  There is
114     *  no guarantee as to the return value if the ROB is empty.
115     *  @retval Pointer to the DynInst that is at the head of the ROB.
116     */
117//    DynInstPtr readHeadInst();
118
119    /** Returns a pointer to the head instruction of a specific thread within
120     *  the ROB.
121     *  @return Pointer to the DynInst that is at the head of the ROB.
122     */
123    DynInstPtr readHeadInst(unsigned tid);
124
125    /** Returns pointer to the tail instruction within the ROB.  There is
126     *  no guarantee as to the return value if the ROB is empty.
127     *  @retval Pointer to the DynInst that is at the tail of the ROB.
128     */
129//    DynInstPtr readTailInst();
130
131    /** Returns a pointer to the tail instruction of a specific thread within
132     *  the ROB.
133     *  @return Pointer to the DynInst that is at the tail of the ROB.
134     */
135    DynInstPtr readTailInst(unsigned tid);
136
137    /** Retires the head instruction, removing it from the ROB. */
138//    void retireHead();
139
140    /** Retires the head instruction of a specific thread, removing it from the
141     *  ROB.
142     */
143    void retireHead(unsigned tid);
144
145    /** Is the oldest instruction across all threads ready. */
146//    bool isHeadReady();
147
148    /** Is the oldest instruction across a particular thread ready. */
149    bool isHeadReady(unsigned tid);
150
151    /** Is there any commitable head instruction across all threads ready. */
152    bool canCommit();
153
154    /** Re-adjust ROB partitioning. */
155    void resetEntries();
156
157    /** Number of entries needed For 'num_threads' amount of threads. */
158    int entryAmount(int num_threads);
159
160    /** Returns the number of total free entries in the ROB. */
161    unsigned numFreeEntries();
162
163    /** Returns the number of free entries in a specific ROB paritition. */
164    unsigned numFreeEntries(unsigned tid);
165
166    /** Returns the maximum number of entries for a specific thread. */
167    unsigned getMaxEntries(unsigned tid)
168    { return maxEntries[tid]; }
169
170    /** Returns the number of entries being used by a specific thread. */
171    unsigned getThreadEntries(unsigned tid)
172    { return threadEntries[tid]; }
173
174    /** Returns if the ROB is full. */
175    bool isFull()
176    { return numInstsInROB == numEntries; }
177
178    /** Returns if a specific thread's partition is full. */
179    bool isFull(unsigned tid)
180    { return threadEntries[tid] == numEntries; }
181
182    /** Returns if the ROB is empty. */
183    bool isEmpty()
184    { return numInstsInROB == 0; }
185
186    /** Returns if a specific thread's partition is empty. */
187    bool isEmpty(unsigned tid)
188    { return threadEntries[tid] == 0; }
189
190    /** Executes the squash, marking squashed instructions. */
191    void doSquash(unsigned tid);
192
193    /** Squashes all instructions younger than the given sequence number for
194     *  the specific thread.
195     */
196    void squash(InstSeqNum squash_num, unsigned tid);
197
198    /** Updates the head instruction with the new oldest instruction. */
199    void updateHead();
200
201    /** Updates the tail instruction with the new youngest instruction. */
202    void updateTail();
203
204    /** Reads the PC of the oldest head instruction. */
205//    uint64_t readHeadPC();
206
207    /** Reads the PC of the head instruction of a specific thread. */
208//    uint64_t readHeadPC(unsigned tid);
209
210    /** Reads the next PC of the oldest head instruction. */
211//    uint64_t readHeadNextPC();
212
213    /** Reads the next PC of the head instruction of a specific thread. */
214//    uint64_t readHeadNextPC(unsigned tid);
215
216    /** Reads the sequence number of the oldest head instruction. */
217//    InstSeqNum readHeadSeqNum();
218
219    /** Reads the sequence number of the head instruction of a specific thread.
220     */
221//    InstSeqNum readHeadSeqNum(unsigned tid);
222
223    /** Reads the PC of the youngest tail instruction. */
224//    uint64_t readTailPC();
225
226    /** Reads the PC of the tail instruction of a specific thread. */
227//    uint64_t readTailPC(unsigned tid);
228
229    /** Reads the sequence number of the youngest tail instruction. */
230//    InstSeqNum readTailSeqNum();
231
232    /** Reads the sequence number of tail instruction of a specific thread. */
233//    InstSeqNum readTailSeqNum(unsigned tid);
234
235    /** Checks if the ROB is still in the process of squashing instructions.
236     *  @retval Whether or not the ROB is done squashing.
237     */
238    bool isDoneSquashing(unsigned tid) const
239    { return doneSquashing[tid]; }
240
241    /** Checks if the ROB is still in the process of squashing instructions for
242     *  any thread.
243     */
244    bool isDoneSquashing();
245
246    /** This is more of a debugging function than anything.  Use
247     *  numInstsInROB to get the instructions in the ROB unless you are
248     *  double checking that variable.
249     */
250    int countInsts();
251
252    /** This is more of a debugging function than anything.  Use
253     *  threadEntries to get the instructions in the ROB unless you are
254     *  double checking that variable.
255     */
256    int countInsts(unsigned tid);
257
258  private:
259    /** Pointer to the CPU. */
260    O3CPU *cpu;
261
262    /** Active Threads in CPU */
263    std::list<unsigned>* activeThreads;
264
265    /** Number of instructions in the ROB. */
266    unsigned numEntries;
267
268    /** Entries Per Thread */
269    unsigned threadEntries[Impl::MaxThreads];
270
271    /** Max Insts a Thread Can Have in the ROB */
272    unsigned maxEntries[Impl::MaxThreads];
273
274    /** ROB List of Instructions */
275    std::list<DynInstPtr> instList[Impl::MaxThreads];
276
277    /** Number of instructions that can be squashed in a single cycle. */
278    unsigned squashWidth;
279
280  public:
281    /** Iterator pointing to the instruction which is the last instruction
282     *  in the ROB.  This may at times be invalid (ie when the ROB is empty),
283     *  however it should never be incorrect.
284     */
285    InstIt tail;
286
287    /** Iterator pointing to the instruction which is the first instruction in
288     *  in the ROB*/
289    InstIt head;
290
291  private:
292    /** Iterator used for walking through the list of instructions when
293     *  squashing.  Used so that there is persistent state between cycles;
294     *  when squashing, the instructions are marked as squashed but not
295     *  immediately removed, meaning the tail iterator remains the same before
296     *  and after a squash.
297     *  This will always be set to cpu->instList.end() if it is invalid.
298     */
299    InstIt squashIt[Impl::MaxThreads];
300
301  public:
302    /** Number of instructions in the ROB. */
303    int numInstsInROB;
304
305    /** Dummy instruction returned if there are no insts left. */
306    DynInstPtr dummyInst;
307
308  private:
309    /** The sequence number of the squashed instruction. */
310    InstSeqNum squashedSeqNum;
311
312    /** Is the ROB done squashing. */
313    bool doneSquashing[Impl::MaxThreads];
314
315    /** Number of active threads. */
316    unsigned numThreads;
317};
318
319#endif //__CPU_O3_ROB_HH__
320