rename_map.hh revision 2292
19646SChris.Emmons@arm.com/* 210839Sandreas.sandberg@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan 39646SChris.Emmons@arm.com * All rights reserved. 49646SChris.Emmons@arm.com * 59646SChris.Emmons@arm.com * Redistribution and use in source and binary forms, with or without 69646SChris.Emmons@arm.com * modification, are permitted provided that the following conditions are 79646SChris.Emmons@arm.com * met: redistributions of source code must retain the above copyright 89646SChris.Emmons@arm.com * notice, this list of conditions and the following disclaimer; 99646SChris.Emmons@arm.com * redistributions in binary form must reproduce the above copyright 109646SChris.Emmons@arm.com * notice, this list of conditions and the following disclaimer in the 119646SChris.Emmons@arm.com * documentation and/or other materials provided with the distribution; 129646SChris.Emmons@arm.com * neither the name of the copyright holders nor the names of its 139646SChris.Emmons@arm.com * contributors may be used to endorse or promote products derived from 149646SChris.Emmons@arm.com * this software without specific prior written permission. 159646SChris.Emmons@arm.com * 169646SChris.Emmons@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 179646SChris.Emmons@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 189646SChris.Emmons@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 199646SChris.Emmons@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 209646SChris.Emmons@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 219646SChris.Emmons@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 229646SChris.Emmons@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 239646SChris.Emmons@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 249646SChris.Emmons@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 259646SChris.Emmons@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 269646SChris.Emmons@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 279646SChris.Emmons@arm.com */ 289646SChris.Emmons@arm.com 299646SChris.Emmons@arm.com// Todo: Create destructor. 309646SChris.Emmons@arm.com// Have it so that there's a more meaningful name given to the variable 319646SChris.Emmons@arm.com// that marks the beginning of the FP registers. 329646SChris.Emmons@arm.com 339646SChris.Emmons@arm.com#ifndef __CPU_O3_RENAME_MAP_HH__ 349646SChris.Emmons@arm.com#define __CPU_O3_RENAME_MAP_HH__ 359646SChris.Emmons@arm.com 369646SChris.Emmons@arm.com#include <iostream> 379646SChris.Emmons@arm.com#include <utility> 3811090Sandreas.sandberg@arm.com#include <vector> 399646SChris.Emmons@arm.com 409646SChris.Emmons@arm.com#include "cpu/o3/free_list.hh" 4110839Sandreas.sandberg@arm.com//For RegIndex 4210839Sandreas.sandberg@arm.com#include "arch/isa_traits.hh" 439646SChris.Emmons@arm.com 449646SChris.Emmons@arm.comclass SimpleRenameMap 459646SChris.Emmons@arm.com{ 4611090Sandreas.sandberg@arm.com protected: 479646SChris.Emmons@arm.com typedef TheISA::RegIndex RegIndex; 489646SChris.Emmons@arm.com public: 499646SChris.Emmons@arm.com /** 509646SChris.Emmons@arm.com * Pair of a logical register and a physical register. Tells the 519646SChris.Emmons@arm.com * previous mapping of a logical register to a physical register. 5211090Sandreas.sandberg@arm.com * Used to roll back the rename map to a previous state. 539646SChris.Emmons@arm.com */ 549646SChris.Emmons@arm.com typedef std::pair<RegIndex, PhysRegIndex> UnmapInfo; 559646SChris.Emmons@arm.com 569646SChris.Emmons@arm.com /** 579646SChris.Emmons@arm.com * Pair of a physical register and a physical register. Used to 589646SChris.Emmons@arm.com * return the physical register that a logical register has been 5911090Sandreas.sandberg@arm.com * renamed to, and the previous physical register that the same 6011090Sandreas.sandberg@arm.com * logical register was previously mapped to. 6111090Sandreas.sandberg@arm.com */ 6211090Sandreas.sandberg@arm.com typedef std::pair<PhysRegIndex, PhysRegIndex> RenameInfo; 6311090Sandreas.sandberg@arm.com 6411090Sandreas.sandberg@arm.com public: 6511090Sandreas.sandberg@arm.com //Constructor 6611090Sandreas.sandberg@arm.com SimpleRenameMap() {}; 6711090Sandreas.sandberg@arm.com 6811090Sandreas.sandberg@arm.com /** Destructor. */ 6911090Sandreas.sandberg@arm.com ~SimpleRenameMap(); 7011090Sandreas.sandberg@arm.com 7111090Sandreas.sandberg@arm.com void init(unsigned _numLogicalIntRegs, 7211090Sandreas.sandberg@arm.com unsigned _numPhysicalIntRegs, 739646SChris.Emmons@arm.com PhysRegIndex &_int_reg_start, 749646SChris.Emmons@arm.com 7511090Sandreas.sandberg@arm.com unsigned _numLogicalFloatRegs, 769646SChris.Emmons@arm.com unsigned _numPhysicalFloatRegs, 779646SChris.Emmons@arm.com PhysRegIndex &_float_reg_start, 7811090Sandreas.sandberg@arm.com 7911090Sandreas.sandberg@arm.com unsigned _numMiscRegs, 8011090Sandreas.sandberg@arm.com 8111090Sandreas.sandberg@arm.com RegIndex _intZeroReg, 8211090Sandreas.sandberg@arm.com RegIndex _floatZeroReg, 839646SChris.Emmons@arm.com 8411090Sandreas.sandberg@arm.com int id, 8511090Sandreas.sandberg@arm.com bool bindRegs); 8611090Sandreas.sandberg@arm.com 8711090Sandreas.sandberg@arm.com void setFreeList(SimpleFreeList *fl_ptr); 889646SChris.Emmons@arm.com 899646SChris.Emmons@arm.com //Tell rename map to get a free physical register for a given 9011090Sandreas.sandberg@arm.com //architected register. Not sure it should have a return value, 919646SChris.Emmons@arm.com //but perhaps it should have some sort of fault in case there are 929646SChris.Emmons@arm.com //no free registers. 939646SChris.Emmons@arm.com RenameInfo rename(RegIndex arch_reg); 949646SChris.Emmons@arm.com 959646SChris.Emmons@arm.com PhysRegIndex lookup(RegIndex phys_reg); 969646SChris.Emmons@arm.com 9711090Sandreas.sandberg@arm.com /** 9811091Sandreas.sandberg@arm.com * Marks the given register as ready, meaning that its value has been 9911091Sandreas.sandberg@arm.com * calculated and written to the register file. 10011091Sandreas.sandberg@arm.com * @param ready_reg The index of the physical register that is now ready. 10111091Sandreas.sandberg@arm.com */ 10211091Sandreas.sandberg@arm.com void setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg); 10311091Sandreas.sandberg@arm.com 10411091Sandreas.sandberg@arm.com void squash(std::vector<RegIndex> freed_regs, 10511091Sandreas.sandberg@arm.com std::vector<UnmapInfo> unmaps); 10611091Sandreas.sandberg@arm.com 10711091Sandreas.sandberg@arm.com int numFreeEntries(); 10811091Sandreas.sandberg@arm.com 10911091Sandreas.sandberg@arm.com private: 11011090Sandreas.sandberg@arm.com /** Rename Map ID */ 11111090Sandreas.sandberg@arm.com int id; 11211090Sandreas.sandberg@arm.com 11311090Sandreas.sandberg@arm.com /** Number of logical integer registers. */ 11411090Sandreas.sandberg@arm.com int numLogicalIntRegs; 11511090Sandreas.sandberg@arm.com 11611090Sandreas.sandberg@arm.com /** Number of physical integer registers. */ 11711090Sandreas.sandberg@arm.com int numPhysicalIntRegs; 11811090Sandreas.sandberg@arm.com 11911090Sandreas.sandberg@arm.com /** Number of logical floating point registers. */ 12011090Sandreas.sandberg@arm.com int numLogicalFloatRegs; 12111090Sandreas.sandberg@arm.com 12211090Sandreas.sandberg@arm.com /** Number of physical floating point registers. */ 12311090Sandreas.sandberg@arm.com int numPhysicalFloatRegs; 12411090Sandreas.sandberg@arm.com 12511090Sandreas.sandberg@arm.com /** Number of miscellaneous registers. */ 12611090Sandreas.sandberg@arm.com int numMiscRegs; 12711090Sandreas.sandberg@arm.com 12811090Sandreas.sandberg@arm.com /** Number of logical integer + float registers. */ 12911090Sandreas.sandberg@arm.com int numLogicalRegs; 13011090Sandreas.sandberg@arm.com 13111090Sandreas.sandberg@arm.com /** Number of physical integer + float registers. */ 13211090Sandreas.sandberg@arm.com int numPhysicalRegs; 13311090Sandreas.sandberg@arm.com 13411090Sandreas.sandberg@arm.com /** The integer zero register. This implementation assumes it is always 13511090Sandreas.sandberg@arm.com * zero and never can be anything else. 13611090Sandreas.sandberg@arm.com */ 13711090Sandreas.sandberg@arm.com RegIndex intZeroReg; 13811090Sandreas.sandberg@arm.com 13911090Sandreas.sandberg@arm.com /** The floating point zero register. This implementation assumes it is 14011090Sandreas.sandberg@arm.com * always zero and never can be anything else. 14111090Sandreas.sandberg@arm.com */ 14211090Sandreas.sandberg@arm.com RegIndex floatZeroReg; 14311090Sandreas.sandberg@arm.com 14411090Sandreas.sandberg@arm.com class RenameEntry 14511090Sandreas.sandberg@arm.com { 14611090Sandreas.sandberg@arm.com public: 14711090Sandreas.sandberg@arm.com PhysRegIndex physical_reg; 14811090Sandreas.sandberg@arm.com bool valid; 14911090Sandreas.sandberg@arm.com 15011090Sandreas.sandberg@arm.com RenameEntry() 15111090Sandreas.sandberg@arm.com : physical_reg(0), valid(false) 15211090Sandreas.sandberg@arm.com { } 15311090Sandreas.sandberg@arm.com }; 15411090Sandreas.sandberg@arm.com 15511090Sandreas.sandberg@arm.com //Change this to private 15611090Sandreas.sandberg@arm.com public: 15711090Sandreas.sandberg@arm.com /** Integer rename map. */ 15811090Sandreas.sandberg@arm.com std::vector<RenameEntry> intRenameMap; 15911090Sandreas.sandberg@arm.com 16011090Sandreas.sandberg@arm.com /** Floating point rename map. */ 16111090Sandreas.sandberg@arm.com std::vector<RenameEntry> floatRenameMap; 16211090Sandreas.sandberg@arm.com 16311090Sandreas.sandberg@arm.com private: 16411090Sandreas.sandberg@arm.com /** Free list interface. */ 16511090Sandreas.sandberg@arm.com SimpleFreeList *freeList; 16611090Sandreas.sandberg@arm.com}; 16711090Sandreas.sandberg@arm.com 16811090Sandreas.sandberg@arm.com#endif //__CPU_O3_RENAME_MAP_HH__ 16911090Sandreas.sandberg@arm.com