rename.hh revision 1061 
1// Todo:
2// Fix up trap and barrier handling.
3// May want to have different statuses to differentiate the different stall
4// conditions.
5
6#ifndef __SIMPLE_RENAME_HH__
7#define __SIMPLE_RENAME_HH__
8
9#include <list>
10
11#include "base/timebuf.hh"
12
13// Will need rename maps for both the int reg file and fp reg file.
14// Or change rename map class to handle both. (RegFile handles both.)
15template<class Impl>
16class SimpleRename
17{
18  public:
19    // Typedefs from the Impl.
20    typedef typename Impl::ISA ISA;
21    typedef typename Impl::CPUPol CPUPol;
22    typedef typename Impl::DynInstPtr DynInstPtr;
23    typedef typename Impl::FullCPU FullCPU;
24    typedef typename Impl::Params Params;
25
26    typedef typename CPUPol::FetchStruct FetchStruct;
27    typedef typename CPUPol::DecodeStruct DecodeStruct;
28    typedef typename CPUPol::RenameStruct RenameStruct;
29    typedef typename CPUPol::TimeStruct TimeStruct;
30
31    // Typedefs from the CPUPol
32    typedef typename CPUPol::FreeList FreeList;
33    typedef typename CPUPol::RenameMap RenameMap;
34
35    // Typedefs from the ISA.
36    typedef typename ISA::Addr Addr;
37
38  public:
39    // Rename will block if ROB becomes full or issue queue becomes full,
40    // or there are no free registers to rename to.
41    // Only case where rename squashes is if IEW squashes.
42    enum Status {
43        Running,
44        Idle,
45        Squashing,
46        Blocked,
47        Unblocking,
48        BarrierStall
49    };
50
51  private:
52    Status _status;
53
54  public:
55    SimpleRename(Params &params);
56
57    void setCPU(FullCPU *cpu_ptr);
58
59    void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
60
61    void setRenameQueue(TimeBuffer<RenameStruct> *rq_ptr);
62
63    void setDecodeQueue(TimeBuffer<DecodeStruct> *dq_ptr);
64
65    void setRenameMap(RenameMap *rm_ptr);
66
67    void setFreeList(FreeList *fl_ptr);
68
69    void dumpHistory();
70
71    void tick();
72
73    void rename();
74
75    void squash();
76
77  private:
78    void block();
79
80    inline void unblock();
81
82    void doSquash();
83
84    void removeFromHistory(InstSeqNum inst_seq_num);
85
86    inline void renameSrcRegs(DynInstPtr &inst);
87
88    inline void renameDestRegs(DynInstPtr &inst);
89
90    inline int calcFreeROBEntries();
91
92    inline int calcFreeIQEntries();
93
94    /** Holds the previous information for each rename.
95     *  Note that often times the inst may have been deleted, so only access
96     *  the pointer for the address and do not dereference it.
97     */
98    struct RenameHistory {
99        RenameHistory(InstSeqNum _instSeqNum, RegIndex _archReg,
100                      PhysRegIndex _newPhysReg, PhysRegIndex _prevPhysReg)
101            : instSeqNum(_instSeqNum), archReg(_archReg),
102              newPhysReg(_newPhysReg), prevPhysReg(_prevPhysReg),
103              placeHolder(false)
104        {
105        }
106
107        /** Constructor used specifically for cases where a place holder
108         *  rename history entry is being made.
109         */
110        RenameHistory(InstSeqNum _instSeqNum)
111            : instSeqNum(_instSeqNum), archReg(0), newPhysReg(0),
112              prevPhysReg(0), placeHolder(true)
113        {
114        }
115
116        InstSeqNum instSeqNum;
117        RegIndex archReg;
118        PhysRegIndex newPhysReg;
119        PhysRegIndex prevPhysReg;
120        bool placeHolder;
121    };
122
123    std::list<RenameHistory> historyBuffer;
124
125    /** CPU interface. */
126    FullCPU *cpu;
127
128    // Interfaces to objects outside of rename.
129    /** Time buffer interface. */
130    TimeBuffer<TimeStruct> *timeBuffer;
131
132    /** Wire to get IEW's output from backwards time buffer. */
133    typename TimeBuffer<TimeStruct>::wire fromIEW;
134
135    /** Wire to get commit's output from backwards time buffer. */
136    typename TimeBuffer<TimeStruct>::wire fromCommit;
137
138    /** Wire to write infromation heading to previous stages. */
139    // Might not be the best name as not only decode will read it.
140    typename TimeBuffer<TimeStruct>::wire toDecode;
141
142    /** Rename instruction queue. */
143    TimeBuffer<RenameStruct> *renameQueue;
144
145    /** Wire to write any information heading to IEW. */
146    typename TimeBuffer<RenameStruct>::wire toIEW;
147
148    /** Decode instruction queue interface. */
149    TimeBuffer<DecodeStruct> *decodeQueue;
150
151    /** Wire to get decode's output from decode queue. */
152    typename TimeBuffer<DecodeStruct>::wire fromDecode;
153
154    /** Skid buffer between rename and decode. */
155    std::queue<DecodeStruct> skidBuffer;
156
157    /** Rename map interface. */
158    SimpleRenameMap *renameMap;
159
160    /** Free list interface. */
161    FreeList *freeList;
162
163    /** Delay between iew and rename, in ticks. */
164    int iewToRenameDelay;
165
166    /** Delay between decode and rename, in ticks. */
167    int decodeToRenameDelay;
168
169    /** Delay between commit and rename, in ticks. */
170    unsigned commitToRenameDelay;
171
172    /** Rename width, in instructions. */
173    unsigned renameWidth;
174
175    /** Commit width, in instructions.  Used so rename knows how many
176     *  instructions might have freed registers in the previous cycle.
177     */
178    unsigned commitWidth;
179
180    /** The instruction that rename is currently on.  It needs to have
181     *  persistent state so that when a stall occurs in the middle of a
182     *  group of instructions, it can restart at the proper instruction.
183     */
184    unsigned numInst;
185};
186
187#endif // __SIMPLE_RENAME_HH__
188