regfile.hh revision 8794:e2ac2b7164dd 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 *          Gabe Black
30 */
31
32#ifndef __CPU_O3_REGFILE_HH__
33#define __CPU_O3_REGFILE_HH__
34
35#include <vector>
36
37#include "arch/isa_traits.hh"
38#include "arch/kernel_stats.hh"
39#include "arch/types.hh"
40#include "base/trace.hh"
41#include "config/the_isa.hh"
42#include "cpu/o3/comm.hh"
43#include "debug/IEW.hh"
44
45/**
46 * Simple physical register file class.
47 * Right now this is specific to Alpha until we decide if/how to make things
48 * generic enough to support other ISAs.
49 */
50template <class Impl>
51class PhysRegFile
52{
53  protected:
54    typedef TheISA::IntReg IntReg;
55    typedef TheISA::FloatReg FloatReg;
56    typedef TheISA::FloatRegBits FloatRegBits;
57
58    typedef union {
59        FloatReg d;
60        FloatRegBits q;
61    } PhysFloatReg;
62
63    // Note that most of the definitions of the IntReg, FloatReg, etc. exist
64    // within the Impl/ISA class and not within this PhysRegFile class.
65
66    // Will make these registers public for now, but they probably should
67    // be private eventually with some accessor functions.
68  public:
69    typedef typename Impl::O3CPU O3CPU;
70
71    /**
72     * Constructs a physical register file with the specified amount of
73     * integer and floating point registers.
74     */
75    PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs,
76                unsigned _numPhysicalFloatRegs);
77
78    //Everything below should be pretty well identical to the normal
79    //register file that exists within AlphaISA class.
80    //The duplication is unfortunate but it's better than having
81    //different ways to access certain registers.
82
83    /** Reads an integer register. */
84    uint64_t readIntReg(PhysRegIndex reg_idx)
85    {
86        assert(reg_idx < numPhysicalIntRegs);
87
88        DPRINTF(IEW, "RegFile: Access to int register %i, has data "
89                "%#x\n", int(reg_idx), intRegFile[reg_idx]);
90        return intRegFile[reg_idx];
91    }
92
93    /** Reads a floating point register (double precision). */
94    FloatReg readFloatReg(PhysRegIndex reg_idx)
95    {
96        // Remove the base Float reg dependency.
97        reg_idx = reg_idx - numPhysicalIntRegs;
98
99        assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
100
101        FloatReg floatReg = floatRegFile[reg_idx].d;
102
103        DPRINTF(IEW, "RegFile: Access to float register %i, has "
104                "data %#x\n", int(reg_idx), floatRegFile[reg_idx].q);
105
106        return floatReg;
107    }
108
109    FloatRegBits readFloatRegBits(PhysRegIndex reg_idx)
110    {
111        // Remove the base Float reg dependency.
112        reg_idx = reg_idx - numPhysicalIntRegs;
113
114        assert(reg_idx < numPhysicalFloatRegs + numPhysicalIntRegs);
115
116        FloatRegBits floatRegBits = floatRegFile[reg_idx].q;
117
118        DPRINTF(IEW, "RegFile: Access to float register %i as int, "
119                "has data %#x\n", int(reg_idx), (uint64_t)floatRegBits);
120
121        return floatRegBits;
122    }
123
124    /** Sets an integer register to the given value. */
125    void setIntReg(PhysRegIndex reg_idx, uint64_t val)
126    {
127        assert(reg_idx < numPhysicalIntRegs);
128
129        DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n",
130                int(reg_idx), val);
131
132        if (reg_idx != TheISA::ZeroReg)
133            intRegFile[reg_idx] = val;
134    }
135
136    /** Sets a double precision floating point register to the given value. */
137    void setFloatReg(PhysRegIndex reg_idx, FloatReg val)
138    {
139        // Remove the base Float reg dependency.
140        reg_idx = reg_idx - numPhysicalIntRegs;
141
142        assert(reg_idx < numPhysicalFloatRegs);
143
144        DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
145                int(reg_idx), (uint64_t)val);
146
147#if THE_ISA == ALPHA_ISA
148        if (reg_idx != TheISA::ZeroReg)
149#endif
150            floatRegFile[reg_idx].d = val;
151    }
152
153    void setFloatRegBits(PhysRegIndex reg_idx, FloatRegBits val)
154    {
155        // Remove the base Float reg dependency.
156        reg_idx = reg_idx - numPhysicalIntRegs;
157
158        assert(reg_idx < numPhysicalFloatRegs);
159
160        DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n",
161                int(reg_idx), (uint64_t)val);
162
163        floatRegFile[reg_idx].q = val;
164    }
165
166  public:
167    /** (signed) integer register file. */
168    IntReg *intRegFile;
169
170    /** Floating point register file. */
171    PhysFloatReg *floatRegFile;
172
173  private:
174    int intrflag;                       // interrupt flag
175
176  private:
177    /** CPU pointer. */
178    O3CPU *cpu;
179
180  public:
181    /** Number of physical integer registers. */
182    unsigned numPhysicalIntRegs;
183    /** Number of physical floating point registers. */
184    unsigned numPhysicalFloatRegs;
185};
186
187template <class Impl>
188PhysRegFile<Impl>::PhysRegFile(O3CPU *_cpu, unsigned _numPhysicalIntRegs,
189                               unsigned _numPhysicalFloatRegs)
190    : cpu(_cpu), numPhysicalIntRegs(_numPhysicalIntRegs),
191      numPhysicalFloatRegs(_numPhysicalFloatRegs)
192{
193    intRegFile = new IntReg[numPhysicalIntRegs];
194    floatRegFile = new PhysFloatReg[numPhysicalFloatRegs];
195
196    memset(intRegFile, 0, sizeof(IntReg) * numPhysicalIntRegs);
197    memset(floatRegFile, 0, sizeof(PhysFloatReg) * numPhysicalFloatRegs);
198}
199
200#endif
201