regfile.cc revision 12109
1/* 2 * Copyright (c) 2016 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2004-2005 The Regents of The University of Michigan 15 * Copyright (c) 2013 Advanced Micro Devices, Inc. 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution; 25 * neither the name of the copyright holders nor the names of its 26 * contributors may be used to endorse or promote products derived from 27 * this software without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Kevin Lim 42 * Gabe Black 43 * Steve Reinhardt 44 */ 45 46#include "cpu/o3/regfile.hh" 47 48#include "cpu/o3/free_list.hh" 49#include "arch/generic/types.hh" 50#include "cpu/o3/free_list.hh" 51 52PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, 53 unsigned _numPhysicalFloatRegs, 54 unsigned _numPhysicalVecRegs, 55 unsigned _numPhysicalCCRegs, 56 VecMode vmode) 57 : intRegFile(_numPhysicalIntRegs), 58 floatRegFile(_numPhysicalFloatRegs), 59 vectorRegFile(_numPhysicalVecRegs), 60 ccRegFile(_numPhysicalCCRegs), 61 numPhysicalIntRegs(_numPhysicalIntRegs), 62 numPhysicalFloatRegs(_numPhysicalFloatRegs), 63 numPhysicalVecRegs(_numPhysicalVecRegs), 64 numPhysicalVecElemRegs(_numPhysicalVecRegs * 65 NumVecElemPerVecReg), 66 numPhysicalCCRegs(_numPhysicalCCRegs), 67 totalNumRegs(_numPhysicalIntRegs 68 + _numPhysicalFloatRegs 69 + _numPhysicalVecRegs 70 + _numPhysicalVecRegs * NumVecElemPerVecReg 71 + _numPhysicalCCRegs), 72 vecMode(vmode) 73{ 74 PhysRegIndex phys_reg; 75 PhysRegIndex flat_reg_idx = 0; 76 77 if (TheISA::NumCCRegs == 0 && _numPhysicalCCRegs != 0) { 78 // Just make this a warning and go ahead and allocate them 79 // anyway, to keep from having to add checks everywhere 80 warn("Non-zero number of physical CC regs specified, even though\n" 81 " ISA does not use them.\n"); 82 } 83 // The initial batch of registers are the integer ones 84 for (phys_reg = 0; phys_reg < numPhysicalIntRegs; phys_reg++) { 85 intRegIds.emplace_back(IntRegClass, phys_reg, flat_reg_idx++); 86 } 87 88 // The next batch of the registers are the floating-point physical 89 // registers; put them onto the floating-point free list. 90 for (phys_reg = 0; phys_reg < numPhysicalFloatRegs; phys_reg++) { 91 floatRegIds.emplace_back(FloatRegClass, phys_reg, flat_reg_idx++); 92 } 93 94 // The next batch of the registers are the vector physical 95 // registers; put them onto the vector free list. 96 for (phys_reg = 0; phys_reg < numPhysicalVecRegs; phys_reg++) { 97 vectorRegFile[phys_reg].zero(); 98 vecRegIds.emplace_back(VecRegClass, phys_reg, flat_reg_idx++); 99 } 100 // The next batch of the registers are the vector element physical 101 // registers; they refer to the same containers as the vector 102 // registers, just a different (and incompatible) way to access 103 // them; put them onto the vector free list. 104 for (phys_reg = 0; phys_reg < numPhysicalVecRegs; phys_reg++) { 105 for (ElemIndex eIdx = 0; eIdx < NumVecElemPerVecReg; eIdx++) { 106 vecElemIds.emplace_back(VecElemClass, phys_reg, 107 eIdx, flat_reg_idx++); 108 } 109 } 110 111 // The rest of the registers are the condition-code physical 112 // registers; put them onto the condition-code free list. 113 for (phys_reg = 0; phys_reg < numPhysicalCCRegs; phys_reg++) { 114 ccRegIds.emplace_back(CCRegClass, phys_reg, flat_reg_idx++); 115 } 116 117 // Misc regs have a fixed mapping but still need PhysRegIds. 118 for (phys_reg = 0; phys_reg < TheISA::NumMiscRegs; phys_reg++) { 119 miscRegIds.emplace_back(MiscRegClass, phys_reg, 0); 120 } 121} 122 123 124void 125PhysRegFile::initFreeList(UnifiedFreeList *freeList) 126{ 127 // Initialize the free lists. 128 int reg_idx = 0; 129 130 // The initial batch of registers are the integer ones 131 for (reg_idx = 0; reg_idx < numPhysicalIntRegs; reg_idx++) { 132 assert(intRegIds[reg_idx].index() == reg_idx); 133 } 134 freeList->addRegs(intRegIds.begin(), intRegIds.end()); 135 136 // The next batch of the registers are the floating-point physical 137 // registers; put them onto the floating-point free list. 138 for (reg_idx = 0; reg_idx < numPhysicalFloatRegs; reg_idx++) { 139 assert(floatRegIds[reg_idx].index() == reg_idx); 140 } 141 freeList->addRegs(floatRegIds.begin(), floatRegIds.end()); 142 143 /* The next batch of the registers are the vector physical 144 * registers; put them onto the vector free list. */ 145 for (reg_idx = 0; reg_idx < numPhysicalVecRegs; reg_idx++) { 146 assert(vecRegIds[reg_idx].index() == reg_idx); 147 for (ElemIndex elemIdx = 0; elemIdx < NumVecElemPerVecReg; elemIdx++) { 148 assert(vecElemIds[reg_idx * NumVecElemPerVecReg + 149 elemIdx].index() == reg_idx); 150 assert(vecElemIds[reg_idx * NumVecElemPerVecReg + 151 elemIdx].elemIndex() == elemIdx); 152 } 153 } 154 155 /* depending on the mode we add the vector registers as whole units or 156 * as different elements. */ 157 if (vecMode == Enums::Full) 158 freeList->addRegs(vecRegIds.begin(), vecRegIds.end()); 159 else 160 freeList->addRegs(vecElemIds.begin(), vecElemIds.end()); 161 162 // The rest of the registers are the condition-code physical 163 // registers; put them onto the condition-code free list. 164 for (reg_idx = 0; reg_idx < numPhysicalCCRegs; reg_idx++) { 165 assert(ccRegIds[reg_idx].index() == reg_idx); 166 } 167 freeList->addRegs(ccRegIds.begin(), ccRegIds.end()); 168} 169 170auto 171PhysRegFile::getRegElemIds(PhysRegIdPtr reg) -> IdRange 172{ 173 panic_if(!reg->isVectorPhysReg(), 174 "Trying to get elems of a %s register", reg->className()); 175 auto idx = reg->index(); 176 return std::make_pair( 177 vecElemIds.begin() + idx * NumVecElemPerVecReg, 178 vecElemIds.begin() + (idx+1) * NumVecElemPerVecReg); 179} 180 181auto 182PhysRegFile::getRegIds(RegClass cls) -> IdRange 183{ 184 switch (cls) 185 { 186 case IntRegClass: 187 return std::make_pair(intRegIds.begin(), intRegIds.end()); 188 case FloatRegClass: 189 return std::make_pair(floatRegIds.begin(), floatRegIds.end()); 190 case VecRegClass: 191 return std::make_pair(vecRegIds.begin(), vecRegIds.end()); 192 case VecElemClass: 193 return std::make_pair(vecElemIds.begin(), vecElemIds.end()); 194 case CCRegClass: 195 return std::make_pair(ccRegIds.begin(), ccRegIds.end()); 196 case MiscRegClass: 197 return std::make_pair(miscRegIds.begin(), miscRegIds.end()); 198 } 199 /* There is no way to make an empty iterator */ 200 return std::make_pair(PhysIds::const_iterator(), 201 PhysIds::const_iterator()); 202} 203 204PhysRegIdPtr 205PhysRegFile::getTrueId(PhysRegIdPtr reg) 206{ 207 switch (reg->classValue()) { 208 case VecRegClass: 209 return &vecRegIds[reg->index()]; 210 case VecElemClass: 211 return &vecElemIds[reg->index() * NumVecElemPerVecReg + 212 reg->elemIndex()]; 213 default: 214 panic_if(!reg->isVectorPhysElem(), 215 "Trying to get the register of a %s register", reg->className()); 216 } 217 return nullptr; 218} 219 220