lsq_impl.hh revision 4986
12292SN/A/* 22727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan 32292SN/A * All rights reserved. 42292SN/A * 52292SN/A * Redistribution and use in source and binary forms, with or without 62292SN/A * modification, are permitted provided that the following conditions are 72292SN/A * met: redistributions of source code must retain the above copyright 82292SN/A * notice, this list of conditions and the following disclaimer; 92292SN/A * redistributions in binary form must reproduce the above copyright 102292SN/A * notice, this list of conditions and the following disclaimer in the 112292SN/A * documentation and/or other materials provided with the distribution; 122292SN/A * neither the name of the copyright holders nor the names of its 132292SN/A * contributors may be used to endorse or promote products derived from 142292SN/A * this software without specific prior written permission. 152292SN/A * 162292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Korey Sewell 292292SN/A */ 302292SN/A 312329SN/A#include <algorithm> 322980Sgblack@eecs.umich.edu#include <list> 332329SN/A#include <string> 342329SN/A 352292SN/A#include "cpu/o3/lsq.hh" 362292SN/A 374192Sktlim@umich.edutemplate<class Impl> 384192Sktlim@umich.eduvoid 394192Sktlim@umich.eduLSQ<Impl>::DcachePort::setPeer(Port *port) 404192Sktlim@umich.edu{ 414192Sktlim@umich.edu Port::setPeer(port); 424192Sktlim@umich.edu 434192Sktlim@umich.edu#if FULL_SYSTEM 444192Sktlim@umich.edu // Update the ThreadContext's memory ports (Functional/Virtual 454192Sktlim@umich.edu // Ports) 464192Sktlim@umich.edu lsq->updateMemPorts(); 474192Sktlim@umich.edu#endif 484192Sktlim@umich.edu} 494192Sktlim@umich.edu 502292SN/Atemplate <class Impl> 512907Sktlim@umich.eduTick 522907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvAtomic(PacketPtr pkt) 532907Sktlim@umich.edu{ 542907Sktlim@umich.edu panic("O3CPU model does not work with atomic mode!"); 552907Sktlim@umich.edu return curTick; 562907Sktlim@umich.edu} 572907Sktlim@umich.edu 582907Sktlim@umich.edutemplate <class Impl> 592907Sktlim@umich.eduvoid 602907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt) 612907Sktlim@umich.edu{ 623639Sktlim@umich.edu DPRINTF(LSQ, "LSQ doesn't update things on a recvFunctional."); 632907Sktlim@umich.edu} 642907Sktlim@umich.edu 652907Sktlim@umich.edutemplate <class Impl> 662907Sktlim@umich.eduvoid 672907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvStatusChange(Status status) 682907Sktlim@umich.edu{ 693647Srdreslin@umich.edu if (status == RangeChange) { 703647Srdreslin@umich.edu if (!snoopRangeSent) { 713647Srdreslin@umich.edu snoopRangeSent = true; 723647Srdreslin@umich.edu sendStatusChange(Port::RangeChange); 733647Srdreslin@umich.edu } 742907Sktlim@umich.edu return; 753647Srdreslin@umich.edu } 762907Sktlim@umich.edu panic("O3CPU doesn't expect recvStatusChange callback!"); 772907Sktlim@umich.edu} 782907Sktlim@umich.edu 792907Sktlim@umich.edutemplate <class Impl> 802907Sktlim@umich.edubool 812907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt) 822907Sktlim@umich.edu{ 834986Ssaidi@eecs.umich.edu if (pkt->isError()) 844986Ssaidi@eecs.umich.edu DPRINTF(LSQ, "Got error packet back for address: %#X\n", pkt->getAddr()); 853310Srdreslin@umich.edu if (pkt->isResponse()) { 863310Srdreslin@umich.edu lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt); 873310Srdreslin@umich.edu } 883310Srdreslin@umich.edu else { 894895Sstever@eecs.umich.edu // must be a snoop 904895Sstever@eecs.umich.edu 914895Sstever@eecs.umich.edu // @TODO someday may need to process invalidations in LSQ here 924895Sstever@eecs.umich.edu // to provide stronger consistency model 933310Srdreslin@umich.edu } 942907Sktlim@umich.edu return true; 952907Sktlim@umich.edu} 962907Sktlim@umich.edu 972907Sktlim@umich.edutemplate <class Impl> 982907Sktlim@umich.eduvoid 992907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvRetry() 1002907Sktlim@umich.edu{ 1013014Srdreslin@umich.edu if (lsq->retryTid == -1) 1023014Srdreslin@umich.edu { 1033014Srdreslin@umich.edu //Squashed, so drop it 1043014Srdreslin@umich.edu return; 1053014Srdreslin@umich.edu } 1064985Sktlim@umich.edu int curr_retry_tid = lsq->retryTid; 1072907Sktlim@umich.edu // Speculatively clear the retry Tid. This will get set again if 1082907Sktlim@umich.edu // the LSQUnit was unable to complete its access. 1092907Sktlim@umich.edu lsq->retryTid = -1; 1104985Sktlim@umich.edu lsq->thread[curr_retry_tid].recvRetry(); 1112907Sktlim@umich.edu} 1122907Sktlim@umich.edu 1132907Sktlim@umich.edutemplate <class Impl> 1144329Sktlim@umich.eduLSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, Params *params) 1154329Sktlim@umich.edu : cpu(cpu_ptr), iewStage(iew_ptr), dcachePort(this), 1164329Sktlim@umich.edu LQEntries(params->LQEntries), 1174329Sktlim@umich.edu SQEntries(params->SQEntries), 1184329Sktlim@umich.edu numThreads(params->numberOfThreads), 1192907Sktlim@umich.edu retryTid(-1) 1202292SN/A{ 1213647Srdreslin@umich.edu dcachePort.snoopRangeSent = false; 1223647Srdreslin@umich.edu 1232292SN/A //**********************************************/ 1242292SN/A //************ Handle SMT Parameters ***********/ 1252292SN/A //**********************************************/ 1262980Sgblack@eecs.umich.edu std::string policy = params->smtLSQPolicy; 1272292SN/A 1282292SN/A //Convert string to lowercase 1292292SN/A std::transform(policy.begin(), policy.end(), policy.begin(), 1302292SN/A (int(*)(int)) tolower); 1312292SN/A 1322292SN/A //Figure out fetch policy 1332292SN/A if (policy == "dynamic") { 1342292SN/A lsqPolicy = Dynamic; 1352292SN/A 1362292SN/A maxLQEntries = LQEntries; 1372292SN/A maxSQEntries = SQEntries; 1384329Sktlim@umich.edu 1392292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n"); 1402292SN/A } else if (policy == "partitioned") { 1412292SN/A lsqPolicy = Partitioned; 1422292SN/A 1432292SN/A //@todo:make work if part_amt doesnt divide evenly. 1442292SN/A maxLQEntries = LQEntries / numThreads; 1452292SN/A maxSQEntries = SQEntries / numThreads; 1464329Sktlim@umich.edu 1472292SN/A DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: " 1482292SN/A "%i entries per LQ | %i entries per SQ", 1492292SN/A maxLQEntries,maxSQEntries); 1502292SN/A } else if (policy == "threshold") { 1512292SN/A lsqPolicy = Threshold; 1522292SN/A 1532292SN/A assert(params->smtLSQThreshold > LQEntries); 1542292SN/A assert(params->smtLSQThreshold > SQEntries); 1552292SN/A 1562292SN/A //Divide up by threshold amount 1572292SN/A //@todo: Should threads check the max and the total 1582292SN/A //amount of the LSQ 1592292SN/A maxLQEntries = params->smtLSQThreshold; 1602292SN/A maxSQEntries = params->smtLSQThreshold; 1614329Sktlim@umich.edu 1622292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Threshold: " 1632292SN/A "%i entries per LQ | %i entries per SQ", 1642292SN/A maxLQEntries,maxSQEntries); 1652292SN/A } else { 1662292SN/A assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic," 1672292SN/A "Partitioned, Threshold}"); 1682292SN/A } 1692292SN/A 1702292SN/A //Initialize LSQs 1712292SN/A for (int tid=0; tid < numThreads; tid++) { 1724329Sktlim@umich.edu thread[tid].init(cpu, iew_ptr, params, this, 1734329Sktlim@umich.edu maxLQEntries, maxSQEntries, tid); 1742907Sktlim@umich.edu thread[tid].setDcachePort(&dcachePort); 1752292SN/A } 1762292SN/A} 1772292SN/A 1782292SN/A 1792292SN/Atemplate<class Impl> 1802292SN/Astd::string 1812292SN/ALSQ<Impl>::name() const 1822292SN/A{ 1832292SN/A return iewStage->name() + ".lsq"; 1842292SN/A} 1852292SN/A 1862292SN/Atemplate<class Impl> 1872292SN/Avoid 1882727Sktlim@umich.eduLSQ<Impl>::regStats() 1892727Sktlim@umich.edu{ 1902727Sktlim@umich.edu //Initialize LSQs 1912727Sktlim@umich.edu for (int tid=0; tid < numThreads; tid++) { 1922727Sktlim@umich.edu thread[tid].regStats(); 1932727Sktlim@umich.edu } 1942727Sktlim@umich.edu} 1952727Sktlim@umich.edu 1962727Sktlim@umich.edutemplate<class Impl> 1972727Sktlim@umich.eduvoid 1982980Sgblack@eecs.umich.eduLSQ<Impl>::setActiveThreads(std::list<unsigned> *at_ptr) 1992292SN/A{ 2002292SN/A activeThreads = at_ptr; 2012292SN/A assert(activeThreads != 0); 2022292SN/A} 2032292SN/A 2042292SN/Atemplate <class Impl> 2052307SN/Avoid 2062307SN/ALSQ<Impl>::switchOut() 2072307SN/A{ 2082307SN/A for (int tid = 0; tid < numThreads; tid++) { 2092307SN/A thread[tid].switchOut(); 2102307SN/A } 2112307SN/A} 2122307SN/A 2132307SN/Atemplate <class Impl> 2142307SN/Avoid 2152307SN/ALSQ<Impl>::takeOverFrom() 2162307SN/A{ 2172307SN/A for (int tid = 0; tid < numThreads; tid++) { 2182307SN/A thread[tid].takeOverFrom(); 2192307SN/A } 2202307SN/A} 2212307SN/A 2222307SN/Atemplate <class Impl> 2232292SN/Aint 2242292SN/ALSQ<Impl>::entryAmount(int num_threads) 2252292SN/A{ 2262292SN/A if (lsqPolicy == Partitioned) { 2272292SN/A return LQEntries / num_threads; 2282292SN/A } else { 2292292SN/A return 0; 2302292SN/A } 2312292SN/A} 2322292SN/A 2332292SN/Atemplate <class Impl> 2342292SN/Avoid 2352292SN/ALSQ<Impl>::resetEntries() 2362292SN/A{ 2372292SN/A if (lsqPolicy != Dynamic || numThreads > 1) { 2383867Sbinkertn@umich.edu int active_threads = activeThreads->size(); 2392292SN/A 2402292SN/A int maxEntries; 2412292SN/A 2422292SN/A if (lsqPolicy == Partitioned) { 2432292SN/A maxEntries = LQEntries / active_threads; 2442292SN/A } else if (lsqPolicy == Threshold && active_threads == 1) { 2452292SN/A maxEntries = LQEntries; 2462292SN/A } else { 2472292SN/A maxEntries = LQEntries; 2482292SN/A } 2492292SN/A 2503867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 2513867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 2523867Sbinkertn@umich.edu 2533867Sbinkertn@umich.edu while (threads != end) { 2543867Sbinkertn@umich.edu unsigned tid = *threads++; 2553867Sbinkertn@umich.edu 2563867Sbinkertn@umich.edu resizeEntries(maxEntries, tid); 2572292SN/A } 2582292SN/A } 2592292SN/A} 2602292SN/A 2612292SN/Atemplate<class Impl> 2622292SN/Avoid 2632292SN/ALSQ<Impl>::removeEntries(unsigned tid) 2642292SN/A{ 2652292SN/A thread[tid].clearLQ(); 2662292SN/A thread[tid].clearSQ(); 2672292SN/A} 2682292SN/A 2692292SN/Atemplate<class Impl> 2702292SN/Avoid 2712292SN/ALSQ<Impl>::resizeEntries(unsigned size,unsigned tid) 2722292SN/A{ 2732292SN/A thread[tid].resizeLQ(size); 2742292SN/A thread[tid].resizeSQ(size); 2752292SN/A} 2762292SN/A 2772292SN/Atemplate<class Impl> 2782292SN/Avoid 2792292SN/ALSQ<Impl>::tick() 2802292SN/A{ 2813867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 2823867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 2832292SN/A 2843867Sbinkertn@umich.edu while (threads != end) { 2853867Sbinkertn@umich.edu unsigned tid = *threads++; 2862292SN/A 2872292SN/A thread[tid].tick(); 2882292SN/A } 2892292SN/A} 2902292SN/A 2912292SN/Atemplate<class Impl> 2922292SN/Avoid 2932292SN/ALSQ<Impl>::insertLoad(DynInstPtr &load_inst) 2942292SN/A{ 2952292SN/A unsigned tid = load_inst->threadNumber; 2962292SN/A 2972292SN/A thread[tid].insertLoad(load_inst); 2982292SN/A} 2992292SN/A 3002292SN/Atemplate<class Impl> 3012292SN/Avoid 3022292SN/ALSQ<Impl>::insertStore(DynInstPtr &store_inst) 3032292SN/A{ 3042292SN/A unsigned tid = store_inst->threadNumber; 3052292SN/A 3062292SN/A thread[tid].insertStore(store_inst); 3072292SN/A} 3082292SN/A 3092292SN/Atemplate<class Impl> 3102292SN/AFault 3112292SN/ALSQ<Impl>::executeLoad(DynInstPtr &inst) 3122292SN/A{ 3132292SN/A unsigned tid = inst->threadNumber; 3142292SN/A 3152292SN/A return thread[tid].executeLoad(inst); 3162292SN/A} 3172292SN/A 3182292SN/Atemplate<class Impl> 3192292SN/AFault 3202292SN/ALSQ<Impl>::executeStore(DynInstPtr &inst) 3212292SN/A{ 3222292SN/A unsigned tid = inst->threadNumber; 3232292SN/A 3242292SN/A return thread[tid].executeStore(inst); 3252292SN/A} 3262292SN/A 3272292SN/Atemplate<class Impl> 3282292SN/Avoid 3292292SN/ALSQ<Impl>::writebackStores() 3302292SN/A{ 3313867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 3323867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 3332292SN/A 3343867Sbinkertn@umich.edu while (threads != end) { 3353867Sbinkertn@umich.edu unsigned tid = *threads++; 3362292SN/A 3372292SN/A if (numStoresToWB(tid) > 0) { 3382329SN/A DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores " 3392329SN/A "available for Writeback.\n", tid, numStoresToWB(tid)); 3402292SN/A } 3412292SN/A 3422292SN/A thread[tid].writebackStores(); 3432292SN/A } 3442292SN/A} 3452292SN/A 3462292SN/Atemplate<class Impl> 3472292SN/Abool 3482292SN/ALSQ<Impl>::violation() 3492292SN/A{ 3502292SN/A /* Answers: Does Anybody Have a Violation?*/ 3513867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 3523867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 3532292SN/A 3543867Sbinkertn@umich.edu while (threads != end) { 3553867Sbinkertn@umich.edu unsigned tid = *threads++; 3563867Sbinkertn@umich.edu 3572292SN/A if (thread[tid].violation()) 3582292SN/A return true; 3592292SN/A } 3602292SN/A 3612292SN/A return false; 3622292SN/A} 3632292SN/A 3642292SN/Atemplate<class Impl> 3652292SN/Aint 3662292SN/ALSQ<Impl>::getCount() 3672292SN/A{ 3682292SN/A unsigned total = 0; 3692292SN/A 3703867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 3713867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 3722292SN/A 3733867Sbinkertn@umich.edu while (threads != end) { 3743867Sbinkertn@umich.edu unsigned tid = *threads++; 3753867Sbinkertn@umich.edu 3762292SN/A total += getCount(tid); 3772292SN/A } 3782292SN/A 3792292SN/A return total; 3802292SN/A} 3812292SN/A 3822292SN/Atemplate<class Impl> 3832292SN/Aint 3842292SN/ALSQ<Impl>::numLoads() 3852292SN/A{ 3862292SN/A unsigned total = 0; 3872292SN/A 3883867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 3893867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 3902292SN/A 3913867Sbinkertn@umich.edu while (threads != end) { 3923867Sbinkertn@umich.edu unsigned tid = *threads++; 3933867Sbinkertn@umich.edu 3942292SN/A total += numLoads(tid); 3952292SN/A } 3962292SN/A 3972292SN/A return total; 3982292SN/A} 3992292SN/A 4002292SN/Atemplate<class Impl> 4012292SN/Aint 4022292SN/ALSQ<Impl>::numStores() 4032292SN/A{ 4042292SN/A unsigned total = 0; 4052292SN/A 4063867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 4073867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 4082292SN/A 4093867Sbinkertn@umich.edu while (threads != end) { 4103867Sbinkertn@umich.edu unsigned tid = *threads++; 4113867Sbinkertn@umich.edu 4122292SN/A total += thread[tid].numStores(); 4132292SN/A } 4142292SN/A 4152292SN/A return total; 4162292SN/A} 4172292SN/A 4182292SN/Atemplate<class Impl> 4192292SN/Aint 4202292SN/ALSQ<Impl>::numLoadsReady() 4212292SN/A{ 4222292SN/A unsigned total = 0; 4232292SN/A 4243867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 4253867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 4262292SN/A 4273867Sbinkertn@umich.edu while (threads != end) { 4283867Sbinkertn@umich.edu unsigned tid = *threads++; 4293867Sbinkertn@umich.edu 4302292SN/A total += thread[tid].numLoadsReady(); 4312292SN/A } 4322292SN/A 4332292SN/A return total; 4342292SN/A} 4352292SN/A 4362292SN/Atemplate<class Impl> 4372292SN/Aunsigned 4382292SN/ALSQ<Impl>::numFreeEntries() 4392292SN/A{ 4402292SN/A unsigned total = 0; 4412292SN/A 4423867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 4433867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 4442292SN/A 4453867Sbinkertn@umich.edu while (threads != end) { 4463867Sbinkertn@umich.edu unsigned tid = *threads++; 4473867Sbinkertn@umich.edu 4482292SN/A total += thread[tid].numFreeEntries(); 4492292SN/A } 4502292SN/A 4512292SN/A return total; 4522292SN/A} 4532292SN/A 4542292SN/Atemplate<class Impl> 4552292SN/Aunsigned 4562292SN/ALSQ<Impl>::numFreeEntries(unsigned tid) 4572292SN/A{ 4583870Sbinkertn@umich.edu //if (lsqPolicy == Dynamic) 4592292SN/A //return numFreeEntries(); 4602292SN/A //else 4612292SN/A return thread[tid].numFreeEntries(); 4622292SN/A} 4632292SN/A 4642292SN/Atemplate<class Impl> 4652292SN/Abool 4662292SN/ALSQ<Impl>::isFull() 4672292SN/A{ 4683867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 4693867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 4702292SN/A 4713867Sbinkertn@umich.edu while (threads != end) { 4723867Sbinkertn@umich.edu unsigned tid = *threads++; 4733867Sbinkertn@umich.edu 4743867Sbinkertn@umich.edu if (!(thread[tid].lqFull() || thread[tid].sqFull())) 4752292SN/A return false; 4762292SN/A } 4772292SN/A 4782292SN/A return true; 4792292SN/A} 4802292SN/A 4812292SN/Atemplate<class Impl> 4822292SN/Abool 4832292SN/ALSQ<Impl>::isFull(unsigned tid) 4842292SN/A{ 4852292SN/A //@todo: Change to Calculate All Entries for 4862292SN/A //Dynamic Policy 4873867Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 4882292SN/A return isFull(); 4892292SN/A else 4902292SN/A return thread[tid].lqFull() || thread[tid].sqFull(); 4912292SN/A} 4922292SN/A 4932292SN/Atemplate<class Impl> 4942292SN/Abool 4952292SN/ALSQ<Impl>::lqFull() 4962292SN/A{ 4973867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 4983867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 4992292SN/A 5003867Sbinkertn@umich.edu while (threads != end) { 5013867Sbinkertn@umich.edu unsigned tid = *threads++; 5023867Sbinkertn@umich.edu 5032292SN/A if (!thread[tid].lqFull()) 5042292SN/A return false; 5052292SN/A } 5062292SN/A 5072292SN/A return true; 5082292SN/A} 5092292SN/A 5102292SN/Atemplate<class Impl> 5112292SN/Abool 5122292SN/ALSQ<Impl>::lqFull(unsigned tid) 5132292SN/A{ 5142292SN/A //@todo: Change to Calculate All Entries for 5152292SN/A //Dynamic Policy 5163870Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 5172292SN/A return lqFull(); 5182292SN/A else 5192292SN/A return thread[tid].lqFull(); 5202292SN/A} 5212292SN/A 5222292SN/Atemplate<class Impl> 5232292SN/Abool 5242292SN/ALSQ<Impl>::sqFull() 5252292SN/A{ 5263867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 5273867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 5282292SN/A 5293867Sbinkertn@umich.edu while (threads != end) { 5303867Sbinkertn@umich.edu unsigned tid = *threads++; 5313867Sbinkertn@umich.edu 5322292SN/A if (!sqFull(tid)) 5332292SN/A return false; 5342292SN/A } 5352292SN/A 5362292SN/A return true; 5372292SN/A} 5382292SN/A 5392292SN/Atemplate<class Impl> 5402292SN/Abool 5412292SN/ALSQ<Impl>::sqFull(unsigned tid) 5422292SN/A{ 5432292SN/A //@todo: Change to Calculate All Entries for 5442292SN/A //Dynamic Policy 5453870Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 5462292SN/A return sqFull(); 5472292SN/A else 5482292SN/A return thread[tid].sqFull(); 5492292SN/A} 5502292SN/A 5512292SN/Atemplate<class Impl> 5522292SN/Abool 5532292SN/ALSQ<Impl>::isStalled() 5542292SN/A{ 5553867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 5563867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 5572292SN/A 5583867Sbinkertn@umich.edu while (threads != end) { 5593867Sbinkertn@umich.edu unsigned tid = *threads++; 5603867Sbinkertn@umich.edu 5612292SN/A if (!thread[tid].isStalled()) 5622292SN/A return false; 5632292SN/A } 5642292SN/A 5652292SN/A return true; 5662292SN/A} 5672292SN/A 5682292SN/Atemplate<class Impl> 5692292SN/Abool 5702292SN/ALSQ<Impl>::isStalled(unsigned tid) 5712292SN/A{ 5723870Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 5732292SN/A return isStalled(); 5742292SN/A else 5752292SN/A return thread[tid].isStalled(); 5762292SN/A} 5772292SN/A 5782292SN/Atemplate<class Impl> 5792292SN/Abool 5802292SN/ALSQ<Impl>::hasStoresToWB() 5812292SN/A{ 5823867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 5833867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 5842292SN/A 5853867Sbinkertn@umich.edu if (threads == end) 5862864Sktlim@umich.edu return false; 5872864Sktlim@umich.edu 5883867Sbinkertn@umich.edu while (threads != end) { 5893867Sbinkertn@umich.edu unsigned tid = *threads++; 5903867Sbinkertn@umich.edu 5912292SN/A if (!hasStoresToWB(tid)) 5922292SN/A return false; 5932292SN/A } 5942292SN/A 5952292SN/A return true; 5962292SN/A} 5972292SN/A 5982292SN/Atemplate<class Impl> 5992292SN/Abool 6002292SN/ALSQ<Impl>::willWB() 6012292SN/A{ 6023867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 6033867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 6042292SN/A 6053867Sbinkertn@umich.edu while (threads != end) { 6063867Sbinkertn@umich.edu unsigned tid = *threads++; 6073867Sbinkertn@umich.edu 6082292SN/A if (!willWB(tid)) 6092292SN/A return false; 6102292SN/A } 6112292SN/A 6122292SN/A return true; 6132292SN/A} 6142292SN/A 6152292SN/Atemplate<class Impl> 6162292SN/Avoid 6172292SN/ALSQ<Impl>::dumpInsts() 6182292SN/A{ 6193867Sbinkertn@umich.edu std::list<unsigned>::iterator threads = activeThreads->begin(); 6203867Sbinkertn@umich.edu std::list<unsigned>::iterator end = activeThreads->end(); 6212292SN/A 6223867Sbinkertn@umich.edu while (threads != end) { 6233867Sbinkertn@umich.edu unsigned tid = *threads++; 6243867Sbinkertn@umich.edu 6252292SN/A thread[tid].dumpInsts(); 6262292SN/A } 6272292SN/A} 628