lsq_impl.hh revision 3339
12292SN/A/* 22727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan 32292SN/A * All rights reserved. 42292SN/A * 52292SN/A * Redistribution and use in source and binary forms, with or without 62292SN/A * modification, are permitted provided that the following conditions are 72292SN/A * met: redistributions of source code must retain the above copyright 82292SN/A * notice, this list of conditions and the following disclaimer; 92292SN/A * redistributions in binary form must reproduce the above copyright 102292SN/A * notice, this list of conditions and the following disclaimer in the 112292SN/A * documentation and/or other materials provided with the distribution; 122292SN/A * neither the name of the copyright holders nor the names of its 132292SN/A * contributors may be used to endorse or promote products derived from 142292SN/A * this software without specific prior written permission. 152292SN/A * 162292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Korey Sewell 292292SN/A */ 302292SN/A 312329SN/A#include <algorithm> 322980Sgblack@eecs.umich.edu#include <list> 332329SN/A#include <string> 342329SN/A 352292SN/A#include "cpu/o3/lsq.hh" 362292SN/A 372292SN/Atemplate <class Impl> 382907Sktlim@umich.eduTick 392907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvAtomic(PacketPtr pkt) 402907Sktlim@umich.edu{ 412907Sktlim@umich.edu panic("O3CPU model does not work with atomic mode!"); 422907Sktlim@umich.edu return curTick; 432907Sktlim@umich.edu} 442907Sktlim@umich.edu 452907Sktlim@umich.edutemplate <class Impl> 462907Sktlim@umich.eduvoid 472907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt) 482907Sktlim@umich.edu{ 493184Srdreslin@umich.edu warn("O3CPU doesn't update things on a recvFunctional."); 502907Sktlim@umich.edu} 512907Sktlim@umich.edu 522907Sktlim@umich.edutemplate <class Impl> 532907Sktlim@umich.eduvoid 542907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvStatusChange(Status status) 552907Sktlim@umich.edu{ 562907Sktlim@umich.edu if (status == RangeChange) 572907Sktlim@umich.edu return; 582907Sktlim@umich.edu 592907Sktlim@umich.edu panic("O3CPU doesn't expect recvStatusChange callback!"); 602907Sktlim@umich.edu} 612907Sktlim@umich.edu 622907Sktlim@umich.edutemplate <class Impl> 632907Sktlim@umich.edubool 642907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt) 652907Sktlim@umich.edu{ 663310Srdreslin@umich.edu if (pkt->isResponse()) { 673310Srdreslin@umich.edu lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt); 683310Srdreslin@umich.edu } 693310Srdreslin@umich.edu else { 703310Srdreslin@umich.edu //else it is a coherence request, maybe you need to do something 713339Srdreslin@umich.edu warn("Recieved a coherence request (Invalidate?), 03CPU doesn't" 723310Srdreslin@umich.edu "update LSQ for these\n"); 733310Srdreslin@umich.edu } 742907Sktlim@umich.edu return true; 752907Sktlim@umich.edu} 762907Sktlim@umich.edu 772907Sktlim@umich.edutemplate <class Impl> 782907Sktlim@umich.eduvoid 792907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvRetry() 802907Sktlim@umich.edu{ 813014Srdreslin@umich.edu if (lsq->retryTid == -1) 823014Srdreslin@umich.edu { 833014Srdreslin@umich.edu //Squashed, so drop it 843014Srdreslin@umich.edu return; 853014Srdreslin@umich.edu } 862907Sktlim@umich.edu lsq->thread[lsq->retryTid].recvRetry(); 872907Sktlim@umich.edu // Speculatively clear the retry Tid. This will get set again if 882907Sktlim@umich.edu // the LSQUnit was unable to complete its access. 892907Sktlim@umich.edu lsq->retryTid = -1; 902907Sktlim@umich.edu} 912907Sktlim@umich.edu 922907Sktlim@umich.edutemplate <class Impl> 932292SN/ALSQ<Impl>::LSQ(Params *params) 942907Sktlim@umich.edu : dcachePort(this), LQEntries(params->LQEntries), 952907Sktlim@umich.edu SQEntries(params->SQEntries), numThreads(params->numberOfThreads), 962907Sktlim@umich.edu retryTid(-1) 972292SN/A{ 982292SN/A DPRINTF(LSQ, "Creating LSQ object.\n"); 992292SN/A 1002292SN/A //**********************************************/ 1012292SN/A //************ Handle SMT Parameters ***********/ 1022292SN/A //**********************************************/ 1032980Sgblack@eecs.umich.edu std::string policy = params->smtLSQPolicy; 1042292SN/A 1052292SN/A //Convert string to lowercase 1062292SN/A std::transform(policy.begin(), policy.end(), policy.begin(), 1072292SN/A (int(*)(int)) tolower); 1082292SN/A 1092292SN/A //Figure out fetch policy 1102292SN/A if (policy == "dynamic") { 1112292SN/A lsqPolicy = Dynamic; 1122292SN/A 1132292SN/A maxLQEntries = LQEntries; 1142292SN/A maxSQEntries = SQEntries; 1152292SN/A 1162292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n"); 1172292SN/A 1182292SN/A } else if (policy == "partitioned") { 1192292SN/A lsqPolicy = Partitioned; 1202292SN/A 1212292SN/A //@todo:make work if part_amt doesnt divide evenly. 1222292SN/A maxLQEntries = LQEntries / numThreads; 1232292SN/A maxSQEntries = SQEntries / numThreads; 1242292SN/A 1252292SN/A DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: " 1262292SN/A "%i entries per LQ | %i entries per SQ", 1272292SN/A maxLQEntries,maxSQEntries); 1282292SN/A 1292292SN/A } else if (policy == "threshold") { 1302292SN/A lsqPolicy = Threshold; 1312292SN/A 1322292SN/A assert(params->smtLSQThreshold > LQEntries); 1332292SN/A assert(params->smtLSQThreshold > SQEntries); 1342292SN/A 1352292SN/A //Divide up by threshold amount 1362292SN/A //@todo: Should threads check the max and the total 1372292SN/A //amount of the LSQ 1382292SN/A maxLQEntries = params->smtLSQThreshold; 1392292SN/A maxSQEntries = params->smtLSQThreshold; 1402292SN/A 1412292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Threshold: " 1422292SN/A "%i entries per LQ | %i entries per SQ", 1432292SN/A maxLQEntries,maxSQEntries); 1442292SN/A 1452292SN/A } else { 1462292SN/A assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic," 1472292SN/A "Partitioned, Threshold}"); 1482292SN/A } 1492292SN/A 1502292SN/A //Initialize LSQs 1512292SN/A for (int tid=0; tid < numThreads; tid++) { 1522907Sktlim@umich.edu thread[tid].init(params, this, maxLQEntries, maxSQEntries, tid); 1532907Sktlim@umich.edu thread[tid].setDcachePort(&dcachePort); 1542292SN/A } 1552292SN/A} 1562292SN/A 1572292SN/A 1582292SN/Atemplate<class Impl> 1592292SN/Astd::string 1602292SN/ALSQ<Impl>::name() const 1612292SN/A{ 1622292SN/A return iewStage->name() + ".lsq"; 1632292SN/A} 1642292SN/A 1652292SN/Atemplate<class Impl> 1662292SN/Avoid 1672727Sktlim@umich.eduLSQ<Impl>::regStats() 1682727Sktlim@umich.edu{ 1692727Sktlim@umich.edu //Initialize LSQs 1702727Sktlim@umich.edu for (int tid=0; tid < numThreads; tid++) { 1712727Sktlim@umich.edu thread[tid].regStats(); 1722727Sktlim@umich.edu } 1732727Sktlim@umich.edu} 1742727Sktlim@umich.edu 1752727Sktlim@umich.edutemplate<class Impl> 1762727Sktlim@umich.eduvoid 1772980Sgblack@eecs.umich.eduLSQ<Impl>::setActiveThreads(std::list<unsigned> *at_ptr) 1782292SN/A{ 1792292SN/A activeThreads = at_ptr; 1802292SN/A assert(activeThreads != 0); 1812292SN/A} 1822292SN/A 1832292SN/Atemplate<class Impl> 1842292SN/Avoid 1852733Sktlim@umich.eduLSQ<Impl>::setCPU(O3CPU *cpu_ptr) 1862292SN/A{ 1872292SN/A cpu = cpu_ptr; 1882292SN/A 1892907Sktlim@umich.edu dcachePort.setName(name()); 1902907Sktlim@umich.edu 1912292SN/A for (int tid=0; tid < numThreads; tid++) { 1922292SN/A thread[tid].setCPU(cpu_ptr); 1932292SN/A } 1942292SN/A} 1952292SN/A 1962292SN/Atemplate<class Impl> 1972292SN/Avoid 1982292SN/ALSQ<Impl>::setIEW(IEW *iew_ptr) 1992292SN/A{ 2002292SN/A iewStage = iew_ptr; 2012292SN/A 2022292SN/A for (int tid=0; tid < numThreads; tid++) { 2032292SN/A thread[tid].setIEW(iew_ptr); 2042292SN/A } 2052292SN/A} 2062292SN/A 2072292SN/Atemplate <class Impl> 2082307SN/Avoid 2092307SN/ALSQ<Impl>::switchOut() 2102307SN/A{ 2112307SN/A for (int tid = 0; tid < numThreads; tid++) { 2122307SN/A thread[tid].switchOut(); 2132307SN/A } 2142307SN/A} 2152307SN/A 2162307SN/Atemplate <class Impl> 2172307SN/Avoid 2182307SN/ALSQ<Impl>::takeOverFrom() 2192307SN/A{ 2202307SN/A for (int tid = 0; tid < numThreads; tid++) { 2212307SN/A thread[tid].takeOverFrom(); 2222307SN/A } 2232307SN/A} 2242307SN/A 2252307SN/Atemplate <class Impl> 2262292SN/Aint 2272292SN/ALSQ<Impl>::entryAmount(int num_threads) 2282292SN/A{ 2292292SN/A if (lsqPolicy == Partitioned) { 2302292SN/A return LQEntries / num_threads; 2312292SN/A } else { 2322292SN/A return 0; 2332292SN/A } 2342292SN/A} 2352292SN/A 2362292SN/Atemplate <class Impl> 2372292SN/Avoid 2382292SN/ALSQ<Impl>::resetEntries() 2392292SN/A{ 2402292SN/A if (lsqPolicy != Dynamic || numThreads > 1) { 2412292SN/A int active_threads = (*activeThreads).size(); 2422292SN/A 2432980Sgblack@eecs.umich.edu std::list<unsigned>::iterator threads = (*activeThreads).begin(); 2442980Sgblack@eecs.umich.edu std::list<unsigned>::iterator list_end = (*activeThreads).end(); 2452292SN/A 2462292SN/A int maxEntries; 2472292SN/A 2482292SN/A if (lsqPolicy == Partitioned) { 2492292SN/A maxEntries = LQEntries / active_threads; 2502292SN/A } else if (lsqPolicy == Threshold && active_threads == 1) { 2512292SN/A maxEntries = LQEntries; 2522292SN/A } else { 2532292SN/A maxEntries = LQEntries; 2542292SN/A } 2552292SN/A 2562292SN/A while (threads != list_end) { 2572292SN/A resizeEntries(maxEntries,*threads++); 2582292SN/A } 2592292SN/A } 2602292SN/A} 2612292SN/A 2622292SN/Atemplate<class Impl> 2632292SN/Avoid 2642292SN/ALSQ<Impl>::removeEntries(unsigned tid) 2652292SN/A{ 2662292SN/A thread[tid].clearLQ(); 2672292SN/A thread[tid].clearSQ(); 2682292SN/A} 2692292SN/A 2702292SN/Atemplate<class Impl> 2712292SN/Avoid 2722292SN/ALSQ<Impl>::resizeEntries(unsigned size,unsigned tid) 2732292SN/A{ 2742292SN/A thread[tid].resizeLQ(size); 2752292SN/A thread[tid].resizeSQ(size); 2762292SN/A} 2772292SN/A 2782292SN/Atemplate<class Impl> 2792292SN/Avoid 2802292SN/ALSQ<Impl>::tick() 2812292SN/A{ 2822980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 2832292SN/A 2842292SN/A while (active_threads != (*activeThreads).end()) { 2852292SN/A unsigned tid = *active_threads++; 2862292SN/A 2872292SN/A thread[tid].tick(); 2882292SN/A } 2892292SN/A} 2902292SN/A 2912292SN/Atemplate<class Impl> 2922292SN/Avoid 2932292SN/ALSQ<Impl>::insertLoad(DynInstPtr &load_inst) 2942292SN/A{ 2952292SN/A unsigned tid = load_inst->threadNumber; 2962292SN/A 2972292SN/A thread[tid].insertLoad(load_inst); 2982292SN/A} 2992292SN/A 3002292SN/Atemplate<class Impl> 3012292SN/Avoid 3022292SN/ALSQ<Impl>::insertStore(DynInstPtr &store_inst) 3032292SN/A{ 3042292SN/A unsigned tid = store_inst->threadNumber; 3052292SN/A 3062292SN/A thread[tid].insertStore(store_inst); 3072292SN/A} 3082292SN/A 3092292SN/Atemplate<class Impl> 3102292SN/AFault 3112292SN/ALSQ<Impl>::executeLoad(DynInstPtr &inst) 3122292SN/A{ 3132292SN/A unsigned tid = inst->threadNumber; 3142292SN/A 3152292SN/A return thread[tid].executeLoad(inst); 3162292SN/A} 3172292SN/A 3182292SN/Atemplate<class Impl> 3192292SN/AFault 3202292SN/ALSQ<Impl>::executeStore(DynInstPtr &inst) 3212292SN/A{ 3222292SN/A unsigned tid = inst->threadNumber; 3232292SN/A 3242292SN/A return thread[tid].executeStore(inst); 3252292SN/A} 3262292SN/A 3272292SN/Atemplate<class Impl> 3282292SN/Avoid 3292292SN/ALSQ<Impl>::writebackStores() 3302292SN/A{ 3312980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3322292SN/A 3332292SN/A while (active_threads != (*activeThreads).end()) { 3342292SN/A unsigned tid = *active_threads++; 3352292SN/A 3362292SN/A if (numStoresToWB(tid) > 0) { 3372329SN/A DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores " 3382329SN/A "available for Writeback.\n", tid, numStoresToWB(tid)); 3392292SN/A } 3402292SN/A 3412292SN/A thread[tid].writebackStores(); 3422292SN/A } 3432292SN/A} 3442292SN/A 3452292SN/Atemplate<class Impl> 3462292SN/Abool 3472292SN/ALSQ<Impl>::violation() 3482292SN/A{ 3492292SN/A /* Answers: Does Anybody Have a Violation?*/ 3502980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3512292SN/A 3522292SN/A while (active_threads != (*activeThreads).end()) { 3532292SN/A unsigned tid = *active_threads++; 3542292SN/A if (thread[tid].violation()) 3552292SN/A return true; 3562292SN/A } 3572292SN/A 3582292SN/A return false; 3592292SN/A} 3602292SN/A 3612292SN/Atemplate<class Impl> 3622292SN/Aint 3632292SN/ALSQ<Impl>::getCount() 3642292SN/A{ 3652292SN/A unsigned total = 0; 3662292SN/A 3672980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3682292SN/A 3692292SN/A while (active_threads != (*activeThreads).end()) { 3702292SN/A unsigned tid = *active_threads++; 3712292SN/A total += getCount(tid); 3722292SN/A } 3732292SN/A 3742292SN/A return total; 3752292SN/A} 3762292SN/A 3772292SN/Atemplate<class Impl> 3782292SN/Aint 3792292SN/ALSQ<Impl>::numLoads() 3802292SN/A{ 3812292SN/A unsigned total = 0; 3822292SN/A 3832980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3842292SN/A 3852292SN/A while (active_threads != (*activeThreads).end()) { 3862292SN/A unsigned tid = *active_threads++; 3872292SN/A total += numLoads(tid); 3882292SN/A } 3892292SN/A 3902292SN/A return total; 3912292SN/A} 3922292SN/A 3932292SN/Atemplate<class Impl> 3942292SN/Aint 3952292SN/ALSQ<Impl>::numStores() 3962292SN/A{ 3972292SN/A unsigned total = 0; 3982292SN/A 3992980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4002292SN/A 4012292SN/A while (active_threads != (*activeThreads).end()) { 4022292SN/A unsigned tid = *active_threads++; 4032292SN/A total += thread[tid].numStores(); 4042292SN/A } 4052292SN/A 4062292SN/A return total; 4072292SN/A} 4082292SN/A 4092292SN/Atemplate<class Impl> 4102292SN/Aint 4112292SN/ALSQ<Impl>::numLoadsReady() 4122292SN/A{ 4132292SN/A unsigned total = 0; 4142292SN/A 4152980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4162292SN/A 4172292SN/A while (active_threads != (*activeThreads).end()) { 4182292SN/A unsigned tid = *active_threads++; 4192292SN/A total += thread[tid].numLoadsReady(); 4202292SN/A } 4212292SN/A 4222292SN/A return total; 4232292SN/A} 4242292SN/A 4252292SN/Atemplate<class Impl> 4262292SN/Aunsigned 4272292SN/ALSQ<Impl>::numFreeEntries() 4282292SN/A{ 4292292SN/A unsigned total = 0; 4302292SN/A 4312980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4322292SN/A 4332292SN/A while (active_threads != (*activeThreads).end()) { 4342292SN/A unsigned tid = *active_threads++; 4352292SN/A total += thread[tid].numFreeEntries(); 4362292SN/A } 4372292SN/A 4382292SN/A return total; 4392292SN/A} 4402292SN/A 4412292SN/Atemplate<class Impl> 4422292SN/Aunsigned 4432292SN/ALSQ<Impl>::numFreeEntries(unsigned tid) 4442292SN/A{ 4452292SN/A //if( lsqPolicy == Dynamic ) 4462292SN/A //return numFreeEntries(); 4472292SN/A //else 4482292SN/A return thread[tid].numFreeEntries(); 4492292SN/A} 4502292SN/A 4512292SN/Atemplate<class Impl> 4522292SN/Abool 4532292SN/ALSQ<Impl>::isFull() 4542292SN/A{ 4552980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4562292SN/A 4572292SN/A while (active_threads != (*activeThreads).end()) { 4582292SN/A unsigned tid = *active_threads++; 4592292SN/A if (! (thread[tid].lqFull() || thread[tid].sqFull()) ) 4602292SN/A return false; 4612292SN/A } 4622292SN/A 4632292SN/A return true; 4642292SN/A} 4652292SN/A 4662292SN/Atemplate<class Impl> 4672292SN/Abool 4682292SN/ALSQ<Impl>::isFull(unsigned tid) 4692292SN/A{ 4702292SN/A //@todo: Change to Calculate All Entries for 4712292SN/A //Dynamic Policy 4722292SN/A if( lsqPolicy == Dynamic ) 4732292SN/A return isFull(); 4742292SN/A else 4752292SN/A return thread[tid].lqFull() || thread[tid].sqFull(); 4762292SN/A} 4772292SN/A 4782292SN/Atemplate<class Impl> 4792292SN/Abool 4802292SN/ALSQ<Impl>::lqFull() 4812292SN/A{ 4822980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4832292SN/A 4842292SN/A while (active_threads != (*activeThreads).end()) { 4852292SN/A unsigned tid = *active_threads++; 4862292SN/A if (!thread[tid].lqFull()) 4872292SN/A return false; 4882292SN/A } 4892292SN/A 4902292SN/A return true; 4912292SN/A} 4922292SN/A 4932292SN/Atemplate<class Impl> 4942292SN/Abool 4952292SN/ALSQ<Impl>::lqFull(unsigned tid) 4962292SN/A{ 4972292SN/A //@todo: Change to Calculate All Entries for 4982292SN/A //Dynamic Policy 4992292SN/A if( lsqPolicy == Dynamic ) 5002292SN/A return lqFull(); 5012292SN/A else 5022292SN/A return thread[tid].lqFull(); 5032292SN/A} 5042292SN/A 5052292SN/Atemplate<class Impl> 5062292SN/Abool 5072292SN/ALSQ<Impl>::sqFull() 5082292SN/A{ 5092980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5102292SN/A 5112292SN/A while (active_threads != (*activeThreads).end()) { 5122292SN/A unsigned tid = *active_threads++; 5132292SN/A if (!sqFull(tid)) 5142292SN/A return false; 5152292SN/A } 5162292SN/A 5172292SN/A return true; 5182292SN/A} 5192292SN/A 5202292SN/Atemplate<class Impl> 5212292SN/Abool 5222292SN/ALSQ<Impl>::sqFull(unsigned tid) 5232292SN/A{ 5242292SN/A //@todo: Change to Calculate All Entries for 5252292SN/A //Dynamic Policy 5262292SN/A if( lsqPolicy == Dynamic ) 5272292SN/A return sqFull(); 5282292SN/A else 5292292SN/A return thread[tid].sqFull(); 5302292SN/A} 5312292SN/A 5322292SN/Atemplate<class Impl> 5332292SN/Abool 5342292SN/ALSQ<Impl>::isStalled() 5352292SN/A{ 5362980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5372292SN/A 5382292SN/A while (active_threads != (*activeThreads).end()) { 5392292SN/A unsigned tid = *active_threads++; 5402292SN/A if (!thread[tid].isStalled()) 5412292SN/A return false; 5422292SN/A } 5432292SN/A 5442292SN/A return true; 5452292SN/A} 5462292SN/A 5472292SN/Atemplate<class Impl> 5482292SN/Abool 5492292SN/ALSQ<Impl>::isStalled(unsigned tid) 5502292SN/A{ 5512292SN/A if( lsqPolicy == Dynamic ) 5522292SN/A return isStalled(); 5532292SN/A else 5542292SN/A return thread[tid].isStalled(); 5552292SN/A} 5562292SN/A 5572292SN/Atemplate<class Impl> 5582292SN/Abool 5592292SN/ALSQ<Impl>::hasStoresToWB() 5602292SN/A{ 5612980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5622292SN/A 5632864Sktlim@umich.edu if ((*activeThreads).empty()) 5642864Sktlim@umich.edu return false; 5652864Sktlim@umich.edu 5662292SN/A while (active_threads != (*activeThreads).end()) { 5672292SN/A unsigned tid = *active_threads++; 5682292SN/A if (!hasStoresToWB(tid)) 5692292SN/A return false; 5702292SN/A } 5712292SN/A 5722292SN/A return true; 5732292SN/A} 5742292SN/A 5752292SN/Atemplate<class Impl> 5762292SN/Abool 5772292SN/ALSQ<Impl>::willWB() 5782292SN/A{ 5792980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5802292SN/A 5812292SN/A while (active_threads != (*activeThreads).end()) { 5822292SN/A unsigned tid = *active_threads++; 5832292SN/A if (!willWB(tid)) 5842292SN/A return false; 5852292SN/A } 5862292SN/A 5872292SN/A return true; 5882292SN/A} 5892292SN/A 5902292SN/Atemplate<class Impl> 5912292SN/Avoid 5922292SN/ALSQ<Impl>::dumpInsts() 5932292SN/A{ 5942980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5952292SN/A 5962292SN/A while (active_threads != (*activeThreads).end()) { 5972292SN/A unsigned tid = *active_threads++; 5982292SN/A thread[tid].dumpInsts(); 5992292SN/A } 6002292SN/A} 601