lsq_impl.hh revision 3184
12292SN/A/* 22727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan 32292SN/A * All rights reserved. 42292SN/A * 52292SN/A * Redistribution and use in source and binary forms, with or without 62292SN/A * modification, are permitted provided that the following conditions are 72292SN/A * met: redistributions of source code must retain the above copyright 82292SN/A * notice, this list of conditions and the following disclaimer; 92292SN/A * redistributions in binary form must reproduce the above copyright 102292SN/A * notice, this list of conditions and the following disclaimer in the 112292SN/A * documentation and/or other materials provided with the distribution; 122292SN/A * neither the name of the copyright holders nor the names of its 132292SN/A * contributors may be used to endorse or promote products derived from 142292SN/A * this software without specific prior written permission. 152292SN/A * 162292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272689Sktlim@umich.edu * 282689Sktlim@umich.edu * Authors: Korey Sewell 292292SN/A */ 302292SN/A 312329SN/A#include <algorithm> 322980Sgblack@eecs.umich.edu#include <list> 332329SN/A#include <string> 342329SN/A 352292SN/A#include "cpu/o3/lsq.hh" 362292SN/A 372292SN/Atemplate <class Impl> 382907Sktlim@umich.eduTick 392907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvAtomic(PacketPtr pkt) 402907Sktlim@umich.edu{ 412907Sktlim@umich.edu panic("O3CPU model does not work with atomic mode!"); 422907Sktlim@umich.edu return curTick; 432907Sktlim@umich.edu} 442907Sktlim@umich.edu 452907Sktlim@umich.edutemplate <class Impl> 462907Sktlim@umich.eduvoid 472907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt) 482907Sktlim@umich.edu{ 493184Srdreslin@umich.edu warn("O3CPU doesn't update things on a recvFunctional."); 502907Sktlim@umich.edu} 512907Sktlim@umich.edu 522907Sktlim@umich.edutemplate <class Impl> 532907Sktlim@umich.eduvoid 542907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvStatusChange(Status status) 552907Sktlim@umich.edu{ 562907Sktlim@umich.edu if (status == RangeChange) 572907Sktlim@umich.edu return; 582907Sktlim@umich.edu 592907Sktlim@umich.edu panic("O3CPU doesn't expect recvStatusChange callback!"); 602907Sktlim@umich.edu} 612907Sktlim@umich.edu 622907Sktlim@umich.edutemplate <class Impl> 632907Sktlim@umich.edubool 642907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt) 652907Sktlim@umich.edu{ 662907Sktlim@umich.edu lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt); 672907Sktlim@umich.edu return true; 682907Sktlim@umich.edu} 692907Sktlim@umich.edu 702907Sktlim@umich.edutemplate <class Impl> 712907Sktlim@umich.eduvoid 722907Sktlim@umich.eduLSQ<Impl>::DcachePort::recvRetry() 732907Sktlim@umich.edu{ 743014Srdreslin@umich.edu if (lsq->retryTid == -1) 753014Srdreslin@umich.edu { 763014Srdreslin@umich.edu //Squashed, so drop it 773014Srdreslin@umich.edu return; 783014Srdreslin@umich.edu } 792907Sktlim@umich.edu lsq->thread[lsq->retryTid].recvRetry(); 802907Sktlim@umich.edu // Speculatively clear the retry Tid. This will get set again if 812907Sktlim@umich.edu // the LSQUnit was unable to complete its access. 822907Sktlim@umich.edu lsq->retryTid = -1; 832907Sktlim@umich.edu} 842907Sktlim@umich.edu 852907Sktlim@umich.edutemplate <class Impl> 862292SN/ALSQ<Impl>::LSQ(Params *params) 872907Sktlim@umich.edu : dcachePort(this), LQEntries(params->LQEntries), 882907Sktlim@umich.edu SQEntries(params->SQEntries), numThreads(params->numberOfThreads), 892907Sktlim@umich.edu retryTid(-1) 902292SN/A{ 912292SN/A DPRINTF(LSQ, "Creating LSQ object.\n"); 922292SN/A 932292SN/A //**********************************************/ 942292SN/A //************ Handle SMT Parameters ***********/ 952292SN/A //**********************************************/ 962980Sgblack@eecs.umich.edu std::string policy = params->smtLSQPolicy; 972292SN/A 982292SN/A //Convert string to lowercase 992292SN/A std::transform(policy.begin(), policy.end(), policy.begin(), 1002292SN/A (int(*)(int)) tolower); 1012292SN/A 1022292SN/A //Figure out fetch policy 1032292SN/A if (policy == "dynamic") { 1042292SN/A lsqPolicy = Dynamic; 1052292SN/A 1062292SN/A maxLQEntries = LQEntries; 1072292SN/A maxSQEntries = SQEntries; 1082292SN/A 1092292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n"); 1102292SN/A 1112292SN/A } else if (policy == "partitioned") { 1122292SN/A lsqPolicy = Partitioned; 1132292SN/A 1142292SN/A //@todo:make work if part_amt doesnt divide evenly. 1152292SN/A maxLQEntries = LQEntries / numThreads; 1162292SN/A maxSQEntries = SQEntries / numThreads; 1172292SN/A 1182292SN/A DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: " 1192292SN/A "%i entries per LQ | %i entries per SQ", 1202292SN/A maxLQEntries,maxSQEntries); 1212292SN/A 1222292SN/A } else if (policy == "threshold") { 1232292SN/A lsqPolicy = Threshold; 1242292SN/A 1252292SN/A assert(params->smtLSQThreshold > LQEntries); 1262292SN/A assert(params->smtLSQThreshold > SQEntries); 1272292SN/A 1282292SN/A //Divide up by threshold amount 1292292SN/A //@todo: Should threads check the max and the total 1302292SN/A //amount of the LSQ 1312292SN/A maxLQEntries = params->smtLSQThreshold; 1322292SN/A maxSQEntries = params->smtLSQThreshold; 1332292SN/A 1342292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Threshold: " 1352292SN/A "%i entries per LQ | %i entries per SQ", 1362292SN/A maxLQEntries,maxSQEntries); 1372292SN/A 1382292SN/A } else { 1392292SN/A assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic," 1402292SN/A "Partitioned, Threshold}"); 1412292SN/A } 1422292SN/A 1432292SN/A //Initialize LSQs 1442292SN/A for (int tid=0; tid < numThreads; tid++) { 1452907Sktlim@umich.edu thread[tid].init(params, this, maxLQEntries, maxSQEntries, tid); 1462907Sktlim@umich.edu thread[tid].setDcachePort(&dcachePort); 1472292SN/A } 1482292SN/A} 1492292SN/A 1502292SN/A 1512292SN/Atemplate<class Impl> 1522292SN/Astd::string 1532292SN/ALSQ<Impl>::name() const 1542292SN/A{ 1552292SN/A return iewStage->name() + ".lsq"; 1562292SN/A} 1572292SN/A 1582292SN/Atemplate<class Impl> 1592292SN/Avoid 1602727Sktlim@umich.eduLSQ<Impl>::regStats() 1612727Sktlim@umich.edu{ 1622727Sktlim@umich.edu //Initialize LSQs 1632727Sktlim@umich.edu for (int tid=0; tid < numThreads; tid++) { 1642727Sktlim@umich.edu thread[tid].regStats(); 1652727Sktlim@umich.edu } 1662727Sktlim@umich.edu} 1672727Sktlim@umich.edu 1682727Sktlim@umich.edutemplate<class Impl> 1692727Sktlim@umich.eduvoid 1702980Sgblack@eecs.umich.eduLSQ<Impl>::setActiveThreads(std::list<unsigned> *at_ptr) 1712292SN/A{ 1722292SN/A activeThreads = at_ptr; 1732292SN/A assert(activeThreads != 0); 1742292SN/A} 1752292SN/A 1762292SN/Atemplate<class Impl> 1772292SN/Avoid 1782733Sktlim@umich.eduLSQ<Impl>::setCPU(O3CPU *cpu_ptr) 1792292SN/A{ 1802292SN/A cpu = cpu_ptr; 1812292SN/A 1822907Sktlim@umich.edu dcachePort.setName(name()); 1832907Sktlim@umich.edu 1842292SN/A for (int tid=0; tid < numThreads; tid++) { 1852292SN/A thread[tid].setCPU(cpu_ptr); 1862292SN/A } 1872292SN/A} 1882292SN/A 1892292SN/Atemplate<class Impl> 1902292SN/Avoid 1912292SN/ALSQ<Impl>::setIEW(IEW *iew_ptr) 1922292SN/A{ 1932292SN/A iewStage = iew_ptr; 1942292SN/A 1952292SN/A for (int tid=0; tid < numThreads; tid++) { 1962292SN/A thread[tid].setIEW(iew_ptr); 1972292SN/A } 1982292SN/A} 1992292SN/A 2002292SN/Atemplate <class Impl> 2012307SN/Avoid 2022307SN/ALSQ<Impl>::switchOut() 2032307SN/A{ 2042307SN/A for (int tid = 0; tid < numThreads; tid++) { 2052307SN/A thread[tid].switchOut(); 2062307SN/A } 2072307SN/A} 2082307SN/A 2092307SN/Atemplate <class Impl> 2102307SN/Avoid 2112307SN/ALSQ<Impl>::takeOverFrom() 2122307SN/A{ 2132307SN/A for (int tid = 0; tid < numThreads; tid++) { 2142307SN/A thread[tid].takeOverFrom(); 2152307SN/A } 2162307SN/A} 2172307SN/A 2182307SN/Atemplate <class Impl> 2192292SN/Aint 2202292SN/ALSQ<Impl>::entryAmount(int num_threads) 2212292SN/A{ 2222292SN/A if (lsqPolicy == Partitioned) { 2232292SN/A return LQEntries / num_threads; 2242292SN/A } else { 2252292SN/A return 0; 2262292SN/A } 2272292SN/A} 2282292SN/A 2292292SN/Atemplate <class Impl> 2302292SN/Avoid 2312292SN/ALSQ<Impl>::resetEntries() 2322292SN/A{ 2332292SN/A if (lsqPolicy != Dynamic || numThreads > 1) { 2342292SN/A int active_threads = (*activeThreads).size(); 2352292SN/A 2362980Sgblack@eecs.umich.edu std::list<unsigned>::iterator threads = (*activeThreads).begin(); 2372980Sgblack@eecs.umich.edu std::list<unsigned>::iterator list_end = (*activeThreads).end(); 2382292SN/A 2392292SN/A int maxEntries; 2402292SN/A 2412292SN/A if (lsqPolicy == Partitioned) { 2422292SN/A maxEntries = LQEntries / active_threads; 2432292SN/A } else if (lsqPolicy == Threshold && active_threads == 1) { 2442292SN/A maxEntries = LQEntries; 2452292SN/A } else { 2462292SN/A maxEntries = LQEntries; 2472292SN/A } 2482292SN/A 2492292SN/A while (threads != list_end) { 2502292SN/A resizeEntries(maxEntries,*threads++); 2512292SN/A } 2522292SN/A } 2532292SN/A} 2542292SN/A 2552292SN/Atemplate<class Impl> 2562292SN/Avoid 2572292SN/ALSQ<Impl>::removeEntries(unsigned tid) 2582292SN/A{ 2592292SN/A thread[tid].clearLQ(); 2602292SN/A thread[tid].clearSQ(); 2612292SN/A} 2622292SN/A 2632292SN/Atemplate<class Impl> 2642292SN/Avoid 2652292SN/ALSQ<Impl>::resizeEntries(unsigned size,unsigned tid) 2662292SN/A{ 2672292SN/A thread[tid].resizeLQ(size); 2682292SN/A thread[tid].resizeSQ(size); 2692292SN/A} 2702292SN/A 2712292SN/Atemplate<class Impl> 2722292SN/Avoid 2732292SN/ALSQ<Impl>::tick() 2742292SN/A{ 2752980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 2762292SN/A 2772292SN/A while (active_threads != (*activeThreads).end()) { 2782292SN/A unsigned tid = *active_threads++; 2792292SN/A 2802292SN/A thread[tid].tick(); 2812292SN/A } 2822292SN/A} 2832292SN/A 2842292SN/Atemplate<class Impl> 2852292SN/Avoid 2862292SN/ALSQ<Impl>::insertLoad(DynInstPtr &load_inst) 2872292SN/A{ 2882292SN/A unsigned tid = load_inst->threadNumber; 2892292SN/A 2902292SN/A thread[tid].insertLoad(load_inst); 2912292SN/A} 2922292SN/A 2932292SN/Atemplate<class Impl> 2942292SN/Avoid 2952292SN/ALSQ<Impl>::insertStore(DynInstPtr &store_inst) 2962292SN/A{ 2972292SN/A unsigned tid = store_inst->threadNumber; 2982292SN/A 2992292SN/A thread[tid].insertStore(store_inst); 3002292SN/A} 3012292SN/A 3022292SN/Atemplate<class Impl> 3032292SN/AFault 3042292SN/ALSQ<Impl>::executeLoad(DynInstPtr &inst) 3052292SN/A{ 3062292SN/A unsigned tid = inst->threadNumber; 3072292SN/A 3082292SN/A return thread[tid].executeLoad(inst); 3092292SN/A} 3102292SN/A 3112292SN/Atemplate<class Impl> 3122292SN/AFault 3132292SN/ALSQ<Impl>::executeStore(DynInstPtr &inst) 3142292SN/A{ 3152292SN/A unsigned tid = inst->threadNumber; 3162292SN/A 3172292SN/A return thread[tid].executeStore(inst); 3182292SN/A} 3192292SN/A 3202292SN/Atemplate<class Impl> 3212292SN/Avoid 3222292SN/ALSQ<Impl>::writebackStores() 3232292SN/A{ 3242980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3252292SN/A 3262292SN/A while (active_threads != (*activeThreads).end()) { 3272292SN/A unsigned tid = *active_threads++; 3282292SN/A 3292292SN/A if (numStoresToWB(tid) > 0) { 3302329SN/A DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores " 3312329SN/A "available for Writeback.\n", tid, numStoresToWB(tid)); 3322292SN/A } 3332292SN/A 3342292SN/A thread[tid].writebackStores(); 3352292SN/A } 3362292SN/A} 3372292SN/A 3382292SN/Atemplate<class Impl> 3392292SN/Abool 3402292SN/ALSQ<Impl>::violation() 3412292SN/A{ 3422292SN/A /* Answers: Does Anybody Have a Violation?*/ 3432980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3442292SN/A 3452292SN/A while (active_threads != (*activeThreads).end()) { 3462292SN/A unsigned tid = *active_threads++; 3472292SN/A if (thread[tid].violation()) 3482292SN/A return true; 3492292SN/A } 3502292SN/A 3512292SN/A return false; 3522292SN/A} 3532292SN/A 3542292SN/Atemplate<class Impl> 3552292SN/Aint 3562292SN/ALSQ<Impl>::getCount() 3572292SN/A{ 3582292SN/A unsigned total = 0; 3592292SN/A 3602980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3612292SN/A 3622292SN/A while (active_threads != (*activeThreads).end()) { 3632292SN/A unsigned tid = *active_threads++; 3642292SN/A total += getCount(tid); 3652292SN/A } 3662292SN/A 3672292SN/A return total; 3682292SN/A} 3692292SN/A 3702292SN/Atemplate<class Impl> 3712292SN/Aint 3722292SN/ALSQ<Impl>::numLoads() 3732292SN/A{ 3742292SN/A unsigned total = 0; 3752292SN/A 3762980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3772292SN/A 3782292SN/A while (active_threads != (*activeThreads).end()) { 3792292SN/A unsigned tid = *active_threads++; 3802292SN/A total += numLoads(tid); 3812292SN/A } 3822292SN/A 3832292SN/A return total; 3842292SN/A} 3852292SN/A 3862292SN/Atemplate<class Impl> 3872292SN/Aint 3882292SN/ALSQ<Impl>::numStores() 3892292SN/A{ 3902292SN/A unsigned total = 0; 3912292SN/A 3922980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 3932292SN/A 3942292SN/A while (active_threads != (*activeThreads).end()) { 3952292SN/A unsigned tid = *active_threads++; 3962292SN/A total += thread[tid].numStores(); 3972292SN/A } 3982292SN/A 3992292SN/A return total; 4002292SN/A} 4012292SN/A 4022292SN/Atemplate<class Impl> 4032292SN/Aint 4042292SN/ALSQ<Impl>::numLoadsReady() 4052292SN/A{ 4062292SN/A unsigned total = 0; 4072292SN/A 4082980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4092292SN/A 4102292SN/A while (active_threads != (*activeThreads).end()) { 4112292SN/A unsigned tid = *active_threads++; 4122292SN/A total += thread[tid].numLoadsReady(); 4132292SN/A } 4142292SN/A 4152292SN/A return total; 4162292SN/A} 4172292SN/A 4182292SN/Atemplate<class Impl> 4192292SN/Aunsigned 4202292SN/ALSQ<Impl>::numFreeEntries() 4212292SN/A{ 4222292SN/A unsigned total = 0; 4232292SN/A 4242980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4252292SN/A 4262292SN/A while (active_threads != (*activeThreads).end()) { 4272292SN/A unsigned tid = *active_threads++; 4282292SN/A total += thread[tid].numFreeEntries(); 4292292SN/A } 4302292SN/A 4312292SN/A return total; 4322292SN/A} 4332292SN/A 4342292SN/Atemplate<class Impl> 4352292SN/Aunsigned 4362292SN/ALSQ<Impl>::numFreeEntries(unsigned tid) 4372292SN/A{ 4382292SN/A //if( lsqPolicy == Dynamic ) 4392292SN/A //return numFreeEntries(); 4402292SN/A //else 4412292SN/A return thread[tid].numFreeEntries(); 4422292SN/A} 4432292SN/A 4442292SN/Atemplate<class Impl> 4452292SN/Abool 4462292SN/ALSQ<Impl>::isFull() 4472292SN/A{ 4482980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4492292SN/A 4502292SN/A while (active_threads != (*activeThreads).end()) { 4512292SN/A unsigned tid = *active_threads++; 4522292SN/A if (! (thread[tid].lqFull() || thread[tid].sqFull()) ) 4532292SN/A return false; 4542292SN/A } 4552292SN/A 4562292SN/A return true; 4572292SN/A} 4582292SN/A 4592292SN/Atemplate<class Impl> 4602292SN/Abool 4612292SN/ALSQ<Impl>::isFull(unsigned tid) 4622292SN/A{ 4632292SN/A //@todo: Change to Calculate All Entries for 4642292SN/A //Dynamic Policy 4652292SN/A if( lsqPolicy == Dynamic ) 4662292SN/A return isFull(); 4672292SN/A else 4682292SN/A return thread[tid].lqFull() || thread[tid].sqFull(); 4692292SN/A} 4702292SN/A 4712292SN/Atemplate<class Impl> 4722292SN/Abool 4732292SN/ALSQ<Impl>::lqFull() 4742292SN/A{ 4752980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 4762292SN/A 4772292SN/A while (active_threads != (*activeThreads).end()) { 4782292SN/A unsigned tid = *active_threads++; 4792292SN/A if (!thread[tid].lqFull()) 4802292SN/A return false; 4812292SN/A } 4822292SN/A 4832292SN/A return true; 4842292SN/A} 4852292SN/A 4862292SN/Atemplate<class Impl> 4872292SN/Abool 4882292SN/ALSQ<Impl>::lqFull(unsigned tid) 4892292SN/A{ 4902292SN/A //@todo: Change to Calculate All Entries for 4912292SN/A //Dynamic Policy 4922292SN/A if( lsqPolicy == Dynamic ) 4932292SN/A return lqFull(); 4942292SN/A else 4952292SN/A return thread[tid].lqFull(); 4962292SN/A} 4972292SN/A 4982292SN/Atemplate<class Impl> 4992292SN/Abool 5002292SN/ALSQ<Impl>::sqFull() 5012292SN/A{ 5022980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5032292SN/A 5042292SN/A while (active_threads != (*activeThreads).end()) { 5052292SN/A unsigned tid = *active_threads++; 5062292SN/A if (!sqFull(tid)) 5072292SN/A return false; 5082292SN/A } 5092292SN/A 5102292SN/A return true; 5112292SN/A} 5122292SN/A 5132292SN/Atemplate<class Impl> 5142292SN/Abool 5152292SN/ALSQ<Impl>::sqFull(unsigned tid) 5162292SN/A{ 5172292SN/A //@todo: Change to Calculate All Entries for 5182292SN/A //Dynamic Policy 5192292SN/A if( lsqPolicy == Dynamic ) 5202292SN/A return sqFull(); 5212292SN/A else 5222292SN/A return thread[tid].sqFull(); 5232292SN/A} 5242292SN/A 5252292SN/Atemplate<class Impl> 5262292SN/Abool 5272292SN/ALSQ<Impl>::isStalled() 5282292SN/A{ 5292980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5302292SN/A 5312292SN/A while (active_threads != (*activeThreads).end()) { 5322292SN/A unsigned tid = *active_threads++; 5332292SN/A if (!thread[tid].isStalled()) 5342292SN/A return false; 5352292SN/A } 5362292SN/A 5372292SN/A return true; 5382292SN/A} 5392292SN/A 5402292SN/Atemplate<class Impl> 5412292SN/Abool 5422292SN/ALSQ<Impl>::isStalled(unsigned tid) 5432292SN/A{ 5442292SN/A if( lsqPolicy == Dynamic ) 5452292SN/A return isStalled(); 5462292SN/A else 5472292SN/A return thread[tid].isStalled(); 5482292SN/A} 5492292SN/A 5502292SN/Atemplate<class Impl> 5512292SN/Abool 5522292SN/ALSQ<Impl>::hasStoresToWB() 5532292SN/A{ 5542980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5552292SN/A 5562864Sktlim@umich.edu if ((*activeThreads).empty()) 5572864Sktlim@umich.edu return false; 5582864Sktlim@umich.edu 5592292SN/A while (active_threads != (*activeThreads).end()) { 5602292SN/A unsigned tid = *active_threads++; 5612292SN/A if (!hasStoresToWB(tid)) 5622292SN/A return false; 5632292SN/A } 5642292SN/A 5652292SN/A return true; 5662292SN/A} 5672292SN/A 5682292SN/Atemplate<class Impl> 5692292SN/Abool 5702292SN/ALSQ<Impl>::willWB() 5712292SN/A{ 5722980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5732292SN/A 5742292SN/A while (active_threads != (*activeThreads).end()) { 5752292SN/A unsigned tid = *active_threads++; 5762292SN/A if (!willWB(tid)) 5772292SN/A return false; 5782292SN/A } 5792292SN/A 5802292SN/A return true; 5812292SN/A} 5822292SN/A 5832292SN/Atemplate<class Impl> 5842292SN/Avoid 5852292SN/ALSQ<Impl>::dumpInsts() 5862292SN/A{ 5872980Sgblack@eecs.umich.edu std::list<unsigned>::iterator active_threads = (*activeThreads).begin(); 5882292SN/A 5892292SN/A while (active_threads != (*activeThreads).end()) { 5902292SN/A unsigned tid = *active_threads++; 5912292SN/A thread[tid].dumpInsts(); 5922292SN/A } 5932292SN/A} 594