lsq_impl.hh revision 10573
12292SN/A/* 210333Smitch.hayenga@arm.com * Copyright (c) 2011-2012, 2014 ARM Limited 310239Sbinhpham@cs.rutgers.edu * Copyright (c) 2013 Advanced Micro Devices, Inc. 48707Sandreas.hansson@arm.com * All rights reserved 58707Sandreas.hansson@arm.com * 68707Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall 78707Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual 88707Sandreas.hansson@arm.com * property including but not limited to intellectual property relating 98707Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software 108707Sandreas.hansson@arm.com * licensed hereunder. You may use the software subject to the license 118707Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated 128707Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software, 138707Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form. 148707Sandreas.hansson@arm.com * 152727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan 162292SN/A * All rights reserved. 172292SN/A * 182292SN/A * Redistribution and use in source and binary forms, with or without 192292SN/A * modification, are permitted provided that the following conditions are 202292SN/A * met: redistributions of source code must retain the above copyright 212292SN/A * notice, this list of conditions and the following disclaimer; 222292SN/A * redistributions in binary form must reproduce the above copyright 232292SN/A * notice, this list of conditions and the following disclaimer in the 242292SN/A * documentation and/or other materials provided with the distribution; 252292SN/A * neither the name of the copyright holders nor the names of its 262292SN/A * contributors may be used to endorse or promote products derived from 272292SN/A * this software without specific prior written permission. 282292SN/A * 292292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 342292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 352292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 362292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402689Sktlim@umich.edu * 412689Sktlim@umich.edu * Authors: Korey Sewell 422292SN/A */ 432292SN/A 449944Smatt.horsnell@ARM.com#ifndef __CPU_O3_LSQ_IMPL_HH__ 459944Smatt.horsnell@ARM.com#define __CPU_O3_LSQ_IMPL_HH__ 469944Smatt.horsnell@ARM.com 472329SN/A#include <algorithm> 482980Sgblack@eecs.umich.edu#include <list> 492329SN/A#include <string> 502329SN/A 512292SN/A#include "cpu/o3/lsq.hh" 529444SAndreas.Sandberg@ARM.com#include "debug/Drain.hh" 538232Snate@binkert.org#include "debug/Fetch.hh" 548232Snate@binkert.org#include "debug/LSQ.hh" 558232Snate@binkert.org#include "debug/Writeback.hh" 566221Snate@binkert.org#include "params/DerivO3CPU.hh" 572292SN/A 586221Snate@binkert.orgusing namespace std; 595529Snate@binkert.org 602292SN/Atemplate <class Impl> 615529Snate@binkert.orgLSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params) 628707Sandreas.hansson@arm.com : cpu(cpu_ptr), iewStage(iew_ptr), 634329Sktlim@umich.edu LQEntries(params->LQEntries), 644329Sktlim@umich.edu SQEntries(params->SQEntries), 6510333Smitch.hayenga@arm.com numThreads(params->numThreads) 662292SN/A{ 679868Sjthestness@gmail.com assert(numThreads > 0 && numThreads <= Impl::MaxThreads); 689868Sjthestness@gmail.com 692292SN/A //**********************************************/ 702292SN/A //************ Handle SMT Parameters ***********/ 712292SN/A //**********************************************/ 722980Sgblack@eecs.umich.edu std::string policy = params->smtLSQPolicy; 732292SN/A 742292SN/A //Convert string to lowercase 752292SN/A std::transform(policy.begin(), policy.end(), policy.begin(), 762292SN/A (int(*)(int)) tolower); 772292SN/A 782292SN/A //Figure out fetch policy 792292SN/A if (policy == "dynamic") { 802292SN/A lsqPolicy = Dynamic; 812292SN/A 822292SN/A maxLQEntries = LQEntries; 832292SN/A maxSQEntries = SQEntries; 844329Sktlim@umich.edu 852292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n"); 862292SN/A } else if (policy == "partitioned") { 872292SN/A lsqPolicy = Partitioned; 882292SN/A 892292SN/A //@todo:make work if part_amt doesnt divide evenly. 902292SN/A maxLQEntries = LQEntries / numThreads; 912292SN/A maxSQEntries = SQEntries / numThreads; 924329Sktlim@umich.edu 932292SN/A DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: " 948346Sksewell@umich.edu "%i entries per LQ | %i entries per SQ\n", 952292SN/A maxLQEntries,maxSQEntries); 962292SN/A } else if (policy == "threshold") { 972292SN/A lsqPolicy = Threshold; 982292SN/A 992292SN/A assert(params->smtLSQThreshold > LQEntries); 1002292SN/A assert(params->smtLSQThreshold > SQEntries); 1012292SN/A 1022292SN/A //Divide up by threshold amount 1032292SN/A //@todo: Should threads check the max and the total 1042292SN/A //amount of the LSQ 1052292SN/A maxLQEntries = params->smtLSQThreshold; 1062292SN/A maxSQEntries = params->smtLSQThreshold; 1074329Sktlim@umich.edu 1082292SN/A DPRINTF(LSQ, "LSQ sharing policy set to Threshold: " 1098346Sksewell@umich.edu "%i entries per LQ | %i entries per SQ\n", 1102292SN/A maxLQEntries,maxSQEntries); 1112292SN/A } else { 1122292SN/A assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic," 1132292SN/A "Partitioned, Threshold}"); 1142292SN/A } 1152292SN/A 1162292SN/A //Initialize LSQs 1179868Sjthestness@gmail.com thread = new LSQUnit[numThreads]; 1186221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1194329Sktlim@umich.edu thread[tid].init(cpu, iew_ptr, params, this, 1204329Sktlim@umich.edu maxLQEntries, maxSQEntries, tid); 1218850Sandreas.hansson@arm.com thread[tid].setDcachePort(&cpu_ptr->getDataPort()); 1222292SN/A } 1232292SN/A} 1242292SN/A 1252292SN/A 1262292SN/Atemplate<class Impl> 1272292SN/Astd::string 1282292SN/ALSQ<Impl>::name() const 1292292SN/A{ 1302292SN/A return iewStage->name() + ".lsq"; 1312292SN/A} 1322292SN/A 1332292SN/Atemplate<class Impl> 1342292SN/Avoid 1352727Sktlim@umich.eduLSQ<Impl>::regStats() 1362727Sktlim@umich.edu{ 1372727Sktlim@umich.edu //Initialize LSQs 1386221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1392727Sktlim@umich.edu thread[tid].regStats(); 1402727Sktlim@umich.edu } 1412727Sktlim@umich.edu} 1422727Sktlim@umich.edu 1432727Sktlim@umich.edutemplate<class Impl> 1442727Sktlim@umich.eduvoid 1456221Snate@binkert.orgLSQ<Impl>::setActiveThreads(list<ThreadID> *at_ptr) 1462292SN/A{ 1472292SN/A activeThreads = at_ptr; 1482292SN/A assert(activeThreads != 0); 1492292SN/A} 1502292SN/A 1512292SN/Atemplate <class Impl> 1522307SN/Avoid 1539444SAndreas.Sandberg@ARM.comLSQ<Impl>::drainSanityCheck() const 1542307SN/A{ 1559444SAndreas.Sandberg@ARM.com assert(isDrained()); 1569444SAndreas.Sandberg@ARM.com 1579444SAndreas.Sandberg@ARM.com for (ThreadID tid = 0; tid < numThreads; tid++) 1589444SAndreas.Sandberg@ARM.com thread[tid].drainSanityCheck(); 1599444SAndreas.Sandberg@ARM.com} 1609444SAndreas.Sandberg@ARM.com 1619444SAndreas.Sandberg@ARM.comtemplate <class Impl> 1629444SAndreas.Sandberg@ARM.combool 1639444SAndreas.Sandberg@ARM.comLSQ<Impl>::isDrained() const 1649444SAndreas.Sandberg@ARM.com{ 1659444SAndreas.Sandberg@ARM.com bool drained(true); 1669444SAndreas.Sandberg@ARM.com 1679444SAndreas.Sandberg@ARM.com if (!lqEmpty()) { 1689444SAndreas.Sandberg@ARM.com DPRINTF(Drain, "Not drained, LQ not empty.\n"); 1699444SAndreas.Sandberg@ARM.com drained = false; 1702307SN/A } 1719444SAndreas.Sandberg@ARM.com 1729444SAndreas.Sandberg@ARM.com if (!sqEmpty()) { 1739444SAndreas.Sandberg@ARM.com DPRINTF(Drain, "Not drained, SQ not empty.\n"); 1749444SAndreas.Sandberg@ARM.com drained = false; 1759444SAndreas.Sandberg@ARM.com } 1769444SAndreas.Sandberg@ARM.com 1779444SAndreas.Sandberg@ARM.com return drained; 1782307SN/A} 1792307SN/A 1802307SN/Atemplate <class Impl> 1812307SN/Avoid 1822307SN/ALSQ<Impl>::takeOverFrom() 1832307SN/A{ 1846221Snate@binkert.org for (ThreadID tid = 0; tid < numThreads; tid++) { 1852307SN/A thread[tid].takeOverFrom(); 1862307SN/A } 1872307SN/A} 1882307SN/A 1892307SN/Atemplate <class Impl> 1902292SN/Aint 1916221Snate@binkert.orgLSQ<Impl>::entryAmount(ThreadID num_threads) 1922292SN/A{ 1932292SN/A if (lsqPolicy == Partitioned) { 1942292SN/A return LQEntries / num_threads; 1952292SN/A } else { 1962292SN/A return 0; 1972292SN/A } 1982292SN/A} 1992292SN/A 2002292SN/Atemplate <class Impl> 2012292SN/Avoid 2022292SN/ALSQ<Impl>::resetEntries() 2032292SN/A{ 2042292SN/A if (lsqPolicy != Dynamic || numThreads > 1) { 2053867Sbinkertn@umich.edu int active_threads = activeThreads->size(); 2062292SN/A 2072292SN/A int maxEntries; 2082292SN/A 2092292SN/A if (lsqPolicy == Partitioned) { 2102292SN/A maxEntries = LQEntries / active_threads; 2112292SN/A } else if (lsqPolicy == Threshold && active_threads == 1) { 2122292SN/A maxEntries = LQEntries; 2132292SN/A } else { 2142292SN/A maxEntries = LQEntries; 2152292SN/A } 2162292SN/A 2176221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 2186221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 2193867Sbinkertn@umich.edu 2203867Sbinkertn@umich.edu while (threads != end) { 2216221Snate@binkert.org ThreadID tid = *threads++; 2223867Sbinkertn@umich.edu 2233867Sbinkertn@umich.edu resizeEntries(maxEntries, tid); 2242292SN/A } 2252292SN/A } 2262292SN/A} 2272292SN/A 2282292SN/Atemplate<class Impl> 2292292SN/Avoid 2306221Snate@binkert.orgLSQ<Impl>::removeEntries(ThreadID tid) 2312292SN/A{ 2322292SN/A thread[tid].clearLQ(); 2332292SN/A thread[tid].clearSQ(); 2342292SN/A} 2352292SN/A 2362292SN/Atemplate<class Impl> 2372292SN/Avoid 2386221Snate@binkert.orgLSQ<Impl>::resizeEntries(unsigned size, ThreadID tid) 2392292SN/A{ 2402292SN/A thread[tid].resizeLQ(size); 2412292SN/A thread[tid].resizeSQ(size); 2422292SN/A} 2432292SN/A 2442292SN/Atemplate<class Impl> 2452292SN/Avoid 2462292SN/ALSQ<Impl>::tick() 2472292SN/A{ 2486221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 2496221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 2502292SN/A 2513867Sbinkertn@umich.edu while (threads != end) { 2526221Snate@binkert.org ThreadID tid = *threads++; 2532292SN/A 2542292SN/A thread[tid].tick(); 2552292SN/A } 2562292SN/A} 2572292SN/A 2582292SN/Atemplate<class Impl> 2592292SN/Avoid 2602292SN/ALSQ<Impl>::insertLoad(DynInstPtr &load_inst) 2612292SN/A{ 2626221Snate@binkert.org ThreadID tid = load_inst->threadNumber; 2632292SN/A 2642292SN/A thread[tid].insertLoad(load_inst); 2652292SN/A} 2662292SN/A 2672292SN/Atemplate<class Impl> 2682292SN/Avoid 2692292SN/ALSQ<Impl>::insertStore(DynInstPtr &store_inst) 2702292SN/A{ 2716221Snate@binkert.org ThreadID tid = store_inst->threadNumber; 2722292SN/A 2732292SN/A thread[tid].insertStore(store_inst); 2742292SN/A} 2752292SN/A 2762292SN/Atemplate<class Impl> 2772292SN/AFault 2782292SN/ALSQ<Impl>::executeLoad(DynInstPtr &inst) 2792292SN/A{ 2806221Snate@binkert.org ThreadID tid = inst->threadNumber; 2812292SN/A 2822292SN/A return thread[tid].executeLoad(inst); 2832292SN/A} 2842292SN/A 2852292SN/Atemplate<class Impl> 2862292SN/AFault 2872292SN/ALSQ<Impl>::executeStore(DynInstPtr &inst) 2882292SN/A{ 2896221Snate@binkert.org ThreadID tid = inst->threadNumber; 2902292SN/A 2912292SN/A return thread[tid].executeStore(inst); 2922292SN/A} 2932292SN/A 2942292SN/Atemplate<class Impl> 2952292SN/Avoid 2962292SN/ALSQ<Impl>::writebackStores() 2972292SN/A{ 2986221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 2996221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 3002292SN/A 3013867Sbinkertn@umich.edu while (threads != end) { 3026221Snate@binkert.org ThreadID tid = *threads++; 3032292SN/A 3042292SN/A if (numStoresToWB(tid) > 0) { 3052329SN/A DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores " 3062329SN/A "available for Writeback.\n", tid, numStoresToWB(tid)); 3072292SN/A } 3082292SN/A 3092292SN/A thread[tid].writebackStores(); 3102292SN/A } 3112292SN/A} 3122292SN/A 3132292SN/Atemplate<class Impl> 3142292SN/Abool 3152292SN/ALSQ<Impl>::violation() 3162292SN/A{ 3172292SN/A /* Answers: Does Anybody Have a Violation?*/ 3186221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 3196221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 3202292SN/A 3213867Sbinkertn@umich.edu while (threads != end) { 3226221Snate@binkert.org ThreadID tid = *threads++; 3233867Sbinkertn@umich.edu 3242292SN/A if (thread[tid].violation()) 3252292SN/A return true; 3262292SN/A } 3272292SN/A 3282292SN/A return false; 3292292SN/A} 3302292SN/A 3318707Sandreas.hansson@arm.comtemplate <class Impl> 3328707Sandreas.hansson@arm.comvoid 3338707Sandreas.hansson@arm.comLSQ<Impl>::recvRetry() 3348707Sandreas.hansson@arm.com{ 33510333Smitch.hayenga@arm.com iewStage->cacheUnblocked(); 33610333Smitch.hayenga@arm.com 33710333Smitch.hayenga@arm.com for (ThreadID tid : *activeThreads) { 33810333Smitch.hayenga@arm.com thread[tid].recvRetry(); 3398707Sandreas.hansson@arm.com } 3408707Sandreas.hansson@arm.com} 3418707Sandreas.hansson@arm.com 3428707Sandreas.hansson@arm.comtemplate <class Impl> 3438707Sandreas.hansson@arm.combool 3448975Sandreas.hansson@arm.comLSQ<Impl>::recvTimingResp(PacketPtr pkt) 3458707Sandreas.hansson@arm.com{ 3468707Sandreas.hansson@arm.com if (pkt->isError()) 3478707Sandreas.hansson@arm.com DPRINTF(LSQ, "Got error packet back for address: %#X\n", 3488707Sandreas.hansson@arm.com pkt->getAddr()); 3498948Sandreas.hansson@arm.com thread[pkt->req->threadId()].completeDataAccess(pkt); 35010573Sstephan.diestelhorst@arm.com delete pkt->req; 35110573Sstephan.diestelhorst@arm.com delete pkt; 3528948Sandreas.hansson@arm.com return true; 3538948Sandreas.hansson@arm.com} 3548707Sandreas.hansson@arm.com 3558948Sandreas.hansson@arm.comtemplate <class Impl> 3568975Sandreas.hansson@arm.comvoid 3578975Sandreas.hansson@arm.comLSQ<Impl>::recvTimingSnoopReq(PacketPtr pkt) 3588948Sandreas.hansson@arm.com{ 3598948Sandreas.hansson@arm.com DPRINTF(LSQ, "received pkt for addr:%#x %s\n", pkt->getAddr(), 3608948Sandreas.hansson@arm.com pkt->cmdString()); 3618948Sandreas.hansson@arm.com 3628948Sandreas.hansson@arm.com // must be a snoop 3638948Sandreas.hansson@arm.com if (pkt->isInvalidate()) { 3648948Sandreas.hansson@arm.com DPRINTF(LSQ, "received invalidation for addr:%#x\n", 3658948Sandreas.hansson@arm.com pkt->getAddr()); 3668948Sandreas.hansson@arm.com for (ThreadID tid = 0; tid < numThreads; tid++) { 3678948Sandreas.hansson@arm.com thread[tid].checkSnoop(pkt); 3688707Sandreas.hansson@arm.com } 3698707Sandreas.hansson@arm.com } 3708707Sandreas.hansson@arm.com} 3718707Sandreas.hansson@arm.com 3722292SN/Atemplate<class Impl> 3732292SN/Aint 3742292SN/ALSQ<Impl>::getCount() 3752292SN/A{ 3762292SN/A unsigned total = 0; 3772292SN/A 3786221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 3796221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 3802292SN/A 3813867Sbinkertn@umich.edu while (threads != end) { 3826221Snate@binkert.org ThreadID tid = *threads++; 3833867Sbinkertn@umich.edu 3842292SN/A total += getCount(tid); 3852292SN/A } 3862292SN/A 3872292SN/A return total; 3882292SN/A} 3892292SN/A 3902292SN/Atemplate<class Impl> 3912292SN/Aint 3922292SN/ALSQ<Impl>::numLoads() 3932292SN/A{ 3942292SN/A unsigned total = 0; 3952292SN/A 3966221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 3976221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 3982292SN/A 3993867Sbinkertn@umich.edu while (threads != end) { 4006221Snate@binkert.org ThreadID tid = *threads++; 4013867Sbinkertn@umich.edu 4022292SN/A total += numLoads(tid); 4032292SN/A } 4042292SN/A 4052292SN/A return total; 4062292SN/A} 4072292SN/A 4082292SN/Atemplate<class Impl> 4092292SN/Aint 4102292SN/ALSQ<Impl>::numStores() 4112292SN/A{ 4122292SN/A unsigned total = 0; 4132292SN/A 4146221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4156221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4162292SN/A 4173867Sbinkertn@umich.edu while (threads != end) { 4186221Snate@binkert.org ThreadID tid = *threads++; 4193867Sbinkertn@umich.edu 4202292SN/A total += thread[tid].numStores(); 4212292SN/A } 4222292SN/A 4232292SN/A return total; 4242292SN/A} 4252292SN/A 4262292SN/Atemplate<class Impl> 4272292SN/Aunsigned 42810239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeLoadEntries() 4292292SN/A{ 4302292SN/A unsigned total = 0; 4312292SN/A 4326221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4336221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4342292SN/A 4353867Sbinkertn@umich.edu while (threads != end) { 4366221Snate@binkert.org ThreadID tid = *threads++; 4373867Sbinkertn@umich.edu 43810239Sbinhpham@cs.rutgers.edu total += thread[tid].numFreeLoadEntries(); 4392292SN/A } 4402292SN/A 4412292SN/A return total; 4422292SN/A} 4432292SN/A 4442292SN/Atemplate<class Impl> 4452292SN/Aunsigned 44610239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeStoreEntries() 4472292SN/A{ 44810239Sbinhpham@cs.rutgers.edu unsigned total = 0; 44910239Sbinhpham@cs.rutgers.edu 45010239Sbinhpham@cs.rutgers.edu list<ThreadID>::iterator threads = activeThreads->begin(); 45110239Sbinhpham@cs.rutgers.edu list<ThreadID>::iterator end = activeThreads->end(); 45210239Sbinhpham@cs.rutgers.edu 45310239Sbinhpham@cs.rutgers.edu while (threads != end) { 45410239Sbinhpham@cs.rutgers.edu ThreadID tid = *threads++; 45510239Sbinhpham@cs.rutgers.edu 45610239Sbinhpham@cs.rutgers.edu total += thread[tid].numFreeStoreEntries(); 45710239Sbinhpham@cs.rutgers.edu } 45810239Sbinhpham@cs.rutgers.edu 45910239Sbinhpham@cs.rutgers.edu return total; 46010239Sbinhpham@cs.rutgers.edu} 46110239Sbinhpham@cs.rutgers.edu 46210239Sbinhpham@cs.rutgers.edutemplate<class Impl> 46310239Sbinhpham@cs.rutgers.eduunsigned 46410239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeLoadEntries(ThreadID tid) 46510239Sbinhpham@cs.rutgers.edu{ 46610239Sbinhpham@cs.rutgers.edu return thread[tid].numFreeLoadEntries(); 46710239Sbinhpham@cs.rutgers.edu} 46810239Sbinhpham@cs.rutgers.edu 46910239Sbinhpham@cs.rutgers.edutemplate<class Impl> 47010239Sbinhpham@cs.rutgers.eduunsigned 47110239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeStoreEntries(ThreadID tid) 47210239Sbinhpham@cs.rutgers.edu{ 47310239Sbinhpham@cs.rutgers.edu return thread[tid].numFreeStoreEntries(); 4742292SN/A} 4752292SN/A 4762292SN/Atemplate<class Impl> 4772292SN/Abool 4782292SN/ALSQ<Impl>::isFull() 4792292SN/A{ 4806221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 4816221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 4822292SN/A 4833867Sbinkertn@umich.edu while (threads != end) { 4846221Snate@binkert.org ThreadID tid = *threads++; 4853867Sbinkertn@umich.edu 4863867Sbinkertn@umich.edu if (!(thread[tid].lqFull() || thread[tid].sqFull())) 4872292SN/A return false; 4882292SN/A } 4892292SN/A 4902292SN/A return true; 4912292SN/A} 4922292SN/A 4932292SN/Atemplate<class Impl> 4942292SN/Abool 4956221Snate@binkert.orgLSQ<Impl>::isFull(ThreadID tid) 4962292SN/A{ 4972292SN/A //@todo: Change to Calculate All Entries for 4982292SN/A //Dynamic Policy 4993867Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 5002292SN/A return isFull(); 5012292SN/A else 5022292SN/A return thread[tid].lqFull() || thread[tid].sqFull(); 5032292SN/A} 5042292SN/A 5052292SN/Atemplate<class Impl> 5062292SN/Abool 5079444SAndreas.Sandberg@ARM.comLSQ<Impl>::isEmpty() const 5089444SAndreas.Sandberg@ARM.com{ 5099444SAndreas.Sandberg@ARM.com return lqEmpty() && sqEmpty(); 5109444SAndreas.Sandberg@ARM.com} 5119444SAndreas.Sandberg@ARM.com 5129444SAndreas.Sandberg@ARM.comtemplate<class Impl> 5139444SAndreas.Sandberg@ARM.combool 5149444SAndreas.Sandberg@ARM.comLSQ<Impl>::lqEmpty() const 5159444SAndreas.Sandberg@ARM.com{ 5169444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator threads = activeThreads->begin(); 5179444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator end = activeThreads->end(); 5189444SAndreas.Sandberg@ARM.com 5199444SAndreas.Sandberg@ARM.com while (threads != end) { 5209444SAndreas.Sandberg@ARM.com ThreadID tid = *threads++; 5219444SAndreas.Sandberg@ARM.com 5229444SAndreas.Sandberg@ARM.com if (!thread[tid].lqEmpty()) 5239444SAndreas.Sandberg@ARM.com return false; 5249444SAndreas.Sandberg@ARM.com } 5259444SAndreas.Sandberg@ARM.com 5269444SAndreas.Sandberg@ARM.com return true; 5279444SAndreas.Sandberg@ARM.com} 5289444SAndreas.Sandberg@ARM.com 5299444SAndreas.Sandberg@ARM.comtemplate<class Impl> 5309444SAndreas.Sandberg@ARM.combool 5319444SAndreas.Sandberg@ARM.comLSQ<Impl>::sqEmpty() const 5329444SAndreas.Sandberg@ARM.com{ 5339444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator threads = activeThreads->begin(); 5349444SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator end = activeThreads->end(); 5359444SAndreas.Sandberg@ARM.com 5369444SAndreas.Sandberg@ARM.com while (threads != end) { 5379444SAndreas.Sandberg@ARM.com ThreadID tid = *threads++; 5389444SAndreas.Sandberg@ARM.com 5399444SAndreas.Sandberg@ARM.com if (!thread[tid].sqEmpty()) 5409444SAndreas.Sandberg@ARM.com return false; 5419444SAndreas.Sandberg@ARM.com } 5429444SAndreas.Sandberg@ARM.com 5439444SAndreas.Sandberg@ARM.com return true; 5449444SAndreas.Sandberg@ARM.com} 5459444SAndreas.Sandberg@ARM.com 5469444SAndreas.Sandberg@ARM.comtemplate<class Impl> 5479444SAndreas.Sandberg@ARM.combool 5482292SN/ALSQ<Impl>::lqFull() 5492292SN/A{ 5506221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 5516221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 5522292SN/A 5533867Sbinkertn@umich.edu while (threads != end) { 5546221Snate@binkert.org ThreadID tid = *threads++; 5553867Sbinkertn@umich.edu 5562292SN/A if (!thread[tid].lqFull()) 5572292SN/A return false; 5582292SN/A } 5592292SN/A 5602292SN/A return true; 5612292SN/A} 5622292SN/A 5632292SN/Atemplate<class Impl> 5642292SN/Abool 5656221Snate@binkert.orgLSQ<Impl>::lqFull(ThreadID tid) 5662292SN/A{ 5672292SN/A //@todo: Change to Calculate All Entries for 5682292SN/A //Dynamic Policy 5693870Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 5702292SN/A return lqFull(); 5712292SN/A else 5722292SN/A return thread[tid].lqFull(); 5732292SN/A} 5742292SN/A 5752292SN/Atemplate<class Impl> 5762292SN/Abool 5772292SN/ALSQ<Impl>::sqFull() 5782292SN/A{ 5796221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 5806221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 5812292SN/A 5823867Sbinkertn@umich.edu while (threads != end) { 5836221Snate@binkert.org ThreadID tid = *threads++; 5843867Sbinkertn@umich.edu 5852292SN/A if (!sqFull(tid)) 5862292SN/A return false; 5872292SN/A } 5882292SN/A 5892292SN/A return true; 5902292SN/A} 5912292SN/A 5922292SN/Atemplate<class Impl> 5932292SN/Abool 5946221Snate@binkert.orgLSQ<Impl>::sqFull(ThreadID tid) 5952292SN/A{ 5962292SN/A //@todo: Change to Calculate All Entries for 5972292SN/A //Dynamic Policy 5983870Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 5992292SN/A return sqFull(); 6002292SN/A else 6012292SN/A return thread[tid].sqFull(); 6022292SN/A} 6032292SN/A 6042292SN/Atemplate<class Impl> 6052292SN/Abool 6062292SN/ALSQ<Impl>::isStalled() 6072292SN/A{ 6086221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 6096221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 6102292SN/A 6113867Sbinkertn@umich.edu while (threads != end) { 6126221Snate@binkert.org ThreadID tid = *threads++; 6133867Sbinkertn@umich.edu 6142292SN/A if (!thread[tid].isStalled()) 6152292SN/A return false; 6162292SN/A } 6172292SN/A 6182292SN/A return true; 6192292SN/A} 6202292SN/A 6212292SN/Atemplate<class Impl> 6222292SN/Abool 6236221Snate@binkert.orgLSQ<Impl>::isStalled(ThreadID tid) 6242292SN/A{ 6253870Sbinkertn@umich.edu if (lsqPolicy == Dynamic) 6262292SN/A return isStalled(); 6272292SN/A else 6282292SN/A return thread[tid].isStalled(); 6292292SN/A} 6302292SN/A 6312292SN/Atemplate<class Impl> 6322292SN/Abool 6332292SN/ALSQ<Impl>::hasStoresToWB() 6342292SN/A{ 6356221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 6366221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 6372292SN/A 6383867Sbinkertn@umich.edu while (threads != end) { 6396221Snate@binkert.org ThreadID tid = *threads++; 6403867Sbinkertn@umich.edu 6415557Sktlim@umich.edu if (hasStoresToWB(tid)) 6425557Sktlim@umich.edu return true; 6432292SN/A } 6442292SN/A 6455557Sktlim@umich.edu return false; 6462292SN/A} 6472292SN/A 6482292SN/Atemplate<class Impl> 6492292SN/Abool 6502292SN/ALSQ<Impl>::willWB() 6512292SN/A{ 6526221Snate@binkert.org list<ThreadID>::iterator threads = activeThreads->begin(); 6536221Snate@binkert.org list<ThreadID>::iterator end = activeThreads->end(); 6542292SN/A 6553867Sbinkertn@umich.edu while (threads != end) { 6566221Snate@binkert.org ThreadID tid = *threads++; 6573867Sbinkertn@umich.edu 6585557Sktlim@umich.edu if (willWB(tid)) 6595557Sktlim@umich.edu return true; 6602292SN/A } 6612292SN/A 6625557Sktlim@umich.edu return false; 6632292SN/A} 6642292SN/A 6652292SN/Atemplate<class Impl> 6662292SN/Avoid 6679440SAndreas.Sandberg@ARM.comLSQ<Impl>::dumpInsts() const 6682292SN/A{ 6699440SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator threads = activeThreads->begin(); 6709440SAndreas.Sandberg@ARM.com list<ThreadID>::const_iterator end = activeThreads->end(); 6712292SN/A 6723867Sbinkertn@umich.edu while (threads != end) { 6736221Snate@binkert.org ThreadID tid = *threads++; 6743867Sbinkertn@umich.edu 6752292SN/A thread[tid].dumpInsts(); 6762292SN/A } 6772292SN/A} 6789944Smatt.horsnell@ARM.com 6799944Smatt.horsnell@ARM.com#endif//__CPU_O3_LSQ_IMPL_HH__ 680