lsq_impl.hh revision 10239
12292SN/A/*
28948Sandreas.hansson@arm.com * Copyright (c) 2011-2012 ARM Limited
310239Sbinhpham@cs.rutgers.edu * Copyright (c) 2013 Advanced Micro Devices, Inc.
48707Sandreas.hansson@arm.com * All rights reserved
58707Sandreas.hansson@arm.com *
68707Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall
78707Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual
88707Sandreas.hansson@arm.com * property including but not limited to intellectual property relating
98707Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software
108707Sandreas.hansson@arm.com * licensed hereunder.  You may use the software subject to the license
118707Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated
128707Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software,
138707Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form.
148707Sandreas.hansson@arm.com *
152727Sktlim@umich.edu * Copyright (c) 2005-2006 The Regents of The University of Michigan
162292SN/A * All rights reserved.
172292SN/A *
182292SN/A * Redistribution and use in source and binary forms, with or without
192292SN/A * modification, are permitted provided that the following conditions are
202292SN/A * met: redistributions of source code must retain the above copyright
212292SN/A * notice, this list of conditions and the following disclaimer;
222292SN/A * redistributions in binary form must reproduce the above copyright
232292SN/A * notice, this list of conditions and the following disclaimer in the
242292SN/A * documentation and/or other materials provided with the distribution;
252292SN/A * neither the name of the copyright holders nor the names of its
262292SN/A * contributors may be used to endorse or promote products derived from
272292SN/A * this software without specific prior written permission.
282292SN/A *
292292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
302292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
312292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
322292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
332292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
342292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
352292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
362292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
372292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
382292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
392292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
402689Sktlim@umich.edu *
412689Sktlim@umich.edu * Authors: Korey Sewell
422292SN/A */
432292SN/A
449944Smatt.horsnell@ARM.com#ifndef __CPU_O3_LSQ_IMPL_HH__
459944Smatt.horsnell@ARM.com#define __CPU_O3_LSQ_IMPL_HH__
469944Smatt.horsnell@ARM.com
472329SN/A#include <algorithm>
482980Sgblack@eecs.umich.edu#include <list>
492329SN/A#include <string>
502329SN/A
512292SN/A#include "cpu/o3/lsq.hh"
529444SAndreas.Sandberg@ARM.com#include "debug/Drain.hh"
538232Snate@binkert.org#include "debug/Fetch.hh"
548232Snate@binkert.org#include "debug/LSQ.hh"
558232Snate@binkert.org#include "debug/Writeback.hh"
566221Snate@binkert.org#include "params/DerivO3CPU.hh"
572292SN/A
586221Snate@binkert.orgusing namespace std;
595529Snate@binkert.org
602292SN/Atemplate <class Impl>
615529Snate@binkert.orgLSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
628707Sandreas.hansson@arm.com    : cpu(cpu_ptr), iewStage(iew_ptr),
634329Sktlim@umich.edu      LQEntries(params->LQEntries),
644329Sktlim@umich.edu      SQEntries(params->SQEntries),
655529Snate@binkert.org      numThreads(params->numThreads),
662907Sktlim@umich.edu      retryTid(-1)
672292SN/A{
689868Sjthestness@gmail.com    assert(numThreads > 0 && numThreads <= Impl::MaxThreads);
699868Sjthestness@gmail.com
702292SN/A    //**********************************************/
712292SN/A    //************ Handle SMT Parameters ***********/
722292SN/A    //**********************************************/
732980Sgblack@eecs.umich.edu    std::string policy = params->smtLSQPolicy;
742292SN/A
752292SN/A    //Convert string to lowercase
762292SN/A    std::transform(policy.begin(), policy.end(), policy.begin(),
772292SN/A                   (int(*)(int)) tolower);
782292SN/A
792292SN/A    //Figure out fetch policy
802292SN/A    if (policy == "dynamic") {
812292SN/A        lsqPolicy = Dynamic;
822292SN/A
832292SN/A        maxLQEntries = LQEntries;
842292SN/A        maxSQEntries = SQEntries;
854329Sktlim@umich.edu
862292SN/A        DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n");
872292SN/A    } else if (policy == "partitioned") {
882292SN/A        lsqPolicy = Partitioned;
892292SN/A
902292SN/A        //@todo:make work if part_amt doesnt divide evenly.
912292SN/A        maxLQEntries = LQEntries / numThreads;
922292SN/A        maxSQEntries = SQEntries / numThreads;
934329Sktlim@umich.edu
942292SN/A        DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: "
958346Sksewell@umich.edu                "%i entries per LQ | %i entries per SQ\n",
962292SN/A                maxLQEntries,maxSQEntries);
972292SN/A    } else if (policy == "threshold") {
982292SN/A        lsqPolicy = Threshold;
992292SN/A
1002292SN/A        assert(params->smtLSQThreshold > LQEntries);
1012292SN/A        assert(params->smtLSQThreshold > SQEntries);
1022292SN/A
1032292SN/A        //Divide up by threshold amount
1042292SN/A        //@todo: Should threads check the max and the total
1052292SN/A        //amount of the LSQ
1062292SN/A        maxLQEntries  = params->smtLSQThreshold;
1072292SN/A        maxSQEntries  = params->smtLSQThreshold;
1084329Sktlim@umich.edu
1092292SN/A        DPRINTF(LSQ, "LSQ sharing policy set to Threshold: "
1108346Sksewell@umich.edu                "%i entries per LQ | %i entries per SQ\n",
1112292SN/A                maxLQEntries,maxSQEntries);
1122292SN/A    } else {
1132292SN/A        assert(0 && "Invalid LSQ Sharing Policy.Options Are:{Dynamic,"
1142292SN/A                    "Partitioned, Threshold}");
1152292SN/A    }
1162292SN/A
1172292SN/A    //Initialize LSQs
1189868Sjthestness@gmail.com    thread = new LSQUnit[numThreads];
1196221Snate@binkert.org    for (ThreadID tid = 0; tid < numThreads; tid++) {
1204329Sktlim@umich.edu        thread[tid].init(cpu, iew_ptr, params, this,
1214329Sktlim@umich.edu                         maxLQEntries, maxSQEntries, tid);
1228850Sandreas.hansson@arm.com        thread[tid].setDcachePort(&cpu_ptr->getDataPort());
1232292SN/A    }
1242292SN/A}
1252292SN/A
1262292SN/A
1272292SN/Atemplate<class Impl>
1282292SN/Astd::string
1292292SN/ALSQ<Impl>::name() const
1302292SN/A{
1312292SN/A    return iewStage->name() + ".lsq";
1322292SN/A}
1332292SN/A
1342292SN/Atemplate<class Impl>
1352292SN/Avoid
1362727Sktlim@umich.eduLSQ<Impl>::regStats()
1372727Sktlim@umich.edu{
1382727Sktlim@umich.edu    //Initialize LSQs
1396221Snate@binkert.org    for (ThreadID tid = 0; tid < numThreads; tid++) {
1402727Sktlim@umich.edu        thread[tid].regStats();
1412727Sktlim@umich.edu    }
1422727Sktlim@umich.edu}
1432727Sktlim@umich.edu
1442727Sktlim@umich.edutemplate<class Impl>
1452727Sktlim@umich.eduvoid
1466221Snate@binkert.orgLSQ<Impl>::setActiveThreads(list<ThreadID> *at_ptr)
1472292SN/A{
1482292SN/A    activeThreads = at_ptr;
1492292SN/A    assert(activeThreads != 0);
1502292SN/A}
1512292SN/A
1522292SN/Atemplate <class Impl>
1532307SN/Avoid
1549444SAndreas.Sandberg@ARM.comLSQ<Impl>::drainSanityCheck() const
1552307SN/A{
1569444SAndreas.Sandberg@ARM.com    assert(isDrained());
1579444SAndreas.Sandberg@ARM.com
1589444SAndreas.Sandberg@ARM.com    for (ThreadID tid = 0; tid < numThreads; tid++)
1599444SAndreas.Sandberg@ARM.com        thread[tid].drainSanityCheck();
1609444SAndreas.Sandberg@ARM.com}
1619444SAndreas.Sandberg@ARM.com
1629444SAndreas.Sandberg@ARM.comtemplate <class Impl>
1639444SAndreas.Sandberg@ARM.combool
1649444SAndreas.Sandberg@ARM.comLSQ<Impl>::isDrained() const
1659444SAndreas.Sandberg@ARM.com{
1669444SAndreas.Sandberg@ARM.com    bool drained(true);
1679444SAndreas.Sandberg@ARM.com
1689444SAndreas.Sandberg@ARM.com    if (!lqEmpty()) {
1699444SAndreas.Sandberg@ARM.com        DPRINTF(Drain, "Not drained, LQ not empty.\n");
1709444SAndreas.Sandberg@ARM.com        drained = false;
1712307SN/A    }
1729444SAndreas.Sandberg@ARM.com
1739444SAndreas.Sandberg@ARM.com    if (!sqEmpty()) {
1749444SAndreas.Sandberg@ARM.com        DPRINTF(Drain, "Not drained, SQ not empty.\n");
1759444SAndreas.Sandberg@ARM.com        drained = false;
1769444SAndreas.Sandberg@ARM.com    }
1779444SAndreas.Sandberg@ARM.com
1789444SAndreas.Sandberg@ARM.com    if (retryTid != InvalidThreadID) {
1799444SAndreas.Sandberg@ARM.com        DPRINTF(Drain, "Not drained, the LSQ has blocked the caches.\n");
1809444SAndreas.Sandberg@ARM.com        drained = false;
1819444SAndreas.Sandberg@ARM.com    }
1829444SAndreas.Sandberg@ARM.com
1839444SAndreas.Sandberg@ARM.com    return drained;
1842307SN/A}
1852307SN/A
1862307SN/Atemplate <class Impl>
1872307SN/Avoid
1882307SN/ALSQ<Impl>::takeOverFrom()
1892307SN/A{
1906221Snate@binkert.org    for (ThreadID tid = 0; tid < numThreads; tid++) {
1912307SN/A        thread[tid].takeOverFrom();
1922307SN/A    }
1932307SN/A}
1942307SN/A
1952307SN/Atemplate <class Impl>
1962292SN/Aint
1976221Snate@binkert.orgLSQ<Impl>::entryAmount(ThreadID num_threads)
1982292SN/A{
1992292SN/A    if (lsqPolicy == Partitioned) {
2002292SN/A        return LQEntries / num_threads;
2012292SN/A    } else {
2022292SN/A        return 0;
2032292SN/A    }
2042292SN/A}
2052292SN/A
2062292SN/Atemplate <class Impl>
2072292SN/Avoid
2082292SN/ALSQ<Impl>::resetEntries()
2092292SN/A{
2102292SN/A    if (lsqPolicy != Dynamic || numThreads > 1) {
2113867Sbinkertn@umich.edu        int active_threads = activeThreads->size();
2122292SN/A
2132292SN/A        int maxEntries;
2142292SN/A
2152292SN/A        if (lsqPolicy == Partitioned) {
2162292SN/A            maxEntries = LQEntries / active_threads;
2172292SN/A        } else if (lsqPolicy == Threshold && active_threads == 1) {
2182292SN/A            maxEntries = LQEntries;
2192292SN/A        } else {
2202292SN/A            maxEntries = LQEntries;
2212292SN/A        }
2222292SN/A
2236221Snate@binkert.org        list<ThreadID>::iterator threads  = activeThreads->begin();
2246221Snate@binkert.org        list<ThreadID>::iterator end = activeThreads->end();
2253867Sbinkertn@umich.edu
2263867Sbinkertn@umich.edu        while (threads != end) {
2276221Snate@binkert.org            ThreadID tid = *threads++;
2283867Sbinkertn@umich.edu
2293867Sbinkertn@umich.edu            resizeEntries(maxEntries, tid);
2302292SN/A        }
2312292SN/A    }
2322292SN/A}
2332292SN/A
2342292SN/Atemplate<class Impl>
2352292SN/Avoid
2366221Snate@binkert.orgLSQ<Impl>::removeEntries(ThreadID tid)
2372292SN/A{
2382292SN/A    thread[tid].clearLQ();
2392292SN/A    thread[tid].clearSQ();
2402292SN/A}
2412292SN/A
2422292SN/Atemplate<class Impl>
2432292SN/Avoid
2446221Snate@binkert.orgLSQ<Impl>::resizeEntries(unsigned size, ThreadID tid)
2452292SN/A{
2462292SN/A    thread[tid].resizeLQ(size);
2472292SN/A    thread[tid].resizeSQ(size);
2482292SN/A}
2492292SN/A
2502292SN/Atemplate<class Impl>
2512292SN/Avoid
2522292SN/ALSQ<Impl>::tick()
2532292SN/A{
2546221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
2556221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
2562292SN/A
2573867Sbinkertn@umich.edu    while (threads != end) {
2586221Snate@binkert.org        ThreadID tid = *threads++;
2592292SN/A
2602292SN/A        thread[tid].tick();
2612292SN/A    }
2622292SN/A}
2632292SN/A
2642292SN/Atemplate<class Impl>
2652292SN/Avoid
2662292SN/ALSQ<Impl>::insertLoad(DynInstPtr &load_inst)
2672292SN/A{
2686221Snate@binkert.org    ThreadID tid = load_inst->threadNumber;
2692292SN/A
2702292SN/A    thread[tid].insertLoad(load_inst);
2712292SN/A}
2722292SN/A
2732292SN/Atemplate<class Impl>
2742292SN/Avoid
2752292SN/ALSQ<Impl>::insertStore(DynInstPtr &store_inst)
2762292SN/A{
2776221Snate@binkert.org    ThreadID tid = store_inst->threadNumber;
2782292SN/A
2792292SN/A    thread[tid].insertStore(store_inst);
2802292SN/A}
2812292SN/A
2822292SN/Atemplate<class Impl>
2832292SN/AFault
2842292SN/ALSQ<Impl>::executeLoad(DynInstPtr &inst)
2852292SN/A{
2866221Snate@binkert.org    ThreadID tid = inst->threadNumber;
2872292SN/A
2882292SN/A    return thread[tid].executeLoad(inst);
2892292SN/A}
2902292SN/A
2912292SN/Atemplate<class Impl>
2922292SN/AFault
2932292SN/ALSQ<Impl>::executeStore(DynInstPtr &inst)
2942292SN/A{
2956221Snate@binkert.org    ThreadID tid = inst->threadNumber;
2962292SN/A
2972292SN/A    return thread[tid].executeStore(inst);
2982292SN/A}
2992292SN/A
3002292SN/Atemplate<class Impl>
3012292SN/Avoid
3022292SN/ALSQ<Impl>::writebackStores()
3032292SN/A{
3046221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
3056221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
3062292SN/A
3073867Sbinkertn@umich.edu    while (threads != end) {
3086221Snate@binkert.org        ThreadID tid = *threads++;
3092292SN/A
3102292SN/A        if (numStoresToWB(tid) > 0) {
3112329SN/A            DPRINTF(Writeback,"[tid:%i] Writing back stores. %i stores "
3122329SN/A                "available for Writeback.\n", tid, numStoresToWB(tid));
3132292SN/A        }
3142292SN/A
3152292SN/A        thread[tid].writebackStores();
3162292SN/A    }
3172292SN/A}
3182292SN/A
3192292SN/Atemplate<class Impl>
3202292SN/Abool
3212292SN/ALSQ<Impl>::violation()
3222292SN/A{
3232292SN/A    /* Answers: Does Anybody Have a Violation?*/
3246221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
3256221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
3262292SN/A
3273867Sbinkertn@umich.edu    while (threads != end) {
3286221Snate@binkert.org        ThreadID tid = *threads++;
3293867Sbinkertn@umich.edu
3302292SN/A        if (thread[tid].violation())
3312292SN/A            return true;
3322292SN/A    }
3332292SN/A
3342292SN/A    return false;
3352292SN/A}
3362292SN/A
3378707Sandreas.hansson@arm.comtemplate <class Impl>
3388707Sandreas.hansson@arm.comvoid
3398707Sandreas.hansson@arm.comLSQ<Impl>::recvRetry()
3408707Sandreas.hansson@arm.com{
3418707Sandreas.hansson@arm.com    if (retryTid == InvalidThreadID)
3428707Sandreas.hansson@arm.com    {
3438707Sandreas.hansson@arm.com        //Squashed, so drop it
3448707Sandreas.hansson@arm.com        return;
3458707Sandreas.hansson@arm.com    }
3468707Sandreas.hansson@arm.com    int curr_retry_tid = retryTid;
3478707Sandreas.hansson@arm.com    // Speculatively clear the retry Tid.  This will get set again if
3488707Sandreas.hansson@arm.com    // the LSQUnit was unable to complete its access.
3498707Sandreas.hansson@arm.com    retryTid = -1;
3508707Sandreas.hansson@arm.com    thread[curr_retry_tid].recvRetry();
3518707Sandreas.hansson@arm.com}
3528707Sandreas.hansson@arm.com
3538707Sandreas.hansson@arm.comtemplate <class Impl>
3548707Sandreas.hansson@arm.combool
3558975Sandreas.hansson@arm.comLSQ<Impl>::recvTimingResp(PacketPtr pkt)
3568707Sandreas.hansson@arm.com{
3578707Sandreas.hansson@arm.com    if (pkt->isError())
3588707Sandreas.hansson@arm.com        DPRINTF(LSQ, "Got error packet back for address: %#X\n",
3598707Sandreas.hansson@arm.com                pkt->getAddr());
3608948Sandreas.hansson@arm.com    thread[pkt->req->threadId()].completeDataAccess(pkt);
3618948Sandreas.hansson@arm.com    return true;
3628948Sandreas.hansson@arm.com}
3638707Sandreas.hansson@arm.com
3648948Sandreas.hansson@arm.comtemplate <class Impl>
3658975Sandreas.hansson@arm.comvoid
3668975Sandreas.hansson@arm.comLSQ<Impl>::recvTimingSnoopReq(PacketPtr pkt)
3678948Sandreas.hansson@arm.com{
3688948Sandreas.hansson@arm.com    DPRINTF(LSQ, "received pkt for addr:%#x %s\n", pkt->getAddr(),
3698948Sandreas.hansson@arm.com            pkt->cmdString());
3708948Sandreas.hansson@arm.com
3718948Sandreas.hansson@arm.com    // must be a snoop
3728948Sandreas.hansson@arm.com    if (pkt->isInvalidate()) {
3738948Sandreas.hansson@arm.com        DPRINTF(LSQ, "received invalidation for addr:%#x\n",
3748948Sandreas.hansson@arm.com                pkt->getAddr());
3758948Sandreas.hansson@arm.com        for (ThreadID tid = 0; tid < numThreads; tid++) {
3768948Sandreas.hansson@arm.com            thread[tid].checkSnoop(pkt);
3778707Sandreas.hansson@arm.com        }
3788707Sandreas.hansson@arm.com    }
3798707Sandreas.hansson@arm.com}
3808707Sandreas.hansson@arm.com
3812292SN/Atemplate<class Impl>
3822292SN/Aint
3832292SN/ALSQ<Impl>::getCount()
3842292SN/A{
3852292SN/A    unsigned total = 0;
3862292SN/A
3876221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
3886221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
3892292SN/A
3903867Sbinkertn@umich.edu    while (threads != end) {
3916221Snate@binkert.org        ThreadID tid = *threads++;
3923867Sbinkertn@umich.edu
3932292SN/A        total += getCount(tid);
3942292SN/A    }
3952292SN/A
3962292SN/A    return total;
3972292SN/A}
3982292SN/A
3992292SN/Atemplate<class Impl>
4002292SN/Aint
4012292SN/ALSQ<Impl>::numLoads()
4022292SN/A{
4032292SN/A    unsigned total = 0;
4042292SN/A
4056221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
4066221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
4072292SN/A
4083867Sbinkertn@umich.edu    while (threads != end) {
4096221Snate@binkert.org        ThreadID tid = *threads++;
4103867Sbinkertn@umich.edu
4112292SN/A        total += numLoads(tid);
4122292SN/A    }
4132292SN/A
4142292SN/A    return total;
4152292SN/A}
4162292SN/A
4172292SN/Atemplate<class Impl>
4182292SN/Aint
4192292SN/ALSQ<Impl>::numStores()
4202292SN/A{
4212292SN/A    unsigned total = 0;
4222292SN/A
4236221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
4246221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
4252292SN/A
4263867Sbinkertn@umich.edu    while (threads != end) {
4276221Snate@binkert.org        ThreadID tid = *threads++;
4283867Sbinkertn@umich.edu
4292292SN/A        total += thread[tid].numStores();
4302292SN/A    }
4312292SN/A
4322292SN/A    return total;
4332292SN/A}
4342292SN/A
4352292SN/Atemplate<class Impl>
4362292SN/Aunsigned
43710239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeLoadEntries()
4382292SN/A{
4392292SN/A    unsigned total = 0;
4402292SN/A
4416221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
4426221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
4432292SN/A
4443867Sbinkertn@umich.edu    while (threads != end) {
4456221Snate@binkert.org        ThreadID tid = *threads++;
4463867Sbinkertn@umich.edu
44710239Sbinhpham@cs.rutgers.edu        total += thread[tid].numFreeLoadEntries();
4482292SN/A    }
4492292SN/A
4502292SN/A    return total;
4512292SN/A}
4522292SN/A
4532292SN/Atemplate<class Impl>
4542292SN/Aunsigned
45510239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeStoreEntries()
4562292SN/A{
45710239Sbinhpham@cs.rutgers.edu    unsigned total = 0;
45810239Sbinhpham@cs.rutgers.edu
45910239Sbinhpham@cs.rutgers.edu    list<ThreadID>::iterator threads = activeThreads->begin();
46010239Sbinhpham@cs.rutgers.edu    list<ThreadID>::iterator end = activeThreads->end();
46110239Sbinhpham@cs.rutgers.edu
46210239Sbinhpham@cs.rutgers.edu    while (threads != end) {
46310239Sbinhpham@cs.rutgers.edu        ThreadID tid = *threads++;
46410239Sbinhpham@cs.rutgers.edu
46510239Sbinhpham@cs.rutgers.edu        total += thread[tid].numFreeStoreEntries();
46610239Sbinhpham@cs.rutgers.edu    }
46710239Sbinhpham@cs.rutgers.edu
46810239Sbinhpham@cs.rutgers.edu    return total;
46910239Sbinhpham@cs.rutgers.edu}
47010239Sbinhpham@cs.rutgers.edu
47110239Sbinhpham@cs.rutgers.edutemplate<class Impl>
47210239Sbinhpham@cs.rutgers.eduunsigned
47310239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeLoadEntries(ThreadID tid)
47410239Sbinhpham@cs.rutgers.edu{
47510239Sbinhpham@cs.rutgers.edu        return thread[tid].numFreeLoadEntries();
47610239Sbinhpham@cs.rutgers.edu}
47710239Sbinhpham@cs.rutgers.edu
47810239Sbinhpham@cs.rutgers.edutemplate<class Impl>
47910239Sbinhpham@cs.rutgers.eduunsigned
48010239Sbinhpham@cs.rutgers.eduLSQ<Impl>::numFreeStoreEntries(ThreadID tid)
48110239Sbinhpham@cs.rutgers.edu{
48210239Sbinhpham@cs.rutgers.edu        return thread[tid].numFreeStoreEntries();
4832292SN/A}
4842292SN/A
4852292SN/Atemplate<class Impl>
4862292SN/Abool
4872292SN/ALSQ<Impl>::isFull()
4882292SN/A{
4896221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
4906221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
4912292SN/A
4923867Sbinkertn@umich.edu    while (threads != end) {
4936221Snate@binkert.org        ThreadID tid = *threads++;
4943867Sbinkertn@umich.edu
4953867Sbinkertn@umich.edu        if (!(thread[tid].lqFull() || thread[tid].sqFull()))
4962292SN/A            return false;
4972292SN/A    }
4982292SN/A
4992292SN/A    return true;
5002292SN/A}
5012292SN/A
5022292SN/Atemplate<class Impl>
5032292SN/Abool
5046221Snate@binkert.orgLSQ<Impl>::isFull(ThreadID tid)
5052292SN/A{
5062292SN/A    //@todo: Change to Calculate All Entries for
5072292SN/A    //Dynamic Policy
5083867Sbinkertn@umich.edu    if (lsqPolicy == Dynamic)
5092292SN/A        return isFull();
5102292SN/A    else
5112292SN/A        return thread[tid].lqFull() || thread[tid].sqFull();
5122292SN/A}
5132292SN/A
5142292SN/Atemplate<class Impl>
5152292SN/Abool
5169444SAndreas.Sandberg@ARM.comLSQ<Impl>::isEmpty() const
5179444SAndreas.Sandberg@ARM.com{
5189444SAndreas.Sandberg@ARM.com    return lqEmpty() && sqEmpty();
5199444SAndreas.Sandberg@ARM.com}
5209444SAndreas.Sandberg@ARM.com
5219444SAndreas.Sandberg@ARM.comtemplate<class Impl>
5229444SAndreas.Sandberg@ARM.combool
5239444SAndreas.Sandberg@ARM.comLSQ<Impl>::lqEmpty() const
5249444SAndreas.Sandberg@ARM.com{
5259444SAndreas.Sandberg@ARM.com    list<ThreadID>::const_iterator threads = activeThreads->begin();
5269444SAndreas.Sandberg@ARM.com    list<ThreadID>::const_iterator end = activeThreads->end();
5279444SAndreas.Sandberg@ARM.com
5289444SAndreas.Sandberg@ARM.com    while (threads != end) {
5299444SAndreas.Sandberg@ARM.com        ThreadID tid = *threads++;
5309444SAndreas.Sandberg@ARM.com
5319444SAndreas.Sandberg@ARM.com        if (!thread[tid].lqEmpty())
5329444SAndreas.Sandberg@ARM.com            return false;
5339444SAndreas.Sandberg@ARM.com    }
5349444SAndreas.Sandberg@ARM.com
5359444SAndreas.Sandberg@ARM.com    return true;
5369444SAndreas.Sandberg@ARM.com}
5379444SAndreas.Sandberg@ARM.com
5389444SAndreas.Sandberg@ARM.comtemplate<class Impl>
5399444SAndreas.Sandberg@ARM.combool
5409444SAndreas.Sandberg@ARM.comLSQ<Impl>::sqEmpty() const
5419444SAndreas.Sandberg@ARM.com{
5429444SAndreas.Sandberg@ARM.com    list<ThreadID>::const_iterator threads = activeThreads->begin();
5439444SAndreas.Sandberg@ARM.com    list<ThreadID>::const_iterator end = activeThreads->end();
5449444SAndreas.Sandberg@ARM.com
5459444SAndreas.Sandberg@ARM.com    while (threads != end) {
5469444SAndreas.Sandberg@ARM.com        ThreadID tid = *threads++;
5479444SAndreas.Sandberg@ARM.com
5489444SAndreas.Sandberg@ARM.com        if (!thread[tid].sqEmpty())
5499444SAndreas.Sandberg@ARM.com            return false;
5509444SAndreas.Sandberg@ARM.com    }
5519444SAndreas.Sandberg@ARM.com
5529444SAndreas.Sandberg@ARM.com    return true;
5539444SAndreas.Sandberg@ARM.com}
5549444SAndreas.Sandberg@ARM.com
5559444SAndreas.Sandberg@ARM.comtemplate<class Impl>
5569444SAndreas.Sandberg@ARM.combool
5572292SN/ALSQ<Impl>::lqFull()
5582292SN/A{
5596221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
5606221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
5612292SN/A
5623867Sbinkertn@umich.edu    while (threads != end) {
5636221Snate@binkert.org        ThreadID tid = *threads++;
5643867Sbinkertn@umich.edu
5652292SN/A        if (!thread[tid].lqFull())
5662292SN/A            return false;
5672292SN/A    }
5682292SN/A
5692292SN/A    return true;
5702292SN/A}
5712292SN/A
5722292SN/Atemplate<class Impl>
5732292SN/Abool
5746221Snate@binkert.orgLSQ<Impl>::lqFull(ThreadID tid)
5752292SN/A{
5762292SN/A    //@todo: Change to Calculate All Entries for
5772292SN/A    //Dynamic Policy
5783870Sbinkertn@umich.edu    if (lsqPolicy == Dynamic)
5792292SN/A        return lqFull();
5802292SN/A    else
5812292SN/A        return thread[tid].lqFull();
5822292SN/A}
5832292SN/A
5842292SN/Atemplate<class Impl>
5852292SN/Abool
5862292SN/ALSQ<Impl>::sqFull()
5872292SN/A{
5886221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
5896221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
5902292SN/A
5913867Sbinkertn@umich.edu    while (threads != end) {
5926221Snate@binkert.org        ThreadID tid = *threads++;
5933867Sbinkertn@umich.edu
5942292SN/A        if (!sqFull(tid))
5952292SN/A            return false;
5962292SN/A    }
5972292SN/A
5982292SN/A    return true;
5992292SN/A}
6002292SN/A
6012292SN/Atemplate<class Impl>
6022292SN/Abool
6036221Snate@binkert.orgLSQ<Impl>::sqFull(ThreadID tid)
6042292SN/A{
6052292SN/A     //@todo: Change to Calculate All Entries for
6062292SN/A    //Dynamic Policy
6073870Sbinkertn@umich.edu    if (lsqPolicy == Dynamic)
6082292SN/A        return sqFull();
6092292SN/A    else
6102292SN/A        return thread[tid].sqFull();
6112292SN/A}
6122292SN/A
6132292SN/Atemplate<class Impl>
6142292SN/Abool
6152292SN/ALSQ<Impl>::isStalled()
6162292SN/A{
6176221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
6186221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
6192292SN/A
6203867Sbinkertn@umich.edu    while (threads != end) {
6216221Snate@binkert.org        ThreadID tid = *threads++;
6223867Sbinkertn@umich.edu
6232292SN/A        if (!thread[tid].isStalled())
6242292SN/A            return false;
6252292SN/A    }
6262292SN/A
6272292SN/A    return true;
6282292SN/A}
6292292SN/A
6302292SN/Atemplate<class Impl>
6312292SN/Abool
6326221Snate@binkert.orgLSQ<Impl>::isStalled(ThreadID tid)
6332292SN/A{
6343870Sbinkertn@umich.edu    if (lsqPolicy == Dynamic)
6352292SN/A        return isStalled();
6362292SN/A    else
6372292SN/A        return thread[tid].isStalled();
6382292SN/A}
6392292SN/A
6402292SN/Atemplate<class Impl>
6412292SN/Abool
6422292SN/ALSQ<Impl>::hasStoresToWB()
6432292SN/A{
6446221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
6456221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
6462292SN/A
6473867Sbinkertn@umich.edu    while (threads != end) {
6486221Snate@binkert.org        ThreadID tid = *threads++;
6493867Sbinkertn@umich.edu
6505557Sktlim@umich.edu        if (hasStoresToWB(tid))
6515557Sktlim@umich.edu            return true;
6522292SN/A    }
6532292SN/A
6545557Sktlim@umich.edu    return false;
6552292SN/A}
6562292SN/A
6572292SN/Atemplate<class Impl>
6582292SN/Abool
6592292SN/ALSQ<Impl>::willWB()
6602292SN/A{
6616221Snate@binkert.org    list<ThreadID>::iterator threads = activeThreads->begin();
6626221Snate@binkert.org    list<ThreadID>::iterator end = activeThreads->end();
6632292SN/A
6643867Sbinkertn@umich.edu    while (threads != end) {
6656221Snate@binkert.org        ThreadID tid = *threads++;
6663867Sbinkertn@umich.edu
6675557Sktlim@umich.edu        if (willWB(tid))
6685557Sktlim@umich.edu            return true;
6692292SN/A    }
6702292SN/A
6715557Sktlim@umich.edu    return false;
6722292SN/A}
6732292SN/A
6742292SN/Atemplate<class Impl>
6752292SN/Avoid
6769440SAndreas.Sandberg@ARM.comLSQ<Impl>::dumpInsts() const
6772292SN/A{
6789440SAndreas.Sandberg@ARM.com    list<ThreadID>::const_iterator threads = activeThreads->begin();
6799440SAndreas.Sandberg@ARM.com    list<ThreadID>::const_iterator end = activeThreads->end();
6802292SN/A
6813867Sbinkertn@umich.edu    while (threads != end) {
6826221Snate@binkert.org        ThreadID tid = *threads++;
6833867Sbinkertn@umich.edu
6842292SN/A        thread[tid].dumpInsts();
6852292SN/A    }
6862292SN/A}
6879944Smatt.horsnell@ARM.com
6889944Smatt.horsnell@ARM.com#endif//__CPU_O3_LSQ_IMPL_HH__
689