12292SN/A/*
29783Sandreas.hansson@arm.com * Copyright (c) 2012-2013 ARM Limited
39444SAndreas.Sandberg@ARM.com * All rights reserved
49444SAndreas.Sandberg@ARM.com *
59444SAndreas.Sandberg@ARM.com * The license below extends only to copyright in the software and shall
69444SAndreas.Sandberg@ARM.com * not be construed as granting a license to any other intellectual
79444SAndreas.Sandberg@ARM.com * property including but not limited to intellectual property relating
89444SAndreas.Sandberg@ARM.com * to a hardware implementation of the functionality of the software
99444SAndreas.Sandberg@ARM.com * licensed hereunder.  You may use the software subject to the license
109444SAndreas.Sandberg@ARM.com * terms below provided that you ensure that this notice is replicated
119444SAndreas.Sandberg@ARM.com * unmodified and in its entirety in all distributions of the software,
129444SAndreas.Sandberg@ARM.com * modified or unmodified, in source code or in binary form.
139444SAndreas.Sandberg@ARM.com *
142689Sktlim@umich.edu * Copyright (c) 2006 The Regents of The University of Michigan
152292SN/A * All rights reserved.
162292SN/A *
172292SN/A * Redistribution and use in source and binary forms, with or without
182292SN/A * modification, are permitted provided that the following conditions are
192292SN/A * met: redistributions of source code must retain the above copyright
202292SN/A * notice, this list of conditions and the following disclaimer;
212292SN/A * redistributions in binary form must reproduce the above copyright
222292SN/A * notice, this list of conditions and the following disclaimer in the
232292SN/A * documentation and/or other materials provided with the distribution;
242292SN/A * neither the name of the copyright holders nor the names of its
252292SN/A * contributors may be used to endorse or promote products derived from
262292SN/A * this software without specific prior written permission.
272292SN/A *
282292SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
292292SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
302292SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
312292SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
322292SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
332292SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
342292SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
352292SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
362292SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
372292SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
382292SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
392689Sktlim@umich.edu *
402689Sktlim@umich.edu * Authors: Kevin Lim
412292SN/A */
422292SN/A
432292SN/A#ifndef __CPU_O3_FU_POOL_HH__
442292SN/A#define __CPU_O3_FU_POOL_HH__
452292SN/A
4610814Sandreas.hansson@arm.com#include <array>
472292SN/A#include <bitset>
482292SN/A#include <list>
492292SN/A#include <string>
502292SN/A#include <vector>
512292SN/A
528229Snate@binkert.org#include "cpu/op_class.hh"
535034Smilesck@eecs.umich.edu#include "params/FUPool.hh"
542292SN/A#include "sim/sim_object.hh"
552292SN/A
562292SN/Aclass FUDesc;
572292SN/Aclass FuncUnit;
582292SN/A
592292SN/A/**
602292SN/A * Pool of FU's, specific to the new CPU model. The old FU pool had lists of
612292SN/A * free units and busy units, and whenever a FU was needed it would iterate
622292SN/A * through the free units to find a FU that provided the capability. This pool
632292SN/A * has lists of units specific to each of the capabilities, and whenever a FU
642292SN/A * is needed, it iterates through that list to find a free unit. The previous
652292SN/A * FU pool would have to be ticked each cycle to update which units became
662292SN/A * free. This FU pool lets the IEW stage handle freeing units, which frees
672292SN/A * them as their scheduled execution events complete. This limits units in this
682292SN/A * model to either have identical issue and op latencies, or 1 cycle issue
692292SN/A * latencies.
702292SN/A */
712292SN/Aclass FUPool : public SimObject
722292SN/A{
732292SN/A  private:
742292SN/A    /** Maximum op execution latencies, per op class. */
7510814Sandreas.hansson@arm.com    std::array<Cycles, Num_OpClasses> maxOpLatencies;
7610807Snilay@cs.wisc.edu    /** Whether op is pipelined or not. */
7710814Sandreas.hansson@arm.com    std::array<bool, Num_OpClasses> pipelined;
782292SN/A
792292SN/A    /** Bitvector listing capabilities of this FU pool. */
802292SN/A    std::bitset<Num_OpClasses> capabilityList;
812292SN/A
822292SN/A    /** Bitvector listing which FUs are busy. */
832292SN/A    std::vector<bool> unitBusy;
842292SN/A
852292SN/A    /** List of units to be freed at the end of this cycle. */
862292SN/A    std::vector<int> unitsToBeFreed;
872292SN/A
882292SN/A    /**
892292SN/A     * Class that implements a circular queue to hold FU indices. The hope is
902292SN/A     * that FUs that have been just used will be moved to the end of the queue
912292SN/A     * by iterating through it, thus leaving free units at the head of the
922292SN/A     * queue.
932292SN/A     */
942292SN/A    class FUIdxQueue {
952292SN/A      public:
962292SN/A        /** Constructs a circular queue of FU indices. */
972292SN/A        FUIdxQueue()
982292SN/A            : idx(0), size(0)
992292SN/A        { }
1002292SN/A
1012292SN/A        /** Adds a FU to the queue. */
1022292SN/A        inline void addFU(int fu_idx);
1032292SN/A
1042292SN/A        /** Returns the index of the FU at the head of the queue, and changes
1052292SN/A         *  the index to the next element.
1062292SN/A         */
1072292SN/A        inline int getFU();
1082292SN/A
1092292SN/A      private:
1102292SN/A        /** Circular queue index. */
1112292SN/A        int idx;
1122292SN/A
1132292SN/A        /** Size of the queue. */
1142292SN/A        int size;
1152292SN/A
1162292SN/A        /** Queue of FU indices. */
1172292SN/A        std::vector<int> funcUnitsIdx;
1182292SN/A    };
1192292SN/A
1202292SN/A    /** Per op class queues of FUs that provide that capability. */
1212292SN/A    FUIdxQueue fuPerCapList[Num_OpClasses];
1222292SN/A
1232292SN/A    /** Number of FUs. */
1242292SN/A    int numFU;
1252292SN/A
1262292SN/A    /** Functional units. */
1272292SN/A    std::vector<FuncUnit *> funcUnits;
1282292SN/A
1292292SN/A    typedef std::vector<FuncUnit *>::iterator fuListIterator;
1302292SN/A
1312292SN/A  public:
1325034Smilesck@eecs.umich.edu    typedef FUPoolParams Params;
1332292SN/A    /** Constructs a FU pool. */
1345034Smilesck@eecs.umich.edu    FUPool(const Params *p);
1352292SN/A    ~FUPool();
1362292SN/A
13711365SRekai.GonzalezAlberquilla@arm.com    static constexpr auto NoCapableFU = -2;
13811365SRekai.GonzalezAlberquilla@arm.com    static constexpr auto NoFreeFU = -1;
1392292SN/A    /**
14011365SRekai.GonzalezAlberquilla@arm.com     * Gets a FU providing the requested capability. Will mark the
14111365SRekai.GonzalezAlberquilla@arm.com     * unit as busy, but leaves the freeing of the unit up to the IEW
14211365SRekai.GonzalezAlberquilla@arm.com     * stage.
14311365SRekai.GonzalezAlberquilla@arm.com     *
1442292SN/A     * @param capability The capability requested.
14511365SRekai.GonzalezAlberquilla@arm.com     * @return Returns NoCapableFU if the FU pool does not have the
14611365SRekai.GonzalezAlberquilla@arm.com     * capability, NoFreeFU if there is no free FU, and the FU's index
14711365SRekai.GonzalezAlberquilla@arm.com     * otherwise.
1482292SN/A     */
1492292SN/A    int getUnit(OpClass capability);
1502292SN/A
1512292SN/A    /** Frees a FU at the end of this cycle. */
1522327SN/A    void freeUnitNextCycle(int fu_idx);
1532292SN/A
1542292SN/A    /** Frees all FUs on the list. */
1552292SN/A    void processFreeUnits();
1562292SN/A
1572292SN/A    /** Returns the total number of FUs. */
1582292SN/A    int size() { return numFU; }
1592292SN/A
1602292SN/A    /** Debugging function used to dump FU information. */
1612292SN/A    void dump();
1622292SN/A
1632292SN/A    /** Returns the operation execution latency of the given capability. */
1649184Sandreas.hansson@arm.com    Cycles getOpLatency(OpClass capability) {
1652292SN/A        return maxOpLatencies[capability];
1662292SN/A    }
1672292SN/A
1682292SN/A    /** Returns the issue latency of the given capability. */
16910807Snilay@cs.wisc.edu    bool isPipelined(OpClass capability) {
17010807Snilay@cs.wisc.edu        return pipelined[capability];
1712292SN/A    }
1722307SN/A
1739783Sandreas.hansson@arm.com    /** Have all the FUs drained? */
1749783Sandreas.hansson@arm.com    bool isDrained() const;
1752348SN/A
1762348SN/A    /** Takes over from another CPU's thread. */
1779444SAndreas.Sandberg@ARM.com    void takeOverFrom() {};
1782292SN/A};
1792292SN/A
1802292SN/A#endif // __CPU_O3_FU_POOL_HH__
181