free_list.hh revision 2669
12SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu */
282665Ssaidi@eecs.umich.edu
292SN/A#ifndef __CPU_O3_FREE_LIST_HH__
302SN/A#define __CPU_O3_FREE_LIST_HH__
311798SN/A
321798SN/A#include <iostream>
332SN/A#include <queue>
3456SN/A
352SN/A#include "arch/isa_traits.hh"
362SN/A#include "base/misc.hh"
372SN/A#include "base/trace.hh"
382SN/A#include "base/traceflags.hh"
392667Sstever@eecs.umich.edu#include "cpu/o3/comm.hh"
402SN/A
412SN/A/**
422SN/A * FreeList class that simply holds the list of free integer and floating
432SN/A * point registers.  Can request for a free register of either type, and
442SN/A * also send back free registers of either type.  This is a very simple
453144Shsul@eecs.umich.edu * class, but it should be sufficient for most implementations.  Like all
462SN/A * other classes, it assumes that the indices for the floating point
472SN/A * registers starts after the integer registers end.  Hence the variable
482797Sktlim@umich.edu * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
492797Sktlim@umich.edu * Note that while this most likely should be called FreeList, the name
502797Sktlim@umich.edu * "FreeList" is used in a typedef within the CPU Policy, and therefore no
512797Sktlim@umich.edu * class can be named simply "FreeList".
522797Sktlim@umich.edu * @todo: Give a better name to the base FP dependency.
533144Shsul@eecs.umich.edu */
543144Shsul@eecs.umich.educlass SimpleFreeList
553144Shsul@eecs.umich.edu{
563144Shsul@eecs.umich.edu  private:
573144Shsul@eecs.umich.edu    /** The list of free integer registers. */
582667Sstever@eecs.umich.edu    std::queue<PhysRegIndex> freeIntRegs;
592SN/A
603144Shsul@eecs.umich.edu    /** The list of free floating point registers. */
613144Shsul@eecs.umich.edu    std::queue<PhysRegIndex> freeFloatRegs;
623144Shsul@eecs.umich.edu
633144Shsul@eecs.umich.edu    /** Number of logical integer registers. */
643144Shsul@eecs.umich.edu    int numLogicalIntRegs;
652SN/A
662667Sstever@eecs.umich.edu    /** Number of physical integer registers. */
672667Sstever@eecs.umich.edu    int numPhysicalIntRegs;
682SN/A
692SN/A    /** Number of logical floating point registers. */
702SN/A    int numLogicalFloatRegs;
715336Shines@cs.fsu.edu
722SN/A    /** Number of physical floating point registers. */
732SN/A    int numPhysicalFloatRegs;
742839Sktlim@umich.edu
752797Sktlim@umich.edu    /** Total number of physical registers. */
762797Sktlim@umich.edu    int numPhysicalRegs;
772839Sktlim@umich.edu
782797Sktlim@umich.edu  public:
792797Sktlim@umich.edu    /** Constructs a free list.
802839Sktlim@umich.edu     *  @param activeThreads Number of active threads.
812797Sktlim@umich.edu     *  @param _numLogicalIntRegs Number of logical integer registers.
822797Sktlim@umich.edu     *  @param _numPhysicalIntRegs Number of physical integer registers.
832797Sktlim@umich.edu     *  @param _numLogicalFloatRegs Number of logical fp registers.
842797Sktlim@umich.edu     *  @param _numPhysicalFloatRegs Number of physical fp registers.
852797Sktlim@umich.edu     */
862797Sktlim@umich.edu    SimpleFreeList(unsigned activeThreads,
872797Sktlim@umich.edu                   unsigned _numLogicalIntRegs,
882797Sktlim@umich.edu                   unsigned _numPhysicalIntRegs,
892797Sktlim@umich.edu                   unsigned _numLogicalFloatRegs,
902SN/A                   unsigned _numPhysicalFloatRegs);
912SN/A
922SN/A    /** Gives the name of the freelist. */
932SN/A    std::string name() const;
942SN/A
952SN/A    /** Gets a free integer register. */
962SN/A    inline PhysRegIndex getIntReg();
972SN/A
982SN/A    /** Gets a free fp register. */
992SN/A    inline PhysRegIndex getFloatReg();
1002SN/A
1012SN/A    /** Adds a register back to the free list. */
1022SN/A    inline void addReg(PhysRegIndex freed_reg);
1032SN/A
1042SN/A    /** Adds an integer register back to the free list. */
1052SN/A    inline void addIntReg(PhysRegIndex freed_reg);
1062SN/A
1075336Shines@cs.fsu.edu    /** Adds a fp register back to the free list. */
1082SN/A    inline void addFloatReg(PhysRegIndex freed_reg);
1092SN/A
1102SN/A    /** Checks if there are any free integer registers. */
1111798SN/A    bool hasFreeIntRegs()
1122SN/A    { return !freeIntRegs.empty(); }
1132SN/A
1142SN/A    /** Checks if there are any free fp registers. */
1152SN/A    bool hasFreeFloatRegs()
1162SN/A    { return !freeFloatRegs.empty(); }
1172SN/A
1182SN/A    /** Returns the number of free integer registers. */
1192SN/A    int numFreeIntRegs()
1202SN/A    { return freeIntRegs.size(); }
1211798SN/A
1222SN/A    /** Returns the number of free fp registers. */
1232SN/A    int numFreeFloatRegs()
1242SN/A    { return freeFloatRegs.size(); }
1255336Shines@cs.fsu.edu};
1262SN/A
1272SN/Ainline PhysRegIndex
1281798SN/ASimpleFreeList::getIntReg()
129{
130    DPRINTF(FreeList, "Trying to get free integer register.\n");
131
132    if (freeIntRegs.empty()) {
133        panic("No free integer registers!");
134    }
135
136    PhysRegIndex free_reg = freeIntRegs.front();
137
138    freeIntRegs.pop();
139
140    return(free_reg);
141}
142
143inline PhysRegIndex
144SimpleFreeList::getFloatReg()
145{
146    DPRINTF(FreeList, "Trying to get free float register.\n");
147
148    if (freeFloatRegs.empty()) {
149        panic("No free integer registers!");
150    }
151
152    PhysRegIndex free_reg = freeFloatRegs.front();
153
154    freeFloatRegs.pop();
155
156    return(free_reg);
157}
158
159inline void
160SimpleFreeList::addReg(PhysRegIndex freed_reg)
161{
162    DPRINTF(FreeList,"Freeing register %i.\n", freed_reg);
163    //Might want to add in a check for whether or not this register is
164    //already in there.  A bit vector or something similar would be useful.
165    if (freed_reg < numPhysicalIntRegs) {
166        if (freed_reg != TheISA::ZeroReg)
167            freeIntRegs.push(freed_reg);
168    } else if (freed_reg < numPhysicalRegs) {
169        if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs))
170            freeFloatRegs.push(freed_reg);
171    }
172}
173
174inline void
175SimpleFreeList::addIntReg(PhysRegIndex freed_reg)
176{
177    DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg);
178
179    freeIntRegs.push(freed_reg);
180}
181
182inline void
183SimpleFreeList::addFloatReg(PhysRegIndex freed_reg)
184{
185    DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg);
186
187    freeFloatRegs.push(freed_reg);
188}
189
190#endif // __CPU_O3_FREE_LIST_HH__
191