free_list.hh revision 2107
12221SN/A/* 22221SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 32221SN/A * All rights reserved. 42221SN/A * 52221SN/A * Redistribution and use in source and binary forms, with or without 62221SN/A * modification, are permitted provided that the following conditions are 72221SN/A * met: redistributions of source code must retain the above copyright 82221SN/A * notice, this list of conditions and the following disclaimer; 92221SN/A * redistributions in binary form must reproduce the above copyright 102221SN/A * notice, this list of conditions and the following disclaimer in the 112221SN/A * documentation and/or other materials provided with the distribution; 122221SN/A * neither the name of the copyright holders nor the names of its 132221SN/A * contributors may be used to endorse or promote products derived from 142221SN/A * this software without specific prior written permission. 152221SN/A * 162221SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172221SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182221SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192221SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202221SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212221SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222221SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232221SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242221SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252221SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262221SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu */ 282665Ssaidi@eecs.umich.edu 292665Ssaidi@eecs.umich.edu#ifndef __CPU_O3_CPU_FREE_LIST_HH__ 302221SN/A#define __CPU_O3_CPU_FREE_LIST_HH__ 312221SN/A 323415Sgblack@eecs.umich.edu#include <iostream> 333415Sgblack@eecs.umich.edu#include <queue> 342223SN/A 353415Sgblack@eecs.umich.edu#include "arch/isa_traits.hh" 368778Sgblack@eecs.umich.edu#include "base/trace.hh" 373578Sgblack@eecs.umich.edu#include "base/traceflags.hh" 383415Sgblack@eecs.umich.edu#include "cpu/o3/comm.hh" 393415Sgblack@eecs.umich.edu 408750Sgblack@eecs.umich.edu/** 413415Sgblack@eecs.umich.edu * FreeList class that simply holds the list of free integer and floating 422680Sktlim@umich.edu * point registers. Can request for a free register of either type, and 433415Sgblack@eecs.umich.edu * also send back free registers of either type. This is a very simple 442800Ssaidi@eecs.umich.edu * class, but it should be sufficient for most implementations. Like all 458750Sgblack@eecs.umich.edu * other classes, it assumes that the indices for the floating point 462221SN/A * registers starts after the integer registers end. Hence the variable 473415Sgblack@eecs.umich.edu * numPhysicalIntRegs is logically equivalent to the baseFP dependency. 483415Sgblack@eecs.umich.edu * Note that 492223SN/A * while this most likely should be called FreeList, the name "FreeList" 502221SN/A * is used in a typedef within the CPU Policy, and therefore no class 512221SN/A * can be named simply "FreeList". 523573Sgblack@eecs.umich.edu * @todo: Give a better name to the base FP dependency. 533576Sgblack@eecs.umich.edu */ 549551Sandreas.hansson@arm.comclass SimpleFreeList 552221SN/A{ 563573Sgblack@eecs.umich.edu private: 573576Sgblack@eecs.umich.edu /** The list of free integer registers. */ 589551Sandreas.hansson@arm.com std::queue<PhysRegIndex> freeIntRegs; 592221SN/A 603573Sgblack@eecs.umich.edu /** The list of free floating point registers. */ 613576Sgblack@eecs.umich.edu std::queue<PhysRegIndex> freeFloatRegs; 629551Sandreas.hansson@arm.com 632221SN/A /** Number of logical integer registers. */ 643573Sgblack@eecs.umich.edu int numLogicalIntRegs; 653576Sgblack@eecs.umich.edu 669551Sandreas.hansson@arm.com /** Number of physical integer registers. */ 672221SN/A int numPhysicalIntRegs; 683573Sgblack@eecs.umich.edu 693576Sgblack@eecs.umich.edu /** Number of logical floating point registers. */ 709551Sandreas.hansson@arm.com int numLogicalFloatRegs; 712221SN/A 723573Sgblack@eecs.umich.edu /** Number of physical floating point registers. */ 733576Sgblack@eecs.umich.edu int numPhysicalFloatRegs; 749551Sandreas.hansson@arm.com 752221SN/A /** Total number of physical registers. */ 763573Sgblack@eecs.umich.edu int numPhysicalRegs; 773576Sgblack@eecs.umich.edu 789551Sandreas.hansson@arm.com /** DEBUG stuff below. */ 793576Sgblack@eecs.umich.edu std::vector<int> freeIntRegsScoreboard; 803576Sgblack@eecs.umich.edu 813576Sgblack@eecs.umich.edu std::vector<bool> freeFloatRegsScoreboard; 823576Sgblack@eecs.umich.edu 833576Sgblack@eecs.umich.edu public: 842221SN/A SimpleFreeList(unsigned _numLogicalIntRegs, 853573Sgblack@eecs.umich.edu unsigned _numPhysicalIntRegs, 863576Sgblack@eecs.umich.edu unsigned _numLogicalFloatRegs, 879551Sandreas.hansson@arm.com unsigned _numPhysicalFloatRegs); 882221SN/A 893573Sgblack@eecs.umich.edu inline PhysRegIndex getIntReg(); 903576Sgblack@eecs.umich.edu 919551Sandreas.hansson@arm.com inline PhysRegIndex getFloatReg(); 922221SN/A 933573Sgblack@eecs.umich.edu inline void addReg(PhysRegIndex freed_reg); 943576Sgblack@eecs.umich.edu 959551Sandreas.hansson@arm.com inline void addIntReg(PhysRegIndex freed_reg); 963576Sgblack@eecs.umich.edu 973576Sgblack@eecs.umich.edu inline void addFloatReg(PhysRegIndex freed_reg); 983576Sgblack@eecs.umich.edu 993576Sgblack@eecs.umich.edu bool hasFreeIntRegs() 1003576Sgblack@eecs.umich.edu { return !freeIntRegs.empty(); } 1013576Sgblack@eecs.umich.edu 1023576Sgblack@eecs.umich.edu bool hasFreeFloatRegs() 1033576Sgblack@eecs.umich.edu { return !freeFloatRegs.empty(); } 1043576Sgblack@eecs.umich.edu 1053576Sgblack@eecs.umich.edu int numFreeIntRegs() 1062221SN/A { return freeIntRegs.size(); } 1073573Sgblack@eecs.umich.edu 1083576Sgblack@eecs.umich.edu int numFreeFloatRegs() 1099551Sandreas.hansson@arm.com { return freeFloatRegs.size(); } 1102221SN/A}; 1113573Sgblack@eecs.umich.edu 1123576Sgblack@eecs.umich.eduinline PhysRegIndex 1139551Sandreas.hansson@arm.comSimpleFreeList::getIntReg() 1142221SN/A{ 1153573Sgblack@eecs.umich.edu DPRINTF(Rename, "FreeList: Trying to get free integer register.\n"); 1163576Sgblack@eecs.umich.edu if (freeIntRegs.empty()) { 1179551Sandreas.hansson@arm.com panic("No free integer registers!"); 1182221SN/A } 1193573Sgblack@eecs.umich.edu 1203576Sgblack@eecs.umich.edu PhysRegIndex free_reg = freeIntRegs.front(); 1219551Sandreas.hansson@arm.com 1222221SN/A freeIntRegs.pop(); 1233573Sgblack@eecs.umich.edu 1243576Sgblack@eecs.umich.edu // DEBUG 1259551Sandreas.hansson@arm.com assert(freeIntRegsScoreboard[free_reg]); 1262221SN/A freeIntRegsScoreboard[free_reg] = 0; 1273573Sgblack@eecs.umich.edu 1283576Sgblack@eecs.umich.edu return(free_reg); 1299551Sandreas.hansson@arm.com} 1302223SN/A 1313573Sgblack@eecs.umich.eduinline PhysRegIndex 1323576Sgblack@eecs.umich.eduSimpleFreeList::getFloatReg() 1339551Sandreas.hansson@arm.com{ 1342223SN/A DPRINTF(Rename, "FreeList: Trying to get free float register.\n"); 1353573Sgblack@eecs.umich.edu if (freeFloatRegs.empty()) { 1363576Sgblack@eecs.umich.edu panic("No free integer registers!"); 1379551Sandreas.hansson@arm.com } 1382223SN/A 1393573Sgblack@eecs.umich.edu PhysRegIndex free_reg = freeFloatRegs.front(); 1403576Sgblack@eecs.umich.edu 1419551Sandreas.hansson@arm.com freeFloatRegs.pop(); 1422223SN/A 1433573Sgblack@eecs.umich.edu // DEBUG 1443576Sgblack@eecs.umich.edu assert(freeFloatRegsScoreboard[free_reg]); 1459551Sandreas.hansson@arm.com freeFloatRegsScoreboard[free_reg] = 0; 1463576Sgblack@eecs.umich.edu 1473576Sgblack@eecs.umich.edu return(free_reg); 1483576Sgblack@eecs.umich.edu} 1493576Sgblack@eecs.umich.edu 1503576Sgblack@eecs.umich.eduinline void 1512223SN/ASimpleFreeList::addReg(PhysRegIndex freed_reg) 1523573Sgblack@eecs.umich.edu{ 1533576Sgblack@eecs.umich.edu DPRINTF(Rename, "Freelist: Freeing register %i.\n", freed_reg); 1549551Sandreas.hansson@arm.com //Might want to add in a check for whether or not this register is 1552223SN/A //already in there. A bit vector or something similar would be useful. 1563573Sgblack@eecs.umich.edu if (freed_reg < numPhysicalIntRegs) { 1573576Sgblack@eecs.umich.edu freeIntRegs.push(freed_reg); 1589551Sandreas.hansson@arm.com 1592223SN/A // DEBUG 1603573Sgblack@eecs.umich.edu assert(freeIntRegsScoreboard[freed_reg] == false); 1613576Sgblack@eecs.umich.edu freeIntRegsScoreboard[freed_reg] = 1; 1629551Sandreas.hansson@arm.com } else if (freed_reg < numPhysicalRegs) { 1632223SN/A freeFloatRegs.push(freed_reg); 1643573Sgblack@eecs.umich.edu 1653576Sgblack@eecs.umich.edu // DEBUG 1669551Sandreas.hansson@arm.com assert(freeFloatRegsScoreboard[freed_reg] == false); 1672223SN/A freeFloatRegsScoreboard[freed_reg] = 1; 1683573Sgblack@eecs.umich.edu } 1693576Sgblack@eecs.umich.edu} 1709551Sandreas.hansson@arm.com 1712223SN/Ainline void 1723573Sgblack@eecs.umich.eduSimpleFreeList::addIntReg(PhysRegIndex freed_reg) 1733576Sgblack@eecs.umich.edu{ 1749551Sandreas.hansson@arm.com DPRINTF(Rename, "Freelist: Freeing int register %i.\n", freed_reg); 1752223SN/A 1763573Sgblack@eecs.umich.edu // DEBUG 1773576Sgblack@eecs.umich.edu assert(!freeIntRegsScoreboard[freed_reg]); 1789551Sandreas.hansson@arm.com freeIntRegsScoreboard[freed_reg] = 1; 1792223SN/A 1803573Sgblack@eecs.umich.edu freeIntRegs.push(freed_reg); 1813576Sgblack@eecs.umich.edu} 1829551Sandreas.hansson@arm.com 1832223SN/Ainline void 1843573Sgblack@eecs.umich.eduSimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 1853576Sgblack@eecs.umich.edu{ 1869551Sandreas.hansson@arm.com DPRINTF(Rename, "Freelist: Freeing float register %i.\n", freed_reg); 1872223SN/A 1883573Sgblack@eecs.umich.edu // DEBUG 1893576Sgblack@eecs.umich.edu assert(!freeFloatRegsScoreboard[freed_reg]); 1909551Sandreas.hansson@arm.com freeFloatRegsScoreboard[freed_reg] = 1; 1912223SN/A 1923576Sgblack@eecs.umich.edu freeFloatRegs.push(freed_reg); 1933576Sgblack@eecs.umich.edu} 1943576Sgblack@eecs.umich.edu 1953576Sgblack@eecs.umich.edu#endif // __CPU_O3_CPU_FREE_LIST_HH__ 1962527SN/A